<s>
The	O
POWER3	B-General_Concept
is	O
a	O
microprocessor	B-Architecture
,	O
designed	O
and	O
exclusively	O
manufactured	O
by	O
IBM	O
,	O
that	O
implemented	O
the	O
64-bit	O
version	O
of	O
the	O
PowerPC	B-Architecture
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
,	O
including	O
all	O
of	O
the	O
optional	O
instructions	O
of	O
the	O
ISA	O
(	O
at	O
the	O
time	O
)	O
such	O
as	O
instructions	O
present	O
in	O
the	O
POWER2	B-General_Concept
version	O
of	O
the	O
POWER	B-Architecture
ISA	I-Architecture
but	O
not	O
in	O
the	O
PowerPC	B-Architecture
ISA	O
.	O
</s>
<s>
It	O
was	O
introduced	O
on	O
5	O
October	O
1998	O
,	O
debuting	O
in	O
the	O
RS/6000	B-Device
43P	I-Device
Model	I-Device
260	I-Device
,	O
a	O
high-end	O
graphics	O
workstation	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
was	O
originally	O
supposed	O
to	O
be	O
called	O
the	O
PowerPC	B-Architecture
630	O
but	O
was	O
renamed	O
,	O
probably	O
to	O
differentiate	O
the	O
server-oriented	O
POWER	B-Device
processors	I-Device
it	O
replaced	O
from	O
the	O
more	O
consumer-oriented	O
32-bit	O
PowerPCs	B-Architecture
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
was	O
the	O
successor	O
of	O
the	O
P2SC	O
derivative	O
of	O
the	O
POWER2	B-General_Concept
and	O
completed	O
IBM	O
's	O
long-delayed	O
transition	O
from	O
POWER	O
to	O
PowerPC	B-Architecture
,	O
which	O
was	O
originally	O
scheduled	O
to	O
conclude	O
in	O
1995	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
was	O
used	O
in	O
IBM	B-Device
RS/6000	I-Device
servers	O
and	O
workstations	O
at	O
200MHz	O
.	O
</s>
<s>
It	O
competed	O
with	O
the	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
Alpha	B-General_Concept
21264	I-General_Concept
and	O
the	O
Hewlett-Packard	O
(	O
HP	O
)	O
PA-8500	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
was	O
based	O
on	O
the	O
PowerPC	B-Architecture
620	O
,	O
an	O
earlier	O
64-bit	O
PowerPC	B-Architecture
implementation	O
that	O
was	O
late	O
,	O
under-performing	O
and	O
commercially	O
unsuccessful	O
.	O
</s>
<s>
Like	O
the	O
PowerPC	B-Architecture
620	O
,	O
the	O
POWER3	B-General_Concept
has	O
three	O
fixed-point	B-General_Concept
units	I-General_Concept
,	O
but	O
the	O
single	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
was	O
replaced	O
with	O
two	O
floating-point	O
fused	O
multiply	O
–	O
add	O
units	O
,	O
and	O
an	O
extra	O
load-store	O
unit	O
was	O
added	O
(	O
for	O
a	O
total	O
of	O
two	O
)	O
to	O
improve	O
floating-point	O
performance	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
is	O
a	O
superscalar	B-General_Concept
design	O
that	O
executed	O
instructions	O
out	B-General_Concept
of	I-General_Concept
order	I-General_Concept
.	O
</s>
<s>
The	O
general-purpose	O
register	O
file	O
contains	O
48	O
registers	O
,	O
of	O
which	O
32	O
are	O
general-purpose	O
registers	O
and	O
16	O
are	O
rename	O
registers	O
for	O
register	B-Architecture
renaming	I-Architecture
.	O
</s>
<s>
This	O
scheme	O
was	O
similar	O
to	O
a	O
contemporary	O
microprocessor	B-Architecture
,	O
the	O
DEC	O
Alpha	B-General_Concept
21264	I-General_Concept
,	O
but	O
was	O
simpler	O
as	O
it	O
did	O
not	O
require	O
an	O
extra	O
clock	O
cycle	O
to	O
synchronize	O
the	O
two	O
copies	O
due	O
to	O
the	O
POWER3	B-General_Concept
's	O
higher	O
cycle	O
times	O
.	O
</s>
<s>
Compared	O
to	O
the	O
PowerPC	B-Architecture
620	O
,	O
there	O
were	O
more	O
rename	O
registers	O
,	O
which	O
allowed	O
more	O
instructions	O
to	O
be	O
executed	O
out	B-General_Concept
of	I-General_Concept
order	I-General_Concept
,	O
improving	O
performance	O
.	O
</s>
<s>
Integer	O
instructions	O
are	O
executed	O
in	O
three	O
integer	O
execution	O
units	O
(	O
termed	O
"	O
fixed-point	B-General_Concept
units	I-General_Concept
"	O
by	O
IBM	O
)	O
.	O
</s>
<s>
Floating-point	O
instructions	O
are	O
executed	O
in	O
two	O
floating-point	B-General_Concept
units	I-General_Concept
(	O
FPUs	O
)	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
can	O
retire	O
up	O
to	O
four	O
instructions	O
per	O
cycle	O
.	O
</s>
<s>
The	O
PowerPC	B-Architecture
620	O
data	O
cache	O
was	O
optimized	O
for	O
technical	O
and	O
scientific	O
applications	O
.	O
</s>
<s>
The	O
POWER3	B-General_Concept
contained	O
15	O
million	O
transistors	O
on	O
a	O
270mm2	O
die	O
.	O
</s>
<s>
The	O
POWER3-II	O
was	O
an	O
improved	O
POWER3	B-General_Concept
that	O
increased	O
the	O
clock	O
frequency	O
to	O
450MHz	O
.	O
</s>
<s>
It	O
was	O
succeeded	O
by	O
the	O
POWER4	B-Device
in	O
2001	O
.	O
</s>
