<s>
PIC	O
(	O
usually	O
pronounced	O
as	O
 [ pʰɪk ] 	O
)	O
is	O
a	O
family	O
of	O
microcontrollers	B-Architecture
made	O
by	O
Microchip	O
Technology	O
,	O
derived	O
from	O
the	O
PIC1650	O
originally	O
developed	O
by	O
General	O
Instrument	O
's	O
Microelectronics	O
Division	O
.	O
</s>
<s>
The	O
name	O
PIC	O
initially	O
referred	O
to	O
Peripheral	B-Architecture
Interface	I-Architecture
Controller	I-Architecture
,	O
and	O
is	O
currently	O
expanded	O
as	O
Programmable	O
Intelligent	O
Computer	O
.	O
</s>
<s>
The	O
first	O
parts	O
of	O
the	O
family	O
were	O
available	O
in	O
1976	O
;	O
by	O
2013	O
the	O
company	O
had	O
shipped	O
more	O
than	O
twelve	O
billion	O
individual	O
parts	O
,	O
used	O
in	O
a	O
wide	O
variety	O
of	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
The	O
PIC	O
was	O
originally	O
intended	O
to	O
be	O
used	O
with	O
the	O
General	O
Instrument	O
CP1600	O
,	O
the	O
first	O
commercially	O
available	O
single-chip	O
16-bit	B-Device
microprocessor	B-Architecture
.	O
</s>
<s>
The	O
CP1600	O
had	O
a	O
complex	O
bus	O
that	O
made	O
it	O
difficult	O
to	O
interface	O
with	O
,	O
and	O
the	O
PIC	O
was	O
introduced	O
as	O
a	O
companion	O
device	O
offering	O
ROM	B-Device
for	O
program	O
storage	O
,	O
RAM	B-Architecture
for	O
temporary	O
data	B-General_Concept
handling	O
,	O
and	O
a	O
simple	O
CPU	O
for	O
controlling	O
the	O
transfers	O
.	O
</s>
<s>
Early	O
models	O
only	O
had	O
mask	B-Device
ROM	I-Device
for	O
code	O
storage	O
,	O
but	O
with	O
its	O
spinoff	O
it	O
was	O
soon	O
upgraded	O
to	O
use	O
EPROM	B-General_Concept
and	O
then	O
EEPROM	B-General_Concept
,	O
which	O
made	O
it	O
possible	O
for	O
end-users	O
to	O
program	O
the	O
devices	O
in	O
their	O
own	O
facilities	O
.	O
</s>
<s>
All	O
current	O
models	O
use	O
flash	B-Device
memory	I-Device
for	O
program	O
storage	O
,	O
and	O
newer	O
models	O
allow	O
the	O
PIC	O
to	O
reprogram	O
itself	O
.	O
</s>
<s>
Since	O
then	O
the	O
line	O
has	O
seen	O
significant	O
change	O
;	O
memory	O
is	O
now	O
available	O
in	O
8-bit	O
,	O
16-bit	B-Device
,	O
and	O
,	O
in	O
latest	O
models	O
,	O
32-bit	O
wide	O
.	O
</s>
<s>
The	O
instruction	O
set	O
also	O
varies	O
by	O
model	O
,	O
with	O
more	O
powerful	O
chips	O
adding	O
instructions	O
for	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
functions	O
.	O
</s>
<s>
The	O
hardware	O
implementations	O
of	O
PIC	O
devices	O
range	O
from	O
6-pin	O
SMD	O
,	O
8-pin	O
DIP	B-Algorithm
chips	O
up	O
to	O
144-pin	O
SMD	O
chips	O
,	O
with	O
discrete	O
I/O	B-General_Concept
pins	O
,	O
ADC	O
and	O
DAC	O
modules	O
,	O
and	O
communications	O
ports	O
such	O
as	O
UART	O
,	O
I2C	O
,	O
CAN	B-Protocol
,	O
and	O
even	O
USB	B-Protocol
.	O
</s>
<s>
The	O
manufacturer	O
supplies	O
computer	O
software	O
for	O
development	O
known	O
as	O
MPLAB	B-Application
X	I-Application
,	O
assemblers	B-Language
and	O
C/C	O
++	O
compilers	B-Language
,	O
and	O
programmer/debugger	O
hardware	O
under	O
the	O
MPLAB	B-Application
and	O
PICKit	B-Device
series	O
.	O
</s>
<s>
Some	O
parts	O
have	O
in-circuit	B-Device
programming	I-Device
capability	O
;	O
low-cost	O
development	O
programmers	B-General_Concept
are	O
available	O
as	O
well	O
as	O
high-volume	O
production	O
programmers	B-General_Concept
.	O
</s>
<s>
PIC	O
devices	O
are	O
popular	O
with	O
both	O
industrial	O
developers	O
and	O
hobbyists	O
due	O
to	O
their	O
low	O
cost	O
,	O
wide	O
availability	O
,	O
large	O
user	O
base	O
,	O
an	O
extensive	O
collection	O
of	O
application	O
notes	O
,	O
availability	O
of	O
low	O
cost	O
or	O
free	O
development	O
tools	O
,	O
serial	B-Protocol
programming	O
,	O
and	O
re-programmable	O
flash-memory	O
capability	O
.	O
</s>
<s>
The	O
original	O
PIC	O
was	O
intended	O
to	O
be	O
used	O
with	O
General	O
Instrument	O
's	O
new	O
CP1600	O
16-bit	B-Device
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
.	O
</s>
<s>
In	O
order	O
to	O
fit	O
16-bit	B-Device
data	B-General_Concept
and	O
address	O
buses	O
into	O
a	O
then-standard	O
40-pin	O
dual	B-Algorithm
inline	I-Algorithm
package	I-Algorithm
(	O
DIP	B-Algorithm
)	O
chip	O
,	O
the	O
two	O
buses	O
shared	O
the	O
same	O
set	O
of	O
16	O
connection	O
pins	O
.	O
</s>
<s>
In	O
order	O
to	O
communicate	O
with	O
the	O
CPU	O
,	O
devices	O
had	O
to	O
watch	O
other	O
pins	O
on	O
the	O
CPU	O
to	O
determine	O
if	O
the	O
information	O
on	O
the	O
bus	O
was	O
an	O
address	O
or	O
data	B-General_Concept
.	O
</s>
<s>
Since	O
only	O
one	O
of	O
these	O
was	O
being	O
presented	O
at	O
a	O
time	O
,	O
the	O
devices	O
had	O
to	O
watch	O
the	O
bus	O
to	O
go	O
into	O
address	O
mode	O
,	O
see	O
if	O
that	O
address	O
was	O
part	O
of	O
its	O
memory	B-Architecture
mapped	I-Architecture
input/output	I-Architecture
range	O
,	O
"	O
latch	O
"	O
that	O
address	O
and	O
then	O
wait	O
for	O
the	O
data	B-General_Concept
mode	O
to	O
turn	O
on	O
and	O
then	O
read	O
the	O
value	O
.	O
</s>
<s>
For	O
instance	O
,	O
a	O
floppy	B-Device
disk	I-Device
drive	I-Device
could	O
be	O
implemented	O
with	O
a	O
PIC	O
talking	O
to	O
the	O
CPU	O
on	O
one	O
side	O
and	O
the	O
floppy	B-Device
disk	I-Device
controller	I-Device
on	O
the	O
other	O
.	O
</s>
<s>
In	O
keeping	O
with	O
this	O
idea	O
,	O
what	O
would	O
today	O
be	O
known	O
as	O
a	O
microcontroller	B-Architecture
,	O
the	O
PIC	O
included	O
a	O
small	O
amount	O
of	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
that	O
would	O
be	O
written	O
with	O
the	O
user	O
's	O
device	O
controller	O
code	O
,	O
and	O
a	O
separate	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
for	O
buffering	O
and	O
working	O
with	O
data	B-General_Concept
.	O
</s>
<s>
These	O
were	O
connected	O
separately	O
,	O
making	O
the	O
PIC	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
system	O
with	O
code	O
and	O
data	B-General_Concept
being	O
managed	O
on	O
separate	O
internal	O
pathways	O
.	O
</s>
<s>
In	O
theory	O
,	O
the	O
combination	O
of	O
1600	O
CPU	O
and	O
PIC	O
device	O
controllers	O
provided	O
a	O
very	O
high-performance	O
device	O
control	O
system	O
,	O
one	O
that	O
was	O
similar	O
in	O
power	O
and	O
performance	O
to	O
the	O
channel	B-Device
controllers	I-Device
see	O
on	O
mainframe	B-Architecture
computers	I-Architecture
.	O
</s>
<s>
In	O
the	O
floppy	B-Device
controller	I-Device
example	O
,	O
for	O
instance	O
,	O
a	O
single	O
PIC	O
could	O
control	O
the	O
drive	O
,	O
provide	O
a	O
reasonable	O
amount	O
of	O
buffering	O
to	O
improve	O
performance	O
,	O
and	O
then	O
transfer	O
data	B-General_Concept
to	O
and	O
from	O
the	O
host	O
computer	O
using	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
or	O
through	O
relatively	O
simple	O
code	O
in	O
the	O
CPU	O
.	O
</s>
<s>
This	O
resulted	O
in	O
very	O
little	O
uptake	O
of	O
the	O
system	O
,	O
with	O
the	O
Intellivision	B-Operating_System
being	O
the	O
only	O
really	O
widespread	O
use	O
with	O
about	O
three	O
million	O
units	O
.	O
</s>
<s>
The	O
PIC	O
,	O
however	O
,	O
was	O
upgraded	O
with	O
an	O
internal	O
EPROM	B-General_Concept
to	O
produce	O
a	O
programmable	O
channel	B-Device
controller	I-Device
.	O
</s>
<s>
In	O
1998	O
Microchip	O
introduced	O
the	O
PIC	O
16F84	B-Device
,	O
a	O
flash	O
programmable	O
and	O
erasable	O
version	O
of	O
its	O
successful	O
serial	B-Protocol
programmable	O
PIC16C84	B-Device
.	O
</s>
<s>
Today	O
,	O
a	O
huge	O
variety	O
of	O
PICs	O
are	O
available	O
with	O
various	O
on-board	O
peripherals	O
(	O
serial	B-Protocol
communication	I-Protocol
modules	O
,	O
UARTs	O
,	O
motor	O
control	O
kernels	O
,	O
etc	O
.	O
)	O
</s>
<s>
and	O
program	B-Device
memory	I-Device
from	O
256	O
words	O
to	O
64K	O
words	O
and	O
more	O
(	O
a	O
"	O
word	O
"	O
is	O
one	O
assembly	B-Language
language	I-Language
instruction	O
,	O
varying	O
in	O
length	O
from	O
8	O
to	O
16	B-Device
bits	I-Device
,	O
depending	O
on	O
the	O
specific	O
PIC	B-Architecture
micro	I-Architecture
family	O
)	O
.	O
</s>
<s>
PIC	O
and	O
PICmicro	B-Architecture
are	O
now	O
registered	O
trademarks	O
of	O
Microchip	O
Technology	O
.	O
</s>
<s>
It	O
is	O
generally	O
thought	O
that	O
PIC	O
stands	O
for	O
Peripheral	B-Architecture
Interface	I-Architecture
Controller	I-Architecture
,	O
although	O
General	O
Instruments	O
 '	O
original	O
acronym	O
for	O
the	O
initial	O
PIC1640	O
and	O
PIC1650	O
devices	O
was	O
"	O
Programmable	O
Interface	O
Controller	O
"	O
.	O
</s>
<s>
The	O
Microchip	O
16C84	O
(	O
PIC16x84	B-Device
)	O
,	O
introduced	O
in	O
1993	O
,	O
was	O
the	O
first	O
Microchip	O
CPU	O
with	O
on-chip	O
EEPROM	B-General_Concept
memory	O
.	O
</s>
<s>
By	O
2013	O
,	O
Microchip	O
was	O
shipping	O
over	O
one	O
billion	O
PIC	B-Architecture
microcontrollers	I-Architecture
every	O
year	O
.	O
</s>
<s>
PIC	B-Architecture
micro	I-Architecture
chips	O
are	O
designed	O
with	O
a	O
Harvard	B-Architecture
architecture	I-Architecture
,	O
and	O
are	O
offered	O
in	O
various	O
device	O
families	O
.	O
</s>
<s>
The	O
baseline	O
and	O
mid-range	O
families	O
use	O
8-bit	O
wide	O
data	B-General_Concept
memory	O
,	O
and	O
the	O
high-end	O
families	O
use	O
16-bit	B-Device
data	B-General_Concept
memory	O
.	O
</s>
<s>
The	O
latest	O
series	O
,	O
PIC32MZ	O
,	O
is	O
a	O
32-bit	O
MIPS-based	O
microcontroller	B-Architecture
.	O
</s>
<s>
Instruction	B-Language
word	I-Language
sizes	O
are	O
12	B-Device
bits	I-Device
(	O
PIC10	B-Architecture
and	O
PIC12	B-Architecture
)	O
,	O
14	O
bits	O
(	O
PIC16	B-Architecture
)	O
and	O
24	O
bits	O
(	O
PIC24	O
and	O
dsPIC	O
)	O
.	O
</s>
<s>
The	O
binary	O
representations	O
of	O
the	O
machine	O
instructions	O
vary	O
by	O
family	O
and	O
are	O
shown	O
in	O
PIC	B-Architecture
instruction	I-Architecture
listings	I-Architecture
.	O
</s>
<s>
Within	O
these	O
families	O
,	O
devices	O
may	O
be	O
designated	O
PICnnCxxx	O
(	O
CMOS	B-Device
)	O
or	O
PICnnFxxx	O
(	O
Flash	O
)	O
.	O
</s>
<s>
"	O
C	B-Language
"	O
devices	O
are	O
generally	O
classified	O
as	O
"	O
Not	O
suitable	O
for	O
new	O
development	O
"	O
(	O
not	O
actively	O
promoted	O
by	O
Microchip	O
)	O
.	O
</s>
<s>
The	O
program	B-Device
memory	I-Device
of	O
"	O
C	B-Language
"	O
devices	O
is	O
variously	O
described	O
as	O
OTP	B-General_Concept
,	O
ROM	B-Device
,	O
or	O
EEPROM	B-General_Concept
.	O
</s>
<s>
As	O
of	O
October	O
2016	O
,	O
the	O
only	O
OTP	B-General_Concept
product	O
classified	O
as	O
"	O
In	O
production	O
"	O
is	O
the	O
pic16HV540	O
.	O
</s>
<s>
"	O
C	B-Language
"	O
devices	O
with	O
quartz	O
windows	O
(	O
for	O
UV	O
erasure	O
)	O
are	O
in	O
general	O
no	O
longer	O
available	O
.	O
</s>
<s>
These	O
devices	O
feature	O
a	O
12-bit	B-Device
wide	O
code	O
memory	O
,	O
a	O
32-byte	O
register	B-General_Concept
file	O
,	O
and	O
a	O
tiny	O
two	O
level	O
deep	O
call	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
They	O
are	O
represented	O
by	O
the	O
PIC10	B-Architecture
series	O
,	O
as	O
well	O
as	O
by	O
some	O
PIC12	B-Architecture
and	O
PIC16	B-Architecture
devices	O
.	O
</s>
<s>
Generally	O
the	O
first	O
7	O
to	O
9	O
bytes	O
of	O
the	O
register	B-General_Concept
file	O
are	O
special-purpose	O
registers	O
,	O
and	O
the	O
remaining	O
bytes	O
are	O
general	O
purpose	O
RAM	B-Architecture
.	O
</s>
<s>
Pointers	O
are	O
implemented	O
using	O
a	O
register	B-General_Concept
pair	O
:	O
after	O
writing	O
an	O
address	O
to	O
the	O
FSR	O
(	O
file	O
select	O
register	B-General_Concept
)	O
,	O
the	O
INDF	O
(	O
indirect	O
f	O
)	O
register	B-General_Concept
becomes	O
an	O
alias	O
for	O
the	O
addressed	O
register	B-General_Concept
.	O
</s>
<s>
If	O
banked	O
RAM	B-Architecture
is	O
implemented	O
,	O
the	O
bank	O
number	O
is	O
selected	O
by	O
the	O
high	O
3	O
bits	O
of	O
the	O
FSR	O
.	O
</s>
<s>
This	O
affects	O
register	B-General_Concept
numbers	O
16	O
–	O
31	O
;	O
registers	O
0	O
–	O
15	O
are	O
global	O
and	O
not	O
affected	O
by	O
the	O
bank	O
select	O
bits	O
.	O
</s>
<s>
Because	O
of	O
the	O
very	O
limited	O
register	B-General_Concept
space	O
(	O
5	O
bits	O
)	O
,	O
4	O
rarely	O
read	O
registers	O
were	O
not	O
assigned	O
addresses	O
,	O
but	O
written	O
by	O
special	O
instructions	O
(	O
OPTION	O
and	O
TRIS	O
)	O
.	O
</s>
<s>
The	O
ROM	B-Device
address	O
space	O
is	O
512	O
and	O
may	O
only	O
specify	O
addresses	O
in	O
the	O
first	O
half	O
of	O
each	O
512-word	O
page	O
.	O
</s>
<s>
Lookup	B-Data_Structure
tables	I-Data_Structure
are	O
implemented	O
using	O
a	O
computed	O
GOTO	O
(	O
assignment	O
to	O
PCL	O
register	B-General_Concept
)	O
into	O
a	O
table	O
of	O
RETLW	O
instructions	O
.	O
</s>
<s>
RETLW	O
returns	O
returning	O
in	O
the	O
W	O
register	B-General_Concept
an	O
8-bit	O
immediate	O
constant	O
that	O
is	O
encoded	O
into	O
the	O
instruction	O
.	O
</s>
<s>
This	O
"	O
baseline	O
core	O
"	O
does	O
not	O
support	O
interrupts	B-Application
;	O
all	O
I/O	B-General_Concept
must	O
be	O
polled	B-General_Concept
.	O
</s>
<s>
There	O
are	O
some	O
"	O
enhanced	O
baseline	O
"	O
variants	O
with	O
interrupt	B-Application
support	O
and	O
a	O
four-level	O
call	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
PIC10F32x	O
devices	O
feature	O
a	O
mid-range	O
14-bit	O
wide	O
code	O
memory	O
of	O
256	O
or	O
512	O
words	O
,	O
a	O
64-byte	O
SRAM	O
register	B-General_Concept
file	O
,	O
and	O
an	O
8-level	O
deep	O
hardware	O
stack	B-Application
.	O
</s>
<s>
These	O
devices	O
are	O
available	O
in	O
6-pin	O
SMD	O
and	O
8-pin	O
DIP	B-Algorithm
packages	O
(	O
with	O
two	O
pins	O
unused	O
)	O
.	O
</s>
<s>
One	O
input	O
only	O
and	O
three	O
I/O	B-General_Concept
pins	O
are	O
available	O
.	O
</s>
<s>
A	O
complex	O
set	O
of	O
interrupts	B-Application
are	O
available	O
.	O
</s>
<s>
These	O
devices	O
feature	O
a	O
14-bit	O
wide	O
code	O
memory	O
,	O
and	O
an	O
improved	O
8-level	O
deep	O
call	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
The	O
instruction	O
set	O
differs	O
very	O
little	O
from	O
the	O
baseline	O
devices	O
,	O
but	O
the	O
two	O
additional	O
opcode	B-Language
bits	O
allow	O
128	O
registers	O
and	O
2048	O
words	O
of	O
code	O
to	O
be	O
directly	O
addressed	O
.	O
</s>
<s>
The	O
mid-range	O
core	O
is	O
available	O
in	O
the	O
majority	O
of	O
devices	O
labeled	O
PIC12	B-Architecture
and	O
PIC16	B-Architecture
.	O
</s>
<s>
The	O
first	O
32	O
bytes	O
of	O
the	O
register	B-General_Concept
space	O
are	O
allocated	O
to	O
special-purpose	O
registers	O
;	O
the	O
remaining	O
96	O
bytes	O
are	O
used	O
for	O
general-purpose	O
RAM	B-Architecture
.	O
</s>
<s>
If	O
banked	O
RAM	B-Architecture
is	O
used	O
,	O
the	O
high	O
16	O
registers	O
(	O
0x70	O
–	O
0x7F	O
)	O
are	O
global	O
,	O
as	O
are	O
a	O
few	O
of	O
the	O
most	O
important	O
special-purpose	O
registers	O
,	O
including	O
the	O
STATUS	O
register	B-General_Concept
,	O
which	O
holds	O
the	O
RAM	B-Architecture
bank	O
select	O
bits	O
.	O
</s>
<s>
(	O
The	O
other	O
global	O
registers	O
are	O
FSR	O
and	O
INDF	O
,	O
the	O
low	O
8	O
bits	O
of	O
the	O
program	B-General_Concept
counter	I-General_Concept
PCL	O
,	O
the	O
PC	O
high	O
preload	O
register	B-General_Concept
PCLATH	O
,	O
and	O
the	O
master	O
interrupt	B-Application
control	O
register	B-General_Concept
INTCON	O
.	O
)	O
</s>
<s>
The	O
PCLATH	O
register	B-General_Concept
supplies	O
high-order	O
instruction	O
address	O
bits	O
when	O
the	O
8	O
bits	O
supplied	O
by	O
a	O
write	O
to	O
the	O
PCL	O
register	B-General_Concept
,	O
or	O
the	O
11	O
bits	O
supplied	O
by	O
a	O
GOTO	O
or	O
CALL	O
instruction	O
,	O
are	O
not	O
sufficient	O
to	O
address	O
the	O
available	O
ROM	B-Device
space	O
.	O
</s>
<s>
Improvements	O
over	O
earlier	O
cores	O
are	O
16-bit	B-Device
wide	O
opcodes	B-Language
(	O
allowing	O
many	O
new	O
instructions	O
)	O
,	O
and	O
a	O
16-level	O
deep	O
call	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
A	O
significant	O
limitation	O
was	O
that	O
RAM	B-Architecture
space	O
was	O
limited	O
to	O
256	O
bytes	O
(	O
26	O
bytes	O
of	O
special	O
function	O
registers	O
,	O
and	O
232	O
bytes	O
of	O
general-purpose	O
RAM	B-Architecture
)	O
,	O
with	O
awkward	O
bank-switching	B-General_Concept
in	O
the	O
models	O
that	O
supported	O
more	O
.	O
</s>
<s>
In	O
contrast	O
to	O
earlier	O
devices	O
,	O
which	O
were	O
more	O
often	O
than	O
not	O
programmed	O
in	O
assembly	B-Language
language	I-Language
,	O
C	B-Language
has	O
become	O
the	O
predominant	O
development	O
language	O
.	O
</s>
<s>
The	O
RAM	B-Architecture
space	O
is	O
12bits	O
,	O
addressed	O
using	O
a	O
4-bit	O
bank	O
select	O
register	B-General_Concept
(	O
BSR	O
)	O
and	O
an	O
8-bit	O
offset	O
in	O
each	O
instruction	O
.	O
</s>
<s>
A	O
1-level	O
stack	B-Application
is	O
also	O
available	O
for	O
the	O
STATUS	O
,	O
WREG	O
and	O
BSR	O
registers	O
.	O
</s>
<s>
They	O
are	O
saved	O
on	O
every	O
interrupt	B-Application
,	O
and	O
may	O
be	O
restored	O
on	O
return	O
.	O
</s>
<s>
If	O
interrupts	B-Application
are	O
disabled	O
,	O
they	O
may	O
also	O
be	O
used	O
on	O
subroutine	O
call/return	O
by	O
setting	O
the	O
s	O
bit	O
(	O
appending	O
"	O
,	O
FAST	O
"	O
to	O
the	O
instruction	O
)	O
.	O
</s>
<s>
Depending	O
on	O
which	O
indirect	O
file	O
register	B-General_Concept
is	O
being	O
accessed	O
,	O
it	O
is	O
possible	O
to	O
postdecrement	O
,	O
postincrement	O
,	O
or	O
preincrement	O
FSR	O
;	O
or	O
form	O
the	O
effective	O
address	O
by	O
adding	O
W	O
to	O
FSR	O
.	O
</s>
<s>
In	O
more	O
advanced	O
PIC18	O
devices	O
,	O
an	O
"	O
extended	O
mode	O
"	O
is	O
available	O
which	O
makes	O
the	O
addressing	O
even	O
more	O
favorable	O
to	O
compiled	B-Language
code	O
:	O
</s>
<s>
They	O
are	O
Microchip	O
's	O
first	O
inherently	O
16-bit	B-Device
microcontrollers	B-Architecture
.	O
</s>
<s>
PIC24	O
devices	O
are	O
designed	O
as	O
general	O
purpose	O
microcontrollers	B-Architecture
.	O
</s>
<s>
dsPIC	O
devices	O
include	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
capabilities	O
in	O
addition	O
.	O
</s>
<s>
16	O
W	O
registers	O
available	O
for	O
register-register	O
operations	O
.	O
</s>
<s>
dsPICs	O
can	B-Protocol
be	O
programmed	O
in	O
C	B-Language
using	O
Microchip	O
's	O
XC16	O
compiler	B-Language
(	O
formerly	O
called	O
C30	O
)	O
,	O
which	O
is	O
a	O
variant	O
of	O
GCC	B-Application
.	O
</s>
<s>
Instruction	O
ROM	B-Device
is	O
24	O
bits	O
wide	O
.	O
</s>
<s>
Software	O
can	B-Protocol
access	O
ROM	B-Device
in	O
16-bit	B-Device
words	O
,	O
where	O
even	O
words	O
hold	O
the	O
least	O
significant	O
16	B-Device
bits	I-Device
of	O
each	O
instruction	O
,	O
and	O
odd	O
words	O
hold	O
the	O
most	O
significant	O
8	O
bits	O
.	O
</s>
<s>
The	O
program	B-General_Concept
counter	I-General_Concept
is	O
23	O
bits	O
wide	O
,	O
but	O
the	O
least	O
significant	O
bit	O
is	O
always	O
0	O
,	O
so	O
there	O
are	O
22	O
modifiable	O
bits	O
.	O
</s>
<s>
The	O
first	O
is	O
like	O
the	O
classic	O
PIC	O
instructions	O
,	O
with	O
an	O
operation	O
between	O
a	O
specified	O
f	O
register	B-General_Concept
(	O
i.e.	O
</s>
<s>
the	O
first	O
8K	O
of	O
RAM	B-Architecture
)	O
and	O
a	O
single	O
accumulator	B-General_Concept
W0	O
,	O
with	O
a	O
destination	O
select	O
bit	O
selecting	O
which	O
is	O
updated	O
with	O
the	O
result	O
.	O
</s>
<s>
so	O
the	O
f	O
operand	O
may	O
be	O
any	O
W	O
register	B-General_Concept
.	O
)	O
</s>
<s>
The	O
destination	O
and	O
one	O
of	O
the	O
sources	O
also	O
support	O
addressing	O
modes	O
,	O
allowing	O
the	O
operand	O
to	O
be	O
in	O
memory	O
pointed	O
to	O
by	O
a	O
W	O
register	B-General_Concept
.	O
</s>
<s>
In	O
November	O
2007	O
,	O
Microchip	O
introduced	O
the	O
family	O
of	O
32-bit	O
microcontrollers	B-Architecture
,	O
based	O
on	O
the	O
MIPS32	B-Device
M4K	I-Device
Core	I-Device
.	O
</s>
<s>
The	O
device	O
can	B-Protocol
be	O
programmed	O
using	O
the	O
,	O
a	O
variant	O
of	O
the	O
GCC	B-Application
compiler	I-Application
.	O
</s>
<s>
The	O
first	O
18	O
models	O
currently	O
in	O
production	O
(	O
PIC32MX3xx	O
and	O
PIC32MX4xx	O
)	O
are	O
pin	O
to	O
pin	O
compatible	O
and	O
share	O
the	O
same	O
peripherals	O
set	O
with	O
the	O
PIC24FxxGA0xx	O
family	O
of	O
(	O
16-bit	B-Device
)	O
devices	O
,	O
allowing	O
the	O
use	O
of	O
common	O
libraries	O
,	O
software	O
and	O
hardware	O
tools	O
.	O
</s>
<s>
Today	O
,	O
starting	O
at	O
28	O
pin	O
in	O
small	O
QFN	B-Algorithm
packages	O
up	O
to	O
high	O
performance	O
devices	O
with	O
Ethernet	O
,	O
CAN	B-Protocol
and	O
USB	B-Protocol
OTG	O
,	O
full	O
family	O
range	O
of	O
mid-range	O
32-bit	O
microcontrollers	B-Architecture
are	O
available	O
.	O
</s>
<s>
In	O
November	O
2013	O
,	O
Microchip	O
introduced	O
the	O
PIC32MZ	O
series	O
of	O
microcontrollers	B-Architecture
,	O
based	O
on	O
the	O
MIPS	B-Device
M14K	O
core	O
.	O
</s>
<s>
In	O
2015	O
,	O
Microchip	O
released	O
the	O
PIC32MZ	O
EF	O
family	O
,	O
using	O
the	O
updated	O
MIPS	B-Device
M5150	O
Warrior	O
M-class	O
processor	O
.	O
</s>
<s>
The	O
PIC32MM	O
microcontrollers	B-Architecture
use	O
the	O
MIPS	B-Device
Technologies	O
M4K	O
,	O
a	O
32-bit	O
MIPS32	B-Device
processor	O
.	O
</s>
<s>
Microchip	O
introduced	O
the	O
PIC32MK	O
family	O
in	O
2017	O
,	O
specialized	O
for	O
motor	O
control	O
,	O
industrial	O
control	O
,	O
Industrial	O
Internet	O
of	O
Things	O
(	O
IIoT	O
)	O
and	O
multi-channel	O
CAN	B-Protocol
applications	O
.	O
</s>
<s>
Separate	O
code	O
and	O
data	B-General_Concept
spaces	O
(	O
Harvard	B-Architecture
architecture	I-Architecture
)	O
.	O
</s>
<s>
Except	O
PIC32	O
:	O
The	O
MIPS	B-Device
M4K	O
architecture	O
's	O
separate	O
data	B-General_Concept
and	O
instruction	O
paths	O
are	O
effectively	O
merged	O
into	O
a	O
single	O
common	O
address	O
space	O
by	O
the	O
System	O
Bus	O
Matrix	O
module	O
.	O
</s>
<s>
One	O
accumulator	B-General_Concept
(	O
W0	O
)	O
,	O
the	O
use	O
of	O
which	O
(	O
as	O
source	O
operand	O
)	O
is	O
implied	O
(	O
i.e.	O
</s>
<s>
All	O
RAM	B-Architecture
locations	O
function	O
as	O
registers	O
as	O
both	O
source	O
and/or	O
destination	O
of	O
math	O
and	O
other	O
functions	O
.	O
</s>
<s>
The	O
program	B-General_Concept
counter	I-General_Concept
is	O
also	O
mapped	O
into	O
the	O
data	B-General_Concept
space	O
and	O
writable	O
(	O
this	O
is	O
used	O
to	O
implement	O
indirect	O
jumps	O
)	O
.	O
</s>
<s>
There	O
is	O
no	O
distinction	O
between	O
memory	O
space	O
and	O
register	B-General_Concept
space	O
because	O
the	O
RAM	B-Architecture
serves	O
the	O
job	O
of	O
both	O
memory	O
and	O
registers	O
,	O
and	O
the	O
RAM	B-Architecture
is	O
usually	O
just	O
referred	O
to	O
as	O
the	O
register	B-General_Concept
file	O
or	O
simply	O
as	O
the	O
registers	O
.	O
</s>
<s>
PICs	O
have	O
a	O
set	O
of	O
registers	O
that	O
function	O
as	O
general-purpose	O
RAM	B-Architecture
.	O
</s>
<s>
Special-purpose	O
control	O
registers	O
for	O
on-chip	O
hardware	O
resources	O
are	O
also	O
mapped	O
into	O
the	O
data	B-General_Concept
space	O
.	O
</s>
<s>
The	O
addressability	O
of	O
memory	O
varies	O
depending	O
on	O
device	O
series	O
,	O
and	O
all	O
PIC	O
device	O
types	O
have	O
some	O
banking	B-General_Concept
mechanism	I-General_Concept
to	O
extend	O
addressing	O
to	O
additional	O
memory	O
(	O
but	O
some	O
device	O
models	O
have	O
only	O
one	O
bank	O
implemented	O
)	O
.	O
</s>
<s>
Later	O
series	O
of	O
devices	O
feature	O
move	O
instructions	O
,	O
which	O
can	B-Protocol
cover	O
the	O
whole	O
addressable	O
space	O
,	O
independent	O
of	O
the	O
selected	O
bank	O
.	O
</s>
<s>
In	O
earlier	O
devices	O
,	O
any	O
register	B-General_Concept
move	O
must	O
be	O
achieved	O
through	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
To	O
implement	O
indirect	O
addressing	O
,	O
a	O
"	O
file	O
select	O
register	B-General_Concept
"	O
(	O
FSR	O
)	O
and	O
"	O
indirect	O
register	B-General_Concept
"	O
(	O
INDF	O
)	O
are	O
used	O
.	O
</s>
<s>
A	O
register	B-General_Concept
number	O
is	O
written	O
to	O
the	O
FSR	O
,	O
after	O
which	O
reads	O
from	O
or	O
writes	O
to	O
INDF	O
will	O
actually	O
be	O
from	O
or	O
to	O
the	O
register	B-General_Concept
pointed	O
to	O
by	O
FSR	O
.	O
</s>
<s>
Later	O
devices	O
extended	O
this	O
concept	O
with	O
post	O
-	O
and	O
pre	O
-	O
increment/decrement	O
for	O
greater	O
efficiency	O
in	O
accessing	O
sequentially	O
stored	O
data	B-General_Concept
.	O
</s>
<s>
This	O
also	O
allows	O
FSR	O
to	O
be	O
treated	O
almost	O
like	O
a	O
stack	B-Application
pointer	O
(	O
SP	O
)	O
.	O
</s>
<s>
External	O
data	B-General_Concept
memory	O
is	O
not	O
directly	O
addressable	O
except	O
in	O
some	O
PIC18	O
devices	O
with	O
high	O
pin	O
count	O
.	O
</s>
<s>
However	O
,	O
general	O
I/O	B-Architecture
ports	I-Architecture
can	B-Protocol
be	O
used	O
to	O
implement	O
a	O
parallel	O
bus	O
or	O
a	O
serial	B-Protocol
interface	I-Protocol
for	O
accessing	O
external	O
memory	O
and	O
other	O
peripherals	O
(	O
using	O
subroutines	O
)	O
,	O
with	O
the	O
caveat	O
that	O
such	O
programmed	O
memory	O
access	O
is	O
(	O
of	O
course	O
)	O
much	O
slower	O
than	O
access	O
to	O
the	O
native	O
memory	O
of	O
the	O
PIC	O
MCU	O
.	O
</s>
<s>
The	O
code	O
space	O
is	O
generally	O
implemented	O
as	O
on-chip	O
ROM	B-Device
,	O
EPROM	B-General_Concept
or	O
flash	B-Device
ROM	I-Device
.	O
</s>
<s>
All	O
PICs	O
handle	O
(	O
and	O
address	O
)	O
data	B-General_Concept
in	O
8-bit	O
chunks	O
.	O
</s>
<s>
However	O
,	O
the	O
unit	O
of	O
addressability	O
of	O
the	O
code	O
space	O
is	O
not	O
generally	O
the	O
same	O
as	O
the	O
data	B-General_Concept
space	O
.	O
</s>
<s>
For	O
example	O
,	O
PICs	O
in	O
the	O
baseline	O
(	O
PIC12	B-Architecture
)	O
and	O
mid-range	O
(	O
PIC16	B-Architecture
)	O
families	O
have	O
program	B-Device
memory	I-Device
addressable	O
in	O
the	O
same	O
wordsize	O
as	O
the	O
instruction	O
width	O
,	O
i.e.	O
</s>
<s>
In	O
contrast	O
,	O
in	O
the	O
PIC18	O
series	O
,	O
the	O
program	B-Device
memory	I-Device
is	O
addressed	O
in	O
8-bit	O
increments	O
(	O
bytes	O
)	O
,	O
which	O
differs	O
from	O
the	O
instruction	O
width	O
of	O
16	B-Device
bits	I-Device
.	O
</s>
<s>
In	O
order	O
to	O
be	O
clear	O
,	O
the	O
program	B-Device
memory	I-Device
capacity	O
is	O
usually	O
stated	O
in	O
number	O
of	O
(	O
single-word	O
)	O
instructions	O
,	O
rather	O
than	O
in	O
bytes	O
.	O
</s>
<s>
PICs	O
have	O
a	O
hardware	O
call	B-General_Concept
stack	I-General_Concept
,	O
which	O
is	O
used	O
to	O
save	O
return	O
addresses	O
.	O
</s>
<s>
The	O
hardware	O
stack	B-Application
is	O
not	O
software-accessible	O
on	O
earlier	O
devices	O
,	O
but	O
this	O
changed	O
with	O
the	O
PIC18	O
series	O
devices	O
.	O
</s>
<s>
Hardware	O
support	O
for	O
a	O
general-purpose	O
parameter	O
stack	B-Application
was	O
lacking	O
in	O
early	O
series	O
,	O
but	O
this	O
greatly	O
improved	O
in	O
the	O
PIC18	O
series	O
,	O
making	O
the	O
PIC18	O
series	O
architecture	O
more	O
friendly	O
to	O
high-level	O
language	B-Language
compilers	I-Language
.	O
</s>
<s>
The	O
instruction	O
set	O
includes	O
instructions	O
to	O
perform	O
a	O
variety	O
of	O
operations	O
on	O
registers	O
directly	O
,	O
on	O
the	O
accumulator	B-General_Concept
and	O
a	O
literal	O
constant	O
,	O
or	O
on	O
the	O
accumulator	B-General_Concept
and	O
a	O
register	B-General_Concept
,	O
as	O
well	O
as	O
for	O
conditional	O
execution	O
,	O
and	O
program	O
branching	O
.	O
</s>
<s>
Some	O
operations	O
,	O
such	O
as	O
bit	O
setting	O
and	O
testing	O
,	O
can	B-Protocol
be	O
performed	O
on	O
any	O
numbered	O
register	B-General_Concept
,	O
but	O
bi-operand	O
arithmetic	O
operations	O
always	O
involve	O
W	O
(	O
the	O
accumulator	B-General_Concept
)	O
,	O
writing	O
the	O
result	O
back	O
to	O
either	O
W	O
or	O
the	O
other	O
operand	O
register	B-General_Concept
.	O
</s>
<s>
To	O
load	O
a	O
constant	O
,	O
it	O
is	O
necessary	O
to	O
load	O
it	O
into	O
W	O
before	O
it	O
can	B-Protocol
be	O
moved	O
into	O
another	O
register	B-General_Concept
.	O
</s>
<s>
On	O
the	O
older	O
cores	O
,	O
all	O
register	B-General_Concept
moves	O
needed	O
to	O
pass	O
through	O
W	O
,	O
but	O
this	O
changed	O
on	O
the	O
"	O
high-end	O
"	O
cores	O
.	O
</s>
<s>
Because	O
cores	O
before	O
PIC18	O
had	O
only	O
unconditional	B-General_Concept
branch	I-General_Concept
instructions	I-General_Concept
,	O
conditional	B-General_Concept
jumps	I-General_Concept
are	O
implemented	O
by	O
a	O
conditional	O
skip	O
(	O
with	O
the	O
opposite	O
condition	O
)	O
followed	O
by	O
an	O
unconditional	B-General_Concept
branch	I-General_Concept
.	O
</s>
<s>
For	O
example	O
,	O
the	O
instruction	O
sequence	O
"	O
skip	O
if	O
A	O
;	O
skip	O
if	O
B	O
;	O
C	B-Language
"	O
will	O
execute	O
C	B-Language
if	O
A	O
is	O
true	O
or	O
if	O
B	O
is	O
false	O
.	O
</s>
<s>
The	O
PIC18	O
series	O
implemented	O
shadow	O
registers	O
:	O
these	O
are	O
registers	O
which	O
save	O
several	O
important	O
registers	O
during	O
an	O
interrupt	B-Application
,	O
providing	O
hardware	O
support	O
for	O
automatically	O
saving	O
processor	O
state	O
when	O
servicing	O
interrupts	B-Application
.	O
</s>
<s>
Operation	O
on	O
working	B-General_Concept
register	I-General_Concept
(	O
WREG	O
)	O
with	O
8-bit	O
immediate	O
(	O
"	O
literal	O
"	O
)	O
operand	O
.	O
</s>
<s>
One	O
instruction	O
peculiar	O
to	O
the	O
PIC	O
is	O
retlw	O
,	O
load	O
immediate	O
into	O
WREG	O
and	O
return	O
,	O
which	O
is	O
used	O
with	O
computed	O
branches	O
to	O
produce	O
lookup	B-Data_Structure
tables	I-Data_Structure
.	O
</s>
<s>
Operation	O
with	O
WREG	O
and	O
indexed	O
register	B-General_Concept
.	O
</s>
<s>
The	O
result	O
can	B-Protocol
be	O
written	O
to	O
either	O
the	O
working	B-General_Concept
register	I-General_Concept
(	O
e.g.	O
</s>
<s>
or	O
the	O
selected	O
register	B-General_Concept
(	O
e.g.	O
</s>
<s>
These	O
take	O
a	O
register	B-General_Concept
number	O
and	O
a	O
bit	O
number	O
,	O
and	O
perform	O
one	O
of	O
4	O
actions	O
:	O
set	O
or	O
clear	O
a	O
bit	O
,	O
and	O
test	O
and	O
skip	O
on	O
set/clear	O
.	O
</s>
<s>
The	O
latter	O
are	O
used	O
to	O
perform	O
conditional	B-General_Concept
branches	I-General_Concept
.	O
</s>
<s>
The	O
usual	O
ALU	O
status	O
flags	O
are	O
available	O
in	O
a	O
numbered	O
register	B-General_Concept
so	O
operations	O
such	O
as	O
"	O
branch	B-General_Concept
on	O
carry	O
clear	O
"	O
are	O
possible	O
.	O
</s>
<s>
The	O
Harvard	B-Architecture
architecture	I-Architecture
,	O
in	O
which	O
instructions	O
and	O
data	B-General_Concept
come	O
from	O
separate	O
sources	O
,	O
simplifies	O
timing	O
and	O
microcircuit	O
design	O
greatly	O
,	O
and	O
this	O
benefits	O
clock	O
speed	O
,	O
price	O
,	O
and	O
power	O
consumption	O
.	O
</s>
<s>
The	O
PIC	O
instruction	O
set	O
is	O
suited	O
to	O
implementation	O
of	O
fast	O
lookup	B-Data_Structure
tables	I-Data_Structure
in	O
the	O
program	O
space	O
.	O
</s>
<s>
Such	O
lookups	B-Data_Structure
take	O
one	O
instruction	O
and	O
two	O
instruction	O
cycles	O
.	O
</s>
<s>
Many	O
functions	O
can	B-Protocol
be	O
modeled	O
in	O
this	O
way	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
branch	B-General_Concept
instruction	I-General_Concept
's	O
target	O
may	O
be	O
indexed	O
by	O
W	O
,	O
and	O
execute	O
a	O
"	O
RETLW	O
"	O
,	O
which	O
does	O
as	O
it	O
is	O
named	O
return	O
with	O
literal	O
in	O
W	O
.	O
</s>
<s>
Interrupt	B-Application
latency	O
is	O
constant	O
at	O
three	O
instruction	O
cycles	O
.	O
</s>
<s>
External	O
interrupts	B-Application
have	O
to	O
be	O
synchronized	O
with	O
the	O
four-clock	O
instruction	O
cycle	O
,	O
otherwise	O
there	O
can	B-Protocol
be	O
a	O
one	O
instruction	O
cycle	O
jitter	O
.	O
</s>
<s>
Internal	O
interrupts	B-Application
are	O
already	O
synchronized	O
.	O
</s>
<s>
The	O
constant	O
interrupt	B-Application
latency	O
allows	O
PICs	O
to	O
achieve	O
interrupt-driven	O
low-jitter	O
timing	O
sequences	O
.	O
</s>
<s>
This	O
is	O
no	O
longer	O
true	O
in	O
the	O
newest	O
PIC	O
models	O
,	O
because	O
they	O
have	O
a	O
synchronous	O
interrupt	B-Application
latency	O
of	O
three	O
or	O
four	O
cycles	O
.	O
</s>
<s>
Availability	O
of	O
processors	O
in	O
DIL	B-Algorithm
package	I-Algorithm
makes	O
them	O
easy	O
to	O
handle	O
for	O
hobby	O
use	O
.	O
</s>
<s>
Operations	O
and	O
registers	O
are	O
not	O
orthogonal	O
;	O
some	O
instructions	O
can	B-Protocol
address	O
RAM	B-Architecture
and/or	O
immediate	O
constants	O
,	O
while	O
others	O
can	B-Protocol
use	O
the	O
accumulator	B-General_Concept
only	O
.	O
</s>
<s>
The	O
following	O
stack	B-Application
limitations	O
have	O
been	O
addressed	O
in	O
the	O
PIC18	O
series	O
,	O
but	O
still	O
apply	O
to	O
earlier	O
cores	O
:	O
</s>
<s>
With	O
paged	O
program	B-Device
memory	I-Device
,	O
there	O
are	O
two	O
page	O
sizes	O
to	O
worry	O
about	O
:	O
one	O
for	O
CALL	O
and	O
GOTO	O
and	O
another	O
for	O
computed	O
GOTO	O
(	O
typically	O
used	O
for	O
table	B-Data_Structure
lookups	I-Data_Structure
)	O
.	O
</s>
<s>
For	O
example	O
,	O
on	O
PIC16	B-Architecture
,	O
CALL	O
and	O
GOTO	O
have	O
11	O
bits	O
of	O
addressing	O
,	O
so	O
the	O
page	O
size	O
is	O
2048	O
instruction	B-Language
words	I-Language
.	O
</s>
<s>
For	O
computed	O
GOTOs	O
,	O
where	O
you	O
add	O
to	O
PCL	O
,	O
the	O
page	O
size	O
is	O
256	O
instruction	B-Language
words	I-Language
.	O
</s>
<s>
In	O
both	O
cases	O
,	O
the	O
upper	O
address	O
bits	O
are	O
provided	O
by	O
the	O
PCLATH	O
register	B-General_Concept
.	O
</s>
<s>
This	O
register	B-General_Concept
must	O
be	O
changed	O
every	O
time	O
control	O
transfers	O
between	O
pages	O
.	O
</s>
<s>
PCLATH	O
must	O
also	O
be	O
preserved	O
by	O
any	O
interrupt	B-Application
handler	O
.	O
</s>
<s>
While	O
several	O
commercial	O
compilers	B-Language
are	O
available	O
,	O
in	O
2008	O
,	O
Microchip	O
released	O
their	O
own	O
C	B-Language
compilers	B-Language
,	O
C18	O
and	O
C30	O
,	O
for	O
the	O
line	O
of	O
18F	O
24F	O
and	O
30/33F	O
processors	O
.	O
</s>
<s>
As	O
of	O
2013	O
,	O
Microchip	O
offers	O
their	O
XC	O
series	O
of	O
compilers	B-Language
,	O
for	O
use	O
with	O
MPLAB	B-Application
X	I-Application
.	O
</s>
<s>
Microchip	O
will	O
eventually	O
phase	O
out	O
its	O
older	O
compilers	B-Language
,	O
such	O
as	O
C18	O
,	O
and	O
recommends	O
using	O
their	O
XC	O
series	O
compilers	B-Language
for	O
new	O
designs	O
.	O
</s>
<s>
The	O
RISC	B-Architecture
instruction	I-Architecture
set	I-Architecture
of	O
the	O
PIC	O
assembly	B-Language
language	I-Language
code	O
can	B-Protocol
make	O
the	O
overall	O
flow	O
difficult	O
to	O
comprehend	O
.	O
</s>
<s>
Judicious	O
use	O
of	O
simple	O
macros	O
can	B-Protocol
increase	O
the	O
readability	O
of	O
PIC	O
assembly	B-Language
language	I-Language
.	O
</s>
<s>
For	O
example	O
,	O
the	O
original	O
Parallax	O
PIC	O
assembler	B-Language
(	O
"	O
SPASM	O
"	O
)	O
has	O
macros	O
,	O
which	O
hide	O
W	O
and	O
make	O
the	O
PIC	O
look	O
like	O
a	O
two-address	O
machine	O
.	O
</s>
<s>
It	O
has	O
macro	O
instructions	O
like	O
mov	O
b	O
,	O
a	O
(	O
move	O
the	O
data	B-General_Concept
from	O
address	O
a	O
to	O
address	O
b	O
)	O
and	O
add	O
b	O
,	O
a	O
(	O
add	O
data	B-General_Concept
from	O
address	O
a	O
to	O
data	B-General_Concept
in	O
address	O
b	O
)	O
.	O
</s>
<s>
It	O
also	O
hides	O
the	O
skip	O
instructions	O
by	O
providing	O
three-operand	O
branch	B-General_Concept
macro	O
instructions	O
,	O
such	O
as	O
cjne	O
a	O
,	O
b	O
,	O
dest	O
(	O
compare	O
a	O
with	O
b	O
and	O
jump	O
to	O
dest	O
if	O
they	O
are	O
not	O
equal	O
)	O
.	O
</s>
<s>
The	O
first	O
generation	O
of	O
PICs	O
with	O
EPROM	B-General_Concept
storage	O
have	O
been	O
almost	O
completely	O
replaced	O
by	O
chips	O
with	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
Likewise	O
,	O
the	O
original	O
12-bit	B-Device
instruction	O
set	O
of	O
the	O
PIC1650	O
and	O
its	O
direct	O
descendants	O
has	O
been	O
superseded	O
by	O
14-bit	O
and	O
16-bit	B-Device
instruction	O
sets	O
.	O
</s>
<s>
Microchip	O
still	O
sells	O
OTP	B-General_Concept
(	O
one-time-programmable	O
)	O
and	O
windowed	O
(	O
UV-erasable	O
)	O
versions	O
of	O
some	O
of	O
its	O
EPROM	B-General_Concept
based	O
PICs	O
for	O
legacy	O
support	O
or	O
volume	O
orders	O
.	O
</s>
<s>
The	O
Microchip	O
website	O
lists	O
PICs	O
that	O
are	O
not	O
electrically	O
erasable	O
as	O
OTP	B-General_Concept
.	O
</s>
<s>
UV	O
erasable	O
windowed	O
versions	O
of	O
these	O
chips	O
can	B-Protocol
be	O
ordered	O
.	O
</s>
<s>
The	O
F	O
in	O
a	O
PICMicro	B-Architecture
part	O
number	O
generally	O
indicates	O
the	O
PICmicro	B-Architecture
uses	O
flash	B-Device
memory	I-Device
and	O
can	B-Protocol
be	O
erased	O
electronically	O
.	O
</s>
<s>
Conversely	O
,	O
a	O
C	B-Language
generally	O
means	O
it	O
can	B-Protocol
only	O
be	O
erased	O
by	O
exposing	O
the	O
die	O
to	O
ultraviolet	O
light	O
(	O
which	O
is	O
only	O
possible	O
if	O
a	O
windowed	O
package	O
style	O
is	O
used	O
)	O
.	O
</s>
<s>
An	O
exception	O
to	O
this	O
rule	O
is	O
the	O
PIC16C84	B-Device
,	O
which	O
uses	O
EEPROM	B-General_Concept
and	O
is	O
therefore	O
electrically	O
erasable	O
.	O
</s>
<s>
These	O
parts	O
are	O
also	O
uniquely	O
I/O	B-General_Concept
tolerant	O
as	O
they	O
will	O
accept	O
up	O
to	O
5V	O
as	O
inputs	O
.	O
</s>
<s>
Microchip	O
provides	O
a	O
freeware	B-License
IDE	B-Application
package	O
called	O
MPLAB	B-Application
X	I-Application
,	O
which	O
includes	O
an	O
assembler	B-Language
,	O
linker	O
,	O
software	O
simulator	O
,	O
and	O
debugger	O
.	O
</s>
<s>
They	O
also	O
sell	O
C	B-Language
compilers	B-Language
for	O
the	O
PIC10	B-Architecture
,	O
PIC12	B-Architecture
,	O
PIC16	B-Architecture
,	O
PIC18	O
,	O
PIC24	O
,	O
PIC32	O
and	O
dsPIC	O
,	O
which	O
integrate	O
cleanly	O
with	O
MPLAB	B-Application
X	I-Application
.	O
</s>
<s>
Free	O
versions	O
of	O
the	O
C	B-Language
compilers	B-Language
are	O
also	O
available	O
with	O
all	O
features	O
.	O
</s>
<s>
Several	O
third	O
parties	O
develop	O
C	B-Language
language	I-Language
compilers	B-Language
for	O
PICs	O
,	O
many	O
of	O
which	O
integrate	O
to	O
MPLAB	B-Application
and/or	O
feature	O
their	O
own	O
IDE	B-Application
.	O
</s>
<s>
A	O
fully	O
featured	O
compiler	B-Language
for	O
the	O
PICBASIC	O
language	O
to	O
program	O
PIC	B-Architecture
microcontrollers	I-Architecture
is	O
available	O
from	O
meLabs	O
,	O
Inc	O
.	O
Mikroelektronika	O
offers	O
PIC	O
compilers	B-Language
in	O
C	B-Language
,	O
BASIC	O
and	O
Pascal	O
programming	O
languages	O
.	O
</s>
<s>
A	O
graphical	O
programming	O
language	O
,	O
Flowcode	B-Application
,	O
exists	O
capable	O
of	O
programming	O
8	O
-	O
and	O
16-bit	B-Device
PIC	O
devices	O
and	O
generating	O
PIC-compatible	O
C	B-Language
code	O
.	O
</s>
<s>
The	O
Proteus	B-Algorithm
Design	I-Algorithm
Suite	I-Algorithm
is	O
able	O
to	O
simulate	O
many	O
of	O
the	O
popular	O
8	O
and	O
16-bit	B-Device
PIC	O
devices	O
along	O
with	O
other	O
circuitry	O
that	O
is	O
connected	O
to	O
the	O
PIC	O
on	O
the	O
schematic	O
.	O
</s>
<s>
The	O
program	O
to	O
be	O
simulated	O
can	B-Protocol
be	O
developed	O
within	O
Proteus	B-Algorithm
itself	O
,	O
MPLAB	B-Application
or	O
any	O
other	O
development	O
tool	O
.	O
</s>
<s>
Devices	O
called	O
"	O
programmers	B-General_Concept
"	O
are	O
traditionally	O
used	O
to	O
get	O
program	O
code	O
into	O
the	O
target	O
PIC	O
.	O
</s>
<s>
Most	O
PICs	O
that	O
Microchip	O
currently	O
sells	O
feature	O
ICSP	B-Device
(	O
in-circuit	B-Device
serial	I-Device
programming	I-Device
)	O
and/or	O
LVP	O
(	O
low-voltage	O
programming	O
)	O
capabilities	O
,	O
allowing	O
the	O
PIC	O
to	O
be	O
programmed	O
while	O
it	O
is	O
sitting	O
in	O
the	O
target	O
circuit	O
.	O
</s>
<s>
Microchip	O
offers	O
programmers/debuggers	O
under	O
the	O
MPLAB	B-Application
and	O
PICKit	B-Device
series	O
.	O
</s>
<s>
MPLAB	B-Application
ICD4	O
and	O
MPLAB	B-Device
REAL	I-Device
ICE	I-Device
are	O
the	O
current	O
programmers	B-General_Concept
and	O
debuggers	O
for	O
professional	O
engineering	O
,	O
while	O
PICKit	B-Device
3	O
is	O
a	O
low-cost	O
programmer	B-General_Concept
/	O
debugger	O
line	O
for	O
hobbyists	O
and	O
students	O
.	O
</s>
<s>
Many	O
of	O
the	O
higher	O
end	O
flash	O
based	O
PICs	O
can	B-Protocol
also	O
self-program	O
(	O
write	O
to	O
their	O
own	O
program	B-Device
memory	I-Device
)	O
,	O
a	O
process	O
known	O
as	O
bootloading	O
.	O
</s>
<s>
Demo	O
boards	O
are	O
available	O
with	O
a	O
small	O
factory-programmed	O
bootloader	O
that	O
can	B-Protocol
be	O
used	O
to	O
load	O
user	O
programs	O
over	O
an	O
interface	O
such	O
as	O
RS-232	O
or	O
USB	B-Protocol
,	O
thus	O
obviating	O
the	O
need	O
for	O
a	O
programmer	B-General_Concept
device	O
.	O
</s>
<s>
Alternatively	O
there	O
is	O
bootloader	O
firmware	O
available	O
that	O
the	O
user	O
can	B-Protocol
load	O
onto	O
the	O
PIC	O
using	O
ICSP	B-Device
.	O
</s>
<s>
After	O
programming	O
the	O
bootloader	O
onto	O
the	O
PIC	O
,	O
the	O
user	O
can	B-Protocol
then	O
reprogram	O
the	O
device	O
using	O
RS232	O
or	O
USB	B-Protocol
,	O
in	O
conjunction	O
with	O
specialized	O
computer	O
software	O
.	O
</s>
<s>
The	O
advantages	O
of	O
a	O
bootloader	O
over	O
ICSP	B-Device
is	O
faster	O
programming	O
speeds	O
,	O
immediate	O
program	O
execution	O
following	O
programming	O
,	O
and	O
the	O
ability	O
to	O
both	O
debug	O
and	O
program	O
using	O
the	O
same	O
cable	O
.	O
</s>
<s>
There	O
are	O
many	O
programmers	B-General_Concept
for	O
PIC	B-Architecture
microcontrollers	I-Architecture
,	O
ranging	O
from	O
the	O
extremely	O
simple	O
designs	O
which	O
rely	O
on	O
ICSP	B-Device
to	O
allow	O
direct	O
download	O
of	O
code	O
from	O
a	O
host	O
computer	O
,	O
to	O
intelligent	O
programmers	B-General_Concept
that	O
can	B-Protocol
verify	O
the	O
device	O
at	O
several	O
supply	O
voltages	O
.	O
</s>
<s>
Many	O
of	O
these	O
complex	O
programmers	B-General_Concept
use	O
a	O
pre-programmed	O
PIC	O
themselves	O
to	O
send	O
the	O
programming	O
commands	O
to	O
the	O
PIC	O
that	O
is	O
to	O
be	O
programmed	O
.	O
</s>
<s>
The	O
intelligent	O
type	O
of	O
programmer	B-General_Concept
is	O
needed	O
to	O
program	O
earlier	O
PIC	O
models	O
(	O
mostly	O
EPROM	B-General_Concept
type	O
)	O
which	O
do	O
not	O
support	O
in-circuit	B-Device
programming	I-Device
.	O
</s>
<s>
Third	O
party	O
programmers	B-General_Concept
range	O
from	O
plans	O
to	O
build	O
your	O
own	O
,	O
to	O
self-assembly	O
kits	O
and	O
fully	O
tested	O
ready-to-go	O
units	O
.	O
</s>
<s>
Some	O
are	O
simple	O
designs	O
which	O
require	O
a	O
PC	O
to	O
do	O
the	O
low-level	O
programming	O
signalling	O
(	O
these	O
typically	O
connect	O
to	O
the	O
serial	B-Protocol
or	O
parallel	B-Device
port	I-Device
and	O
consist	O
of	O
a	O
few	O
simple	O
components	O
)	O
,	O
while	O
others	O
have	O
the	O
programming	O
logic	O
built	O
into	O
them	O
(	O
these	O
typically	O
use	O
a	O
serial	B-Protocol
or	O
USB	B-Protocol
connection	O
,	O
are	O
usually	O
faster	O
,	O
and	O
are	O
often	O
built	O
using	O
PICs	O
themselves	O
for	O
control	O
)	O
.	O
</s>
<s>
All	O
newer	O
PIC	O
devices	O
feature	O
an	O
ICD	O
(	O
in-circuit	O
debugging	O
)	O
interface	O
,	O
built	O
into	O
the	O
CPU	O
core	O
,	O
that	O
allows	O
for	O
interactive	O
debugging	O
of	O
the	O
program	O
in	O
conjunction	O
with	O
MPLAB	B-Application
IDE	B-Application
.	O
</s>
<s>
MPLAB	B-Device
ICD	I-Device
and	O
MPLAB	B-Device
REAL	I-Device
ICE	I-Device
debuggers	O
can	B-Protocol
communicate	O
with	O
this	O
interface	O
using	O
the	O
ICSP	B-Device
interface	O
.	O
</s>
<s>
This	O
debugging	O
system	O
comes	O
at	O
a	O
price	O
however	O
,	O
namely	O
limited	O
breakpoint	O
count	O
(	O
1	O
on	O
older	O
devices	O
,	O
3	O
on	O
newer	O
devices	O
)	O
,	O
loss	O
of	O
some	O
I/O	B-General_Concept
(	O
with	O
the	O
exception	O
of	O
some	O
surface	O
mount	O
44-pin	O
PICs	O
which	O
have	O
dedicated	O
lines	O
for	O
debugging	O
)	O
and	O
loss	O
of	O
some	O
on-chip	O
features	O
.	O
</s>
<s>
Microchip	O
offers	O
three	O
full	O
in-circuit	B-Application
emulators	I-Application
:	O
the	O
MPLAB	B-Device
ICE2000	I-Device
(	O
parallel	B-Device
interface	I-Device
,	O
a	O
USB	B-Protocol
converter	O
is	O
available	O
)	O
;	O
the	O
newer	O
MPLAB	B-Device
ICE4000	I-Device
(	O
USB	B-Protocol
2.0	O
connection	O
)	O
;	O
and	O
most	O
recently	O
,	O
the	O
REAL	B-Device
ICE	I-Device
(	O
USB	B-Protocol
2.0	O
connection	O
)	O
.	O
</s>
<s>
All	O
such	O
tools	O
are	O
typically	O
used	O
in	O
conjunction	O
with	O
MPLAB	B-Application
IDE	B-Application
for	O
source-level	O
interactive	O
debugging	O
of	O
code	O
running	O
on	O
the	O
target	O
.	O
</s>
<s>
PIC	O
projects	O
may	O
utilize	O
real-time	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
such	O
as	O
FreeRTOS	B-Operating_System
,	O
AVIX	O
RTOS	B-Operating_System
,	O
uRTOS	O
,	O
Salvo	O
RTOS	B-Operating_System
or	O
other	O
similar	O
libraries	O
for	O
task	O
scheduling	O
and	O
prioritization	O
.	O
</s>
<s>
An	O
open	O
source	O
project	O
by	O
Serge	O
Vakulenko	O
adapts	O
2.11BSD	B-Operating_System
to	O
the	O
PIC32	O
architecture	O
,	O
under	O
the	O
name	O
RetroBSD	O
.	O
</s>
<s>
This	O
brings	O
a	O
familiar	O
Unix-like	O
operating	O
system	O
,	O
including	O
an	O
onboard	O
development	O
environment	O
,	O
to	O
the	O
microcontroller	B-Architecture
,	O
within	O
the	O
constraints	O
of	O
the	O
onboard	O
hardware	O
.	O
</s>
<s>
Parallax	O
produced	O
a	O
series	O
of	O
PICmicro-like	O
microcontrollers	B-Architecture
known	O
as	O
the	O
Parallax	B-Device
SX	I-Device
.	O
</s>
<s>
Designed	O
to	O
be	O
architecturally	O
similar	O
to	O
the	O
PIC	B-Architecture
microcontrollers	I-Architecture
used	O
in	O
the	O
original	O
versions	O
of	O
the	O
BASIC	B-Language
Stamp	I-Language
,	O
SX	O
microcontrollers	B-Architecture
replaced	O
the	O
PIC	O
in	O
several	O
subsequent	O
versions	O
of	O
that	O
product	O
.	O
</s>
<s>
Parallax	O
's	O
SX	O
are	O
8-bit	O
RISC	B-Architecture
microcontrollers	B-Architecture
,	O
using	O
a	O
12-bit	B-Device
instruction	B-Language
word	I-Language
,	O
which	O
run	O
fast	O
at	O
75MHz	O
(	O
75	O
MIPS	B-Device
)	O
.	O
</s>
<s>
They	O
include	O
up	O
to	O
4096	O
12-bit	B-Device
words	O
of	O
flash	B-Device
memory	I-Device
and	O
up	O
to	O
262	O
bytes	O
of	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
,	O
an	O
eight	O
bit	O
counter	O
and	O
other	O
support	O
logic	O
.	O
</s>
<s>
There	O
are	O
software	O
library	O
modules	O
to	O
emulate	O
I²C	O
and	O
SPI	B-Architecture
interfaces	I-Architecture
,	O
UARTs	O
,	O
frequency	O
generators	O
,	O
measurement	O
counters	O
and	O
PWM	B-Algorithm
and	O
sigma-delta	O
A/D	O
converters	O
.	O
</s>
<s>
Other	O
interfaces	O
are	O
relatively	O
easy	O
to	O
write	O
,	O
and	O
existing	O
modules	O
can	B-Protocol
be	O
modified	O
to	O
get	O
new	O
features	O
.	O
</s>
<s>
Russian	O
PKK	O
Milandr	O
produces	O
microcontrollers	B-Architecture
using	O
the	O
PIC17	O
architecture	O
as	O
the	O
1886	O
series	O
.	O
</s>
<s>
Program	B-Device
memory	I-Device
consists	O
of	O
up	O
to	O
64kB	O
Flash	B-Device
memory	I-Device
in	O
the	O
1886VE2U	O
(	O
)	O
or	O
8kB	O
EEPROM	B-General_Concept
in	O
the	O
1886VE5U	O
(	O
1886ВЕ5У	O
)	O
.	O
</s>
<s>
The	O
1886VE5U	O
(	O
1886ВЕ5У	O
)	O
through	O
1886VE7U	O
(	O
1886ВЕ7У	O
)	O
are	O
specified	O
for	O
the	O
military	O
temperature	O
range	O
of	O
-60	O
°C	O
to	O
+125°C	O
.	O
</s>
<s>
Hardware	O
interfaces	O
in	O
the	O
various	O
parts	O
include	O
USB	B-Protocol
,	O
CAN	B-Protocol
,	O
I2C	O
,	O
SPI	B-Architecture
,	O
as	O
well	O
as	O
A/D	O
and	O
D/A	O
converters	O
.	O
</s>
<s>
The	O
1886VE3U	O
(	O
1886ВЕ3У	O
)	O
contains	O
a	O
hardware	O
accelerator	O
for	O
cryptographic	O
functions	O
according	O
to	O
GOST	B-Algorithm
28147-89	I-Algorithm
.	O
</s>
<s>
ELAN	O
Microelectronics	O
Corp	O
.	O
in	O
Taiwan	O
make	O
a	O
line	O
of	O
microcontrollers	B-Architecture
based	O
on	O
the	O
PIC16	B-Architecture
architecture	O
,	O
with	O
13-bit	O
instructions	O
and	O
a	O
smaller	O
(	O
6-bit	O
)	O
RAM	B-Architecture
address	O
space	O
.	O
</s>
<s>
Holtek	O
Semiconductor	O
make	O
a	O
large	O
number	O
of	O
very	O
cheap	O
microcontrollers	B-Architecture
(	O
as	O
low	O
as	O
8.5	O
cents	O
in	O
quantity	O
)	O
with	O
a	O
14-bit	O
instruction	O
set	O
strikingly	O
similar	O
to	O
the	O
PIC16	B-Architecture
.	O
</s>
<s>
Many	O
ultra-low-cost	O
OTP	B-General_Concept
microcontrollers	B-Architecture
from	O
Asian	O
manufacturers	O
,	O
found	O
in	O
low-cost	O
consumer	O
electronics	O
are	O
based	O
on	O
the	O
PIC	O
architecture	O
or	O
modified	O
form	O
.	O
</s>
