<s>
PCI	B-Architecture
configuration	I-Architecture
space	I-Architecture
is	O
the	O
underlying	O
way	O
that	O
the	O
Conventional	B-Protocol
PCI	I-Protocol
,	O
PCI-X	O
and	O
PCI	B-Protocol
Express	O
perform	O
auto	O
configuration	O
of	O
the	O
cards	O
inserted	O
into	O
their	O
bus	B-General_Concept
.	O
</s>
<s>
PCI	B-Protocol
devices	O
have	O
a	O
set	O
of	O
registers	O
referred	O
to	O
as	O
configuration	O
space	O
and	O
PCI	B-Protocol
Express	O
introduces	O
extended	O
configuration	O
space	O
for	O
devices	O
.	O
</s>
<s>
Device	B-Application
drivers	I-Application
and	O
diagnostic	O
software	O
must	O
have	O
access	O
to	O
the	O
configuration	O
space	O
,	O
and	O
operating	B-General_Concept
systems	I-General_Concept
typically	O
use	O
APIs	B-General_Concept
to	O
allow	O
access	O
to	O
device	O
configuration	O
space	O
.	O
</s>
<s>
When	O
the	O
operating	B-General_Concept
system	I-General_Concept
does	O
not	O
have	O
access	O
methods	O
defined	O
or	O
APIs	B-General_Concept
for	O
memory	O
mapped	O
configuration	O
space	O
requests	O
,	O
the	O
driver	B-Application
or	O
diagnostic	O
software	O
has	O
the	O
burden	O
to	O
access	O
the	O
configuration	O
space	O
in	O
a	O
manner	O
that	O
is	O
compatible	O
with	O
the	O
operating	B-General_Concept
system	I-General_Concept
's	O
underlying	O
access	O
rules	O
.	O
</s>
<s>
In	O
all	O
systems	O
,	O
device	B-Application
drivers	I-Application
are	O
encouraged	O
to	O
use	O
APIs	B-General_Concept
provided	O
by	O
the	O
operating	B-General_Concept
system	I-General_Concept
to	O
access	O
the	O
configuration	O
space	O
of	O
the	O
device	O
.	O
</s>
<s>
One	O
of	O
the	O
major	O
improvements	O
the	O
PCI	B-Protocol
Local	I-Protocol
Bus	I-Protocol
had	O
over	O
other	O
I/O	O
architectures	O
was	O
its	O
configuration	O
mechanism	O
.	O
</s>
<s>
In	O
addition	O
to	O
the	O
normal	O
memory-mapped	O
and	O
I/O	O
port	O
spaces	O
,	O
each	O
device	O
function	O
on	O
the	O
bus	B-General_Concept
has	O
a	O
configuration	O
space	O
,	O
which	O
is	O
256	O
bytes	O
long	O
,	O
addressable	O
by	O
knowing	O
the	O
eight-bit	O
PCI	B-Protocol
bus	I-Protocol
,	O
five-bit	O
device	O
,	O
and	O
three-bit	O
function	O
numbers	O
for	O
the	O
device	O
(	O
commonly	O
referred	O
to	O
as	O
the	O
BDF	O
or	O
B/D/F	O
,	O
as	O
abbreviated	O
from	O
bus/device/function	O
)	O
.	O
</s>
<s>
A	O
single	O
PCI	B-Protocol
expansion	O
card	O
can	O
respond	O
as	O
a	O
device	O
and	O
must	O
implement	O
at	O
least	O
function	O
number	O
zero	O
.	O
</s>
<s>
In	O
order	O
to	O
allow	O
more	O
parts	O
of	O
configuration	O
space	O
to	O
be	O
standardized	O
without	O
conflicting	O
with	O
existing	O
uses	O
,	O
there	O
can	O
be	O
a	O
list	O
of	O
capabilities	O
defined	O
within	O
the	O
remaining	O
192	O
bytes	O
of	O
PCI	B-Architecture
configuration	I-Architecture
space	I-Architecture
.	O
</s>
<s>
PCI-X	O
2.0	O
and	O
PCI	B-Protocol
Express	O
introduced	O
an	O
extended	O
configuration	O
space	O
,	O
up	O
to	O
4096	O
bytes	O
.	O
</s>
<s>
The	O
Device	O
ID	O
(	O
DID	O
)	O
and	O
Vendor	O
ID	O
(	O
VID	O
)	O
registers	O
identify	O
the	O
device	O
(	O
such	O
as	O
an	O
IC	O
)	O
,	O
and	O
are	O
commonly	O
called	O
the	O
PCI	B-Architecture
ID	I-Architecture
.	O
</s>
<s>
The	O
16-bit	O
vendor	O
ID	O
is	O
allocated	O
by	O
the	O
PCI-SIG	O
.	O
</s>
<s>
That	O
is	O
,	O
Type	O
1	O
headers	O
for	O
Root	B-Architecture
Complex	I-Architecture
,	O
switches	O
,	O
and	O
bridges	O
.	O
</s>
<s>
This	O
should	O
normally	O
match	O
the	O
CPU	B-General_Concept
's	I-General_Concept
cache	I-General_Concept
line	O
size	O
,	O
but	O
the	O
correct	O
setting	O
is	O
system	O
dependent	O
.	O
</s>
<s>
This	O
register	O
does	O
not	O
apply	O
to	O
PCI	B-Protocol
Express	O
.	O
</s>
<s>
While	O
the	O
Vendor	O
ID	O
is	O
that	O
of	O
the	O
chipset	B-Device
manufacturer	O
,	O
the	O
Subsystem	O
Vendor	O
ID	O
is	O
that	O
of	O
the	O
card	O
manufacturer	O
.	O
</s>
<s>
As	O
an	O
example	O
,	O
in	O
the	O
case	O
of	O
wireless	B-General_Concept
network	I-General_Concept
cards	I-General_Concept
,	O
the	O
chip	O
manufacturer	O
might	O
be	O
Broadcom	O
or	O
Atheros	O
,	O
and	O
the	O
card	O
manufacturer	O
might	O
be	O
Netgear	O
or	O
D-Link	B-General_Concept
.	O
</s>
<s>
Generally	O
,	O
the	O
Vendor	O
IDDevice	O
ID	O
combination	O
designates	O
which	O
driver	B-Application
the	O
host	O
should	O
load	O
in	O
order	O
to	O
handle	O
the	O
device	O
,	O
as	O
all	O
cards	O
with	O
the	O
same	O
VID:DID	O
combination	O
can	O
be	O
handled	O
by	O
the	O
same	O
driver	B-Application
.	O
</s>
<s>
The	O
Subsystem	O
Vendor	O
IDSubsystem	O
ID	O
combination	O
identifies	O
the	O
card	O
,	O
which	O
is	O
the	O
kind	O
of	O
information	O
the	O
driver	B-Application
may	O
use	O
to	O
apply	O
a	O
minor	O
card-specific	O
change	O
in	O
its	O
operation	O
.	O
</s>
<s>
To	O
address	O
a	O
PCI	B-Protocol
device	O
,	O
it	O
must	O
be	O
enabled	O
by	O
being	O
mapped	O
into	O
the	O
system	O
's	O
I/O	O
port	O
address	O
space	O
or	O
memory-mapped	O
address	O
space	O
.	O
</s>
<s>
BIOS	B-Operating_System
)	O
or	O
the	O
operating	B-General_Concept
system	I-General_Concept
program	O
the	O
Base	O
Address	O
Registers	O
(	O
commonly	O
called	O
BARs	O
)	O
to	O
inform	O
the	O
device	O
of	O
its	O
resources	O
configuration	O
by	O
writing	O
configuration	O
commands	O
to	O
the	O
PCI	B-Protocol
controller	O
.	O
</s>
<s>
Because	O
all	O
PCI	B-Protocol
devices	O
are	O
in	O
an	O
inactive	O
state	O
upon	O
system	O
reset	O
,	O
they	O
will	O
have	O
no	O
addresses	O
assigned	O
to	O
them	O
by	O
which	O
the	O
operating	B-General_Concept
system	I-General_Concept
or	O
device	B-Application
drivers	I-Application
can	O
communicate	O
with	O
them	O
.	O
</s>
<s>
Either	O
the	O
BIOS	B-Operating_System
or	O
the	O
operating	B-General_Concept
system	I-General_Concept
geographically	O
addresses	O
the	O
PCI	B-Protocol
devices	O
(	O
for	O
example	O
,	O
the	O
first	O
PCI	B-Protocol
slot	I-Protocol
,	O
the	O
second	O
PCI	B-Protocol
slot	I-Protocol
,	O
the	O
third	O
PCI	B-Protocol
slot	I-Protocol
,	O
or	O
the	O
integrated	O
PCI	B-Protocol
devices	O
,	O
etc.	O
,	O
on	O
the	O
motherboard	B-Device
)	O
through	O
the	O
PCI	B-Protocol
controller	O
using	O
the	O
per	O
slot	O
or	O
per	O
device	O
IDSEL	O
(	O
Initialization	O
Device	O
Select	O
)	O
signals	O
.	O
</s>
<s>
When	O
the	O
computer	O
is	O
powered	O
on	O
,	O
the	O
PCI	O
bus(es )	O
and	O
device(s )	O
must	O
be	O
enumerated	O
by	O
BIOS	B-Operating_System
or	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
Bus	B-General_Concept
enumeration	O
is	O
performed	O
by	O
attempting	O
to	O
access	O
the	O
PCI	B-Architecture
configuration	I-Architecture
space	I-Architecture
registers	O
for	O
each	O
buses	O
,	O
devices	O
and	O
functions	O
.	O
</s>
<s>
Note	O
that	O
device	O
number	O
,	O
different	O
from	O
VID	O
and	O
DID	O
,	O
is	O
merely	O
a	O
device	O
's	O
sequential	O
number	O
on	O
that	O
bus	B-General_Concept
.	O
</s>
<s>
Moreover	O
,	O
after	O
a	O
new	O
bridge	O
is	O
detected	O
,	O
a	O
new	O
bus	B-General_Concept
number	O
is	O
defined	O
,	O
and	O
device	O
enumeration	O
restarts	O
at	O
device	O
number	O
zero	O
.	O
</s>
<s>
If	O
no	O
response	O
is	O
received	O
from	O
the	O
device	O
's	O
function	O
#0	O
,	O
the	O
bus	B-Architecture
master	I-Architecture
performs	O
an	O
abort	O
and	O
returns	O
an	O
all-bits-on	O
value	O
(	O
in	O
hexadecimal	O
)	O
,	O
which	O
is	O
an	O
invalid	O
VID/DID	O
value	O
,	O
thus	O
the	O
BIOS	B-Operating_System
or	O
operating	B-General_Concept
system	I-General_Concept
can	O
tell	O
that	O
the	O
specified	O
combination	O
bus/device_number/function	O
(	O
B/D/F	O
)	O
is	O
not	O
present	O
.	O
</s>
<s>
So	O
,	O
when	O
a	O
read	O
to	O
a	O
function	O
ID	O
of	O
zero	O
for	O
a	O
given	O
bus/device	O
causes	O
the	O
master	O
(	O
initiator	O
)	O
to	O
abort	O
,	O
it	O
must	O
then	O
be	O
presumed	O
that	O
no	O
working	O
device	O
exists	O
on	O
that	O
bus	B-General_Concept
because	O
devices	O
are	O
required	O
to	O
implement	O
function	O
number	O
zero	O
.	O
</s>
<s>
When	O
a	O
read	O
to	O
a	O
specified	O
B/D/F	O
combination	O
for	O
the	O
vendor	O
ID	O
register	O
succeeds	O
,	O
the	O
system	O
firmware	O
or	O
operating	B-General_Concept
system	I-General_Concept
knows	O
that	O
it	O
exists	O
;	O
it	O
writes	O
all	O
ones	O
to	O
its	O
BARs	O
and	O
reads	O
back	O
the	O
device	O
's	O
requested	O
memory	O
size	O
in	O
an	O
encoded	O
form	O
.	O
</s>
<s>
At	O
this	O
point	O
,	O
the	O
BIOS	B-Operating_System
or	O
operating	B-General_Concept
system	I-General_Concept
will	O
program	O
the	O
memory-mapped	O
addresses	O
and	O
I/O	O
port	O
addresses	O
into	O
the	O
device	O
's	O
BAR	O
configuration	O
registers	O
.	O
</s>
<s>
BIOS	B-Operating_System
or	O
operating	B-General_Concept
system	I-General_Concept
will	O
also	O
program	O
some	O
other	O
registers	O
of	O
the	O
PCI	B-Architecture
configuration	I-Architecture
space	I-Architecture
for	O
each	O
PCI	B-Protocol
device	O
,	O
e.g.	O
</s>
<s>
interrupt	B-General_Concept
request	I-General_Concept
.	O
</s>
<s>
This	O
automatic	O
device	O
discovery	O
and	O
address	O
space	O
assignment	O
is	O
how	O
plug	B-Device
and	I-Device
play	I-Device
is	O
implemented	O
.	O
</s>
<s>
If	O
a	O
PCI-to-PCI	O
bridge	O
is	O
found	O
,	O
the	O
system	O
must	O
assign	O
the	O
secondary	O
PCI	B-Protocol
bus	I-Protocol
beyond	O
the	O
bridge	O
a	O
bus	B-General_Concept
number	O
other	O
than	O
zero	O
,	O
and	O
then	O
enumerate	O
the	O
devices	O
on	O
that	O
secondary	O
bus	B-General_Concept
.	O
</s>
<s>
If	O
more	O
PCI	B-Protocol
bridges	I-Protocol
are	O
found	O
,	O
the	O
discovery	O
continues	O
recursively	O
until	O
all	O
possible	O
domain/bus/device	O
combinations	O
are	O
scanned	O
.	O
</s>
<s>
Each	O
non-bridge	O
PCI	B-Protocol
device	O
function	O
can	O
implement	O
up	O
to	O
6	O
BARs	O
,	O
each	O
of	O
which	O
can	O
respond	O
to	O
different	O
addresses	O
in	O
I/O	O
port	O
and	O
memory-mapped	O
address	O
space	O
.	O
</s>
<s>
A	O
PCI	B-Protocol
device	O
may	O
also	O
have	O
an	O
option	B-Device
ROM	I-Device
.	O
</s>
<s>
When	O
performing	O
a	O
Configuration	O
Space	O
access	O
,	O
a	O
PCI	B-Protocol
device	O
does	O
not	O
decode	O
the	O
address	O
to	O
determine	O
if	O
it	O
should	O
respond	O
,	O
but	O
instead	O
looks	O
at	O
the	O
Initialization	O
Device	O
Select	O
signal	O
(	O
IDSEL	O
)	O
.	O
</s>
<s>
The	O
PCI	B-Protocol
device	O
is	O
required	O
to	O
decode	O
only	O
the	O
lowest	O
order	O
11	O
bits	O
of	O
the	O
address	O
space	O
(	O
AD[10]	O
to	O
AD[0]	O
)	O
address/data	O
signals	O
,	O
and	O
can	O
ignore	O
decoding	O
the	O
21	O
high	O
order	O
A/D	O
signals	O
(	O
AD[31]	O
to	O
AD[11]	O
)	O
because	O
a	O
Configuration	O
Space	O
access	O
implementation	O
has	O
each	O
slot	O
's	O
IDSEL	O
pin	O
connected	O
to	O
a	O
different	O
high	O
order	O
address/data	O
line	O
AD[11]	O
through	O
AD[31]	O
.	O
</s>
<s>
The	O
IDSEL	O
signal	O
is	O
a	O
different	O
pin	O
for	O
each	O
PCI	B-Protocol
device/adapter/slot	O
.	O
</s>
<s>
To	O
configure	O
the	O
card	O
in	O
slot	O
n	O
,	O
the	O
PCI	B-Protocol
bus	I-Protocol
bridge	O
performs	O
a	O
configuration-space	O
access	O
cycle	O
with	O
the	O
PCI	B-Protocol
device	O
's	O
register	O
to	O
be	O
addressed	O
on	O
lines	O
AD[7:2]	O
(	O
AD[ 	O
1:0	O
]	O
are	O
always	O
zero	O
since	O
registers	O
are	O
double	O
words	O
(	O
32-bits	O
)	O
)	O
,	O
and	O
the	O
PCI	B-Protocol
function	O
number	O
specified	O
on	O
bits	O
AD[10:8],	O
with	O
all	O
higher-order	O
bits	O
zeros	O
except	O
for	O
AD[n+11]	O
being	O
used	O
as	O
the	O
IDSEL	O
signal	O
on	O
a	O
given	O
slot/device	O
.	O
</s>
<s>
To	O
reduce	O
electrically	O
loading	O
down	O
the	O
timing	O
critical	O
(	O
and	O
thus	O
electrically	O
loading	O
sensitive	O
)	O
AD[]	O
bus	B-General_Concept
,	O
the	O
IDSEL	O
signal	O
on	O
the	O
PCI	B-Protocol
slot	I-Protocol
connector	O
is	O
usually	O
connected	O
to	O
its	O
assigned	O
AD[n+11]	O
pin	O
through	O
a	O
resistor	O
.	O
</s>
<s>
This	O
causes	O
the	O
PCI	B-Protocol
's	O
IDSEL	O
signal	O
to	O
reach	O
its	O
active	O
condition	O
more	O
slowly	O
than	O
other	O
PCI	B-Protocol
bus	I-Protocol
signals	O
(	O
due	O
to	O
the	O
RC	O
time	O
constant	O
of	O
both	O
the	O
resistor	O
and	O
the	O
IDSEL	O
pin	O
's	O
input	O
capacitance	O
)	O
.	O
</s>
<s>
The	O
scanning	O
on	O
the	O
bus	B-General_Concept
is	O
performed	O
on	O
the	O
Intel	O
platform	O
by	O
accessing	O
two	O
defined	O
standardized	B-Device
ports	I-Device
.	O
</s>
<s>
The	O
legacy	O
method	O
was	O
present	O
in	O
the	O
original	O
PCI	B-Protocol
,	O
and	O
it	O
is	O
called	O
Configuration	O
Access	O
Mechanism	O
(	O
CAM	O
)	O
.	O
</s>
<s>
It	O
allows	O
for	O
256	O
bytes	O
of	O
a	O
device	O
's	O
address	O
space	O
to	O
be	O
reached	O
indirectly	O
via	O
two	O
32-bit	O
registers	O
called	O
PCI	B-Protocol
CONFIG_ADDRESS	O
and	O
PCI	B-Protocol
CONFIG_DATA	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
software	B-Application
driver	I-Application
(	O
firmware	O
,	O
OS	O
kernel	B-Operating_System
or	O
kernel	B-Application
driver	I-Application
)	O
can	O
use	O
these	O
registers	O
to	O
configure	O
a	O
PCI	B-Protocol
device	O
by	O
writing	O
the	O
address	O
of	O
the	O
device	O
's	O
register	O
into	O
CONFIG_ADDRESS	O
,	O
and	O
by	O
putting	O
the	O
data	O
that	O
is	O
supposed	O
to	O
be	O
written	O
to	O
the	O
device	O
into	O
CONFIG_DATA	O
.	O
</s>
<s>
As	O
explained	O
previously	O
,	O
addressing	O
a	O
device	O
via	O
Bus	B-General_Concept
,	O
Device	O
,	O
and	O
Function	O
(	O
BDF	O
)	O
is	O
also	O
referred	O
to	O
as	O
"	O
addressing	O
a	O
device	O
geographically.	O
"	O
</s>
<s>
See	O
arch/x86/pci/early.c	O
in	O
the	O
Linux	B-Operating_System
kernel	I-Operating_System
code	O
for	O
an	O
example	O
of	O
code	O
that	O
uses	O
geographical	O
addressing	O
.	O
</s>
<s>
The	O
second	O
method	O
was	O
created	O
for	O
PCI	B-Protocol
Express	O
.	O
</s>
<s>
It	O
extends	O
device	O
's	O
configuration	O
space	O
to	O
4KB	O
,	O
with	O
the	O
bottom	O
256	O
bytes	O
overlapping	O
the	O
original	O
(	O
legacy	O
)	O
configuration	O
space	O
in	O
PCI	B-Protocol
.	O
</s>
<s>
The	O
section	O
of	O
the	O
addressable	O
space	O
is	O
"	O
stolen	O
"	O
so	O
that	O
the	O
accesses	O
from	O
the	O
CPU	O
do	O
n't	O
go	O
to	O
memory	O
but	O
rather	O
reach	O
a	O
given	O
device	O
in	O
the	O
PCI	B-Protocol
Express	O
fabric	O
.	O
</s>
<s>
During	O
system	O
initialization	O
,	O
BIOS	B-Operating_System
determines	O
the	O
base	O
address	O
for	O
this	O
"	O
stolen	O
"	O
address	O
region	O
and	O
communicates	O
it	O
to	O
the	O
root	B-Architecture
complex	I-Architecture
and	O
to	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
Each	O
device	O
has	O
its	O
own	O
4KB	O
space	O
and	O
each	O
device	O
's	O
info	O
is	O
accessible	O
through	O
a	O
simple	O
array	O
dev[bus][device][function]	O
so	O
that	O
256MB	O
of	O
physical	O
contiguous	O
space	O
is	O
"	O
stolen	O
"	O
for	O
this	O
use	O
(	O
256	O
buses	O
×	O
32	O
devices	O
×	O
8	O
functions	O
×	O
4KB	O
=	O
256MB	O
)	O
.	O
</s>
