<s>
The	O
PA-7200	B-General_Concept
–	O
also	O
known	O
as	O
PCX-T	O
,	O
code-named	O
Thunderbird	O
–	O
,	O
is	O
a	O
microprocessor	B-Architecture
that	O
implements	O
the	O
PA-RISC	B-Device
1.1	I-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
developed	O
by	O
Hewlett-Packard	O
(	O
HP	O
)	O
.	O
</s>
<s>
The	O
PA-7200	B-General_Concept
was	O
not	O
sold	O
openly	O
and	O
the	O
only	O
third-party	O
users	O
were	O
Convex	O
Computer	O
and	O
Stratus	B-General_Concept
Computer	I-General_Concept
,	O
both	O
members	O
of	O
the	O
Precision	O
RISC	O
Organization	O
(	O
PRO	O
)	O
.	O
</s>
<s>
It	O
was	O
developed	O
for	O
small	O
multiprocessing	B-Operating_System
systems	O
with	O
two	O
or	O
four	O
microprocessors	B-Architecture
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
was	O
first	O
described	O
at	O
the	O
Compcon	O
and	O
IEEE	O
International	O
Solid-State	O
Circuits	O
Conference	O
(	O
ISSCC	O
)	O
conferences	O
.	O
</s>
<s>
The	O
PA-7200	B-General_Concept
was	O
mostly	O
derived	O
from	O
the	O
PA-7100	B-General_Concept
and	O
was	O
improved	O
adding	O
a	O
second	O
integer	O
unit	O
,	O
enabling	O
it	O
to	O
issue	O
up	O
to	O
two	O
integer	O
instructions	O
per	O
cycle	O
.	O
</s>
<s>
The	O
PA-7200	B-General_Concept
contained	O
1.3	O
million	O
transistors	B-Application
and	O
measured	O
14.0mm	O
by	O
15.0mm	O
(	O
210mm2	O
)	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
uses	O
an	O
unusual	O
4.4	O
V	O
power	O
supply	O
as	O
a	O
result	O
of	O
its	O
development	O
.	O
</s>
<s>
It	O
was	O
designed	O
in	O
the	O
0.8µm	O
CMOS26B	O
process	O
and	O
leveraged	O
circuits	O
and	O
layouts	O
from	O
the	O
PA-7100	B-General_Concept
,	O
which	O
was	O
also	O
designed	O
for	O
CMOS26B	O
.	O
</s>
<s>
A	O
3.3	O
V	O
power	O
supply	O
did	O
not	O
enable	O
the	O
microprocessor	B-Architecture
to	O
achieve	O
the	O
intended	O
clock	O
frequency	O
,	O
so	O
4.4	O
V	O
was	O
chosen	O
as	O
a	O
compromise	O
.	O
</s>
