<s>
In	O
computer	O
engineering	O
,	O
an	O
orthogonal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
is	O
an	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
where	O
all	O
instruction	O
types	O
can	O
use	O
all	O
addressing	B-Language
modes	I-Language
.	O
</s>
<s>
It	O
is	O
"	O
orthogonal	B-Application
"	O
in	O
the	O
sense	O
that	O
the	O
instruction	O
type	O
and	O
the	O
addressing	B-Language
mode	I-Language
vary	O
independently	O
.	O
</s>
<s>
An	O
orthogonal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
does	O
not	O
impose	O
a	O
limitation	O
that	O
requires	O
a	O
certain	O
instruction	O
to	O
use	O
a	O
specific	O
register	O
so	O
there	O
is	O
little	O
overlapping	O
of	O
instruction	O
functionality	O
.	O
</s>
<s>
Orthogonality	B-Application
was	O
considered	O
a	O
major	O
goal	O
for	O
processor	O
designers	O
in	O
the	O
1970s	O
,	O
and	O
the	O
VAX-11	B-Device
is	O
often	O
used	O
as	O
the	O
benchmark	O
for	O
this	O
concept	O
.	O
</s>
<s>
However	O
,	O
the	O
introduction	O
of	O
RISC	B-Architecture
design	O
philosophies	O
in	O
the	O
1980s	O
significantly	O
reversed	O
the	O
trend	O
against	O
more	O
orthogonality	B-Application
.	O
</s>
<s>
Modern	O
CPUs	O
often	O
simulate	O
orthogonality	B-Application
in	O
a	O
preprocessing	O
step	O
before	O
performing	O
the	O
actual	O
tasks	O
in	O
a	O
RISC-like	O
core	O
.	O
</s>
<s>
This	O
"	O
simulated	O
orthogonality	B-Application
"	O
in	O
general	O
is	O
a	O
broader	O
concept	O
,	O
encompassing	O
the	O
notions	O
of	O
decoupling	B-Application
and	O
completeness	O
in	O
function	B-Library
libraries	I-Library
,	O
like	O
in	O
the	O
mathematical	B-Algorithm
concept	I-Algorithm
:	O
an	O
orthogonal	B-Algorithm
function	I-Algorithm
set	O
is	O
easy	O
to	O
use	O
as	O
a	O
basis	O
into	O
expanded	O
functions	O
,	O
ensuring	O
that	O
parts	O
do	O
n’t	O
affect	O
another	O
if	O
we	O
change	O
one	O
part	O
.	O
</s>
<s>
At	O
their	O
core	O
,	O
all	O
general	O
purpose	O
computers	O
work	O
in	O
the	O
same	O
underlying	O
fashion	O
;	O
data	O
stored	O
in	O
a	O
main	O
memory	O
is	O
read	O
by	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
into	O
a	O
fast	O
temporary	O
memory	O
(	O
e.g.	O
</s>
<s>
CPU	B-General_Concept
registers	I-General_Concept
)	O
,	O
acted	O
on	O
,	O
and	O
then	O
written	O
back	O
to	O
main	O
memory	O
.	O
</s>
<s>
While	O
being	O
worked	O
on	O
,	O
data	O
can	O
be	O
temporarily	O
held	O
in	O
processor	B-General_Concept
registers	I-General_Concept
,	O
scratchpad	O
values	O
that	O
can	O
be	O
accessed	O
very	O
quickly	O
.	O
</s>
<s>
In	O
early	O
computers	O
,	O
the	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
often	O
used	O
a	O
single	O
register	O
,	O
in	O
which	O
case	O
it	O
was	O
known	O
as	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
For	O
instance	O
,	O
an	O
ADD	O
address	O
instruction	O
would	O
cause	O
the	O
CPU	O
to	O
retrieve	O
the	O
number	O
in	O
memory	O
found	O
at	O
that	O
address	O
and	O
then	O
add	O
it	O
to	O
the	O
value	O
already	O
in	O
the	O
accumulator	B-General_Concept
.	O
</s>
<s>
In	O
this	O
case	O
,	O
the	O
program	O
would	O
have	O
to	O
load	O
the	O
value	O
5	O
into	O
the	O
accumulator	B-General_Concept
with	O
the	O
LOAD	O
address	O
instruction	O
,	O
use	O
the	O
ADD	O
address	O
instruction	O
pointing	O
to	O
the	O
address	O
for	O
the	O
4	O
,	O
and	O
finally	O
SAVE	O
address	O
to	O
store	O
the	O
result	O
,	O
9	O
,	O
back	O
to	O
another	O
memory	O
location	O
.	O
</s>
<s>
In	O
a	O
simple	O
two-address	O
format	O
of	O
instructions	O
,	O
there	O
is	O
no	O
way	O
to	O
change	O
the	O
address	O
,	O
so	O
1,000	O
additions	O
have	O
to	O
be	O
written	O
in	O
the	O
machine	B-Language
language	I-Language
.	O
</s>
<s>
ISAs	O
fix	O
this	O
problem	O
with	O
the	O
concept	O
of	O
indirect	B-Language
addressing	I-Language
,	O
in	O
which	O
the	O
address	O
of	O
the	O
next	O
point	O
of	O
data	O
is	O
not	O
a	O
constant	O
,	O
but	O
itself	O
held	O
in	O
memory	O
.	O
</s>
<s>
The	O
variety	O
of	O
addressing	B-Language
modes	I-Language
leads	O
to	O
a	O
profusion	O
of	O
slightly	O
different	O
instructions	O
.	O
</s>
<s>
Considering	O
a	O
one-address	O
ISA	O
,	O
for	O
even	O
a	O
single	O
instruction	O
,	O
ADD	O
,	O
we	O
now	O
have	O
many	O
possible	O
"	O
addressing	B-Language
modes	I-Language
"	O
:	O
</s>
<s>
This	O
can	O
be	O
used	O
in	O
a	O
one-address	O
format	O
if	O
a	O
single	O
address	B-General_Concept
register	I-General_Concept
is	O
used	O
.	O
</s>
<s>
Orthogonality	B-Application
is	O
the	O
principle	O
that	O
every	O
instruction	O
should	O
be	O
able	O
to	O
use	O
any	O
supported	O
addressing	B-Language
mode	I-Language
.	O
</s>
<s>
In	O
this	O
example	O
,	O
if	O
the	O
direct	B-Language
addressing	I-Language
version	O
of	O
ADD	O
is	O
available	O
,	O
all	O
the	O
others	O
should	O
be	O
as	O
well	O
.	O
</s>
<s>
The	O
reason	O
for	O
this	O
design	O
is	O
not	O
aesthetic	O
,	O
the	O
goal	O
is	O
to	O
reduce	O
the	O
total	O
size	O
of	O
a	O
program	O
's	O
object	B-Language
code	I-Language
.	O
</s>
<s>
By	O
providing	O
a	O
variety	O
of	O
addressing	B-Language
modes	I-Language
,	O
the	O
ISA	O
allows	O
the	O
programmer	O
to	O
choose	O
the	O
one	O
that	O
precisely	O
matches	O
the	O
need	O
of	O
their	O
program	O
at	O
that	O
point	O
,	O
and	O
thereby	O
reduce	O
the	O
need	O
to	O
use	O
multiple	O
instructions	O
to	O
achieve	O
the	O
same	O
end	O
.	O
</s>
<s>
Orthogonality	B-Application
was	O
often	O
described	O
as	O
being	O
highly	O
"	O
bit	O
efficient	O
"	O
.	O
</s>
<s>
Keeping	O
the	O
addressing	B-Language
mode	I-Language
specifier	O
bits	O
separate	O
from	O
the	O
opcode	B-Language
operation	O
bits	O
produces	O
an	O
orthogonal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
.	O
</s>
<s>
As	O
the	O
ultimate	O
end	O
of	O
orthogonal	B-Application
design	O
is	O
simply	O
to	O
allow	O
any	O
instruction	O
to	O
use	O
any	O
type	O
of	O
address	O
,	O
implementing	O
orthogonality	B-Application
is	O
often	O
simply	O
a	O
case	O
of	O
adding	O
more	O
wiring	O
between	O
the	O
parts	O
of	O
the	O
processor	O
.	O
</s>
<s>
However	O
,	O
it	O
also	O
adds	O
to	O
the	O
complexity	O
of	O
the	O
instruction	O
decoder	O
,	O
the	O
circuitry	O
that	O
reads	O
an	O
instruction	O
from	O
memory	O
at	O
the	O
location	O
pointed	O
to	O
by	O
the	O
program	B-General_Concept
counter	I-General_Concept
and	O
then	O
decides	O
how	O
to	O
process	O
it	O
.	O
</s>
<s>
In	O
the	O
example	O
ISA	O
outlined	O
above	O
,	O
the	O
ADD.C	O
instruction	O
using	O
direct	O
encoding	O
already	O
has	O
the	O
data	O
it	O
needs	O
to	O
run	O
the	O
instruction	O
and	O
no	O
further	O
processing	O
is	O
needed	O
,	O
the	O
decoder	O
simply	O
sends	O
the	O
value	O
into	O
the	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	O
)	O
.	O
</s>
<s>
Therefore	O
,	O
orthogonality	B-Application
represents	O
a	O
tradeoff	O
in	O
design	O
;	O
the	O
computer	O
designer	O
can	O
choose	O
to	O
offer	O
more	O
addressing	B-Language
modes	I-Language
to	O
the	O
programmer	O
to	O
improve	O
code	O
density	O
at	O
the	O
cost	O
of	O
making	O
the	O
CPU	O
itself	O
more	O
complex	O
.	O
</s>
<s>
When	O
memory	O
was	O
small	O
and	O
expensive	O
,	O
especially	O
during	O
the	O
era	O
of	O
drum	B-General_Concept
memory	I-General_Concept
or	O
core	B-General_Concept
memory	I-General_Concept
,	O
orthogonality	B-Application
was	O
highly	O
desirable	O
.	O
</s>
<s>
For	O
this	O
reason	O
,	O
most	O
machines	O
from	O
the	O
1960s	O
offered	O
only	O
partial	O
orthogonality	B-Application
,	O
as	O
much	O
as	O
the	O
designers	O
could	O
afford	O
.	O
</s>
<s>
It	O
was	O
in	O
the	O
1970s	O
that	O
the	O
introduction	O
of	O
large	O
scale	O
integration	O
significantly	O
reduced	O
the	O
complexity	O
of	O
computer	O
designs	O
and	O
fully	O
orthogonal	B-Application
designs	O
began	O
to	O
emerge	O
.	O
</s>
<s>
In	O
the	O
late	O
1970s	O
,	O
with	O
the	O
first	O
high-powered	O
fully	O
orthogonal	B-Application
designs	O
emerging	O
,	O
the	O
goal	O
widened	O
to	O
become	O
the	O
high-level	B-Architecture
language	I-Architecture
computer	I-Architecture
architecture	I-Architecture
,	O
or	O
HLLCA	B-Architecture
for	O
short	O
.	O
</s>
<s>
Just	O
as	O
orthogonality	B-Application
was	O
desired	O
to	O
improve	O
the	O
bit	O
density	O
of	O
machine	B-Language
language	I-Language
,	O
HLLCA	B-Architecture
's	O
goal	O
was	O
to	O
improve	O
the	O
bit	O
density	O
of	O
high-level	B-Language
languages	I-Language
like	O
ALGOL	B-Language
68	I-Language
.	O
</s>
<s>
These	O
languages	O
generally	O
used	O
an	O
activation	O
record	O
,	O
a	O
type	O
of	O
complex	O
stack	B-Application
that	O
stored	O
temporary	O
values	O
,	O
which	O
the	O
ISAs	O
generally	O
did	O
not	O
directly	O
support	O
and	O
had	O
to	O
be	O
implemented	O
using	O
many	O
individual	O
instructions	O
from	O
the	O
underlying	O
ISA	O
.	O
</s>
<s>
The	O
PDP-11	O
was	O
substantially	O
orthogonal	B-Application
(	O
primarily	O
excepting	O
its	O
floating	O
point	O
instructions	O
)	O
.	O
</s>
<s>
Most	O
integer	O
instructions	O
could	O
operate	O
on	O
either	O
1-byte	O
or	O
2-byte	O
values	O
and	O
could	O
access	O
data	O
stored	O
in	O
registers	O
,	O
stored	O
as	O
part	O
of	O
the	O
instruction	O
,	O
stored	O
in	O
memory	O
,	O
or	O
stored	O
in	O
memory	O
and	O
pointed	O
to	O
by	O
addresses	O
in	O
registers	O
or	O
memory	O
.	O
</s>
<s>
Even	O
the	O
PC	B-General_Concept
and	O
the	O
stack	B-Application
pointer	O
could	O
be	O
affected	O
by	O
the	O
ordinary	O
instructions	O
using	O
all	O
of	O
the	O
ordinary	O
data	O
modes	O
.	O
</s>
<s>
"	O
Immediate	O
"	O
mode	O
(	O
hardcoded	O
numbers	O
within	O
an	O
instruction	O
,	O
such	O
as	O
ADD	O
#4	O
,	O
R1	O
(	O
R1	O
=	O
R1	O
+	O
4	O
)	O
was	O
implemented	O
as	O
the	O
mode	O
"	O
register	O
indirect	O
,	O
autoincrement	O
"	O
and	O
specifying	O
the	O
program	B-General_Concept
counter	I-General_Concept
(	O
R7	O
)	O
as	O
the	O
register	O
to	O
use	O
reference	O
for	O
indirection	O
and	O
to	O
autoincrement	O
.	O
</s>
<s>
The	O
PDP-11	O
used	O
3-bit	O
fields	O
for	O
addressing	B-Language
modes	I-Language
(	O
0-7	O
)	O
so	O
there	O
were	O
(	O
electronically	O
)	O
8	O
addressing	B-Language
modes	I-Language
.	O
</s>
<s>
An	O
additional	O
3-bit	O
field	O
specified	O
the	O
registers	O
(	O
R0	O
–	O
R5	O
,	O
SP	O
,	O
PC	B-General_Concept
)	O
.	O
</s>
<s>
Immediate	O
and	O
absolute	O
address	O
operands	O
applying	O
the	O
two	O
autoincrement	O
modes	O
to	O
the	O
Program	B-General_Concept
Counter	I-General_Concept
(	O
R7	O
)	O
,	O
provided	O
a	O
total	O
of	O
10	O
conceptual	O
addressing	B-Language
modes	I-Language
.	O
</s>
<s>
Most	O
two	O
operand	O
instructions	O
supported	O
all	O
addressing	B-Language
modes	I-Language
for	O
both	O
parameters	O
.	O
</s>
<s>
The	O
VAX-11	B-Device
extended	O
the	O
PDP-11	O
'	O
s	O
orthogonality	B-Application
to	O
all	O
data	O
types	O
,	O
including	O
floating	O
point	O
numbers	O
.	O
</s>
<s>
Instructions	O
such	O
as	O
'	O
ADD	O
 '	O
were	O
divided	O
into	O
data-size	O
dependent	O
variants	O
such	O
as	O
ADDB	O
,	O
ADDW	O
,	O
ADDL	O
,	O
ADDP	O
,	O
ADDF	O
for	O
add	O
byte	B-Application
,	O
word	O
,	O
longword	O
,	O
packed	O
BCD	O
and	O
single-precision	O
floating	O
point	O
,	O
respectively	O
.	O
</s>
<s>
Like	O
the	O
PDP-11	O
,	O
the	O
Stack	B-Application
Pointer	O
and	O
Program	B-General_Concept
Counter	I-General_Concept
were	O
in	O
the	O
general	O
register	O
file	O
(	O
R14	O
and	O
R15	O
)	O
.	O
</s>
<s>
The	O
general	O
form	O
of	O
a	O
VAX-11	B-Device
instruction	O
would	O
be	O
:	O
</s>
<s>
opcode	B-Language
[	O
operand	O
]	O
[	O
operand	O
]	O
...	O
</s>
<s>
Each	O
component	O
being	O
one	O
byte	B-Application
,	O
the	O
opcode	B-Language
a	O
value	O
in	O
the	O
range	O
0	O
–	O
255	O
,	O
and	O
each	O
operand	O
consisting	O
of	O
two	O
nibbles	O
,	O
the	O
upper	O
4	O
bits	O
specifying	O
an	O
addressing	B-Language
mode	I-Language
,	O
and	O
the	O
lower	O
4	O
bits	O
(	O
usually	O
)	O
specifying	O
a	O
register	O
number	O
(	O
R0	O
–	O
R15	O
)	O
.	O
</s>
<s>
In	O
contrast	O
to	O
the	O
PDP-11	O
'	O
s	O
3-bit	O
fields	O
,	O
the	O
VAX-11	B-Device
'	O
s	O
4-bit	O
sub-bytes	O
resulted	O
in	O
16	O
addressing	B-Language
modes	I-Language
(	O
0	O
–	O
15	O
)	O
.	O
</s>
<s>
However	O
,	O
addressing	B-Language
modes	I-Language
0	O
–	O
3	O
were	O
"	O
short	O
immediate	O
"	O
for	O
immediate	O
data	O
of	O
6	O
bits	O
or	O
less	O
(	O
the	O
2	O
low-order	O
bits	O
of	O
the	O
addressing	B-Language
mode	I-Language
being	O
the	O
2	O
high-order	O
bits	O
of	O
the	O
immediate	O
data	O
,	O
when	O
prepended	O
to	O
the	O
remaining	O
4	O
bits	O
in	O
that	O
data-addressing	O
byte	B-Application
)	O
.	O
</s>
<s>
Since	O
addressing	B-Language
modes	I-Language
0-3	O
were	O
identical	O
,	O
this	O
made	O
13	O
(	O
electronic	O
)	O
addressing	B-Language
modes	I-Language
,	O
but	O
as	O
in	O
the	O
PDP-11	O
,	O
the	O
use	O
of	O
the	O
Stack	B-Application
Pointer	O
(	O
R14	O
)	O
and	O
Program	B-General_Concept
Counter	I-General_Concept
(	O
R15	O
)	O
created	O
a	O
total	O
of	O
over	O
15	O
conceptual	O
addressing	B-Language
modes	I-Language
(	O
with	O
the	O
assembler	O
program	O
translating	O
the	O
source	O
code	O
into	O
the	O
actual	O
stack-pointer	O
or	O
program-counter	O
based	O
addressing	B-Language
mode	I-Language
needed	O
)	O
.	O
</s>
<s>
Motorola	O
's	O
designers	O
attempted	O
to	O
make	O
the	O
assembly	O
language	O
orthogonal	B-Application
while	O
the	O
underlying	O
machine	B-Language
language	I-Language
was	O
somewhat	O
less	O
so	O
.	O
</s>
<s>
The	O
ISA	O
was	O
orthogonal	B-Application
to	O
the	O
extent	O
that	O
addresses	O
could	O
only	O
be	O
used	O
in	O
those	O
registers	O
,	O
but	O
there	O
was	O
no	O
restriction	O
on	O
which	O
of	O
the	O
registers	O
could	O
be	O
used	O
by	O
different	O
instructions	O
.	O
</s>
<s>
Likewise	O
,	O
the	O
data	O
registers	O
were	O
also	O
orthogonal	B-Application
across	O
instructions	O
.	O
</s>
<s>
Unlike	O
the	O
PDP-11	O
,	O
the	O
68000	O
only	O
supported	O
one	O
general	O
addressing	B-Language
mode	I-Language
for	O
two-parameter	O
instructions	O
.	O
</s>
<s>
The	O
MOV	O
instructions	O
supported	O
all	O
addressing	B-Language
modes	I-Language
for	O
both	O
parameters	O
.	O
</s>
<s>
In	O
contrast	O
,	O
the	O
NS320xx	B-Device
series	O
were	O
originally	O
designed	O
as	O
single-chip	O
implementations	O
of	O
the	O
VAX-11	B-Device
ISA	O
.	O
</s>
<s>
Although	O
this	O
had	O
to	O
change	O
due	O
to	O
legal	O
issues	O
,	O
the	O
resulting	O
system	O
retained	O
much	O
of	O
the	O
VAX-11	B-Device
'	O
s	O
overall	O
design	O
philosophy	O
and	O
remained	O
completely	O
orthogonal	B-Application
.	O
</s>
<s>
This	O
included	O
the	O
elimination	O
of	O
the	O
separate	O
data	O
and	O
address	B-General_Concept
registers	I-General_Concept
found	O
in	O
the	O
68k	O
.	O
</s>
<s>
The	O
8-bit	O
Intel	B-General_Concept
8080	I-General_Concept
(	O
as	O
well	O
as	O
the	O
8085	O
and	O
8051	O
)	O
microprocessor	O
was	O
basically	O
a	O
slightly	O
extended	O
accumulator-based	O
design	O
and	O
therefore	O
not	O
orthogonal	B-Application
.	O
</s>
<s>
An	O
assembly-language	O
programmer	O
or	O
compiler	O
writer	O
had	O
to	O
be	O
mindful	O
of	O
which	O
operations	O
were	O
possible	O
on	O
each	O
register	O
:	O
Most	O
8-bit	O
operations	O
could	O
be	O
performed	O
only	O
on	O
the	O
8-bit	O
accumulator	B-General_Concept
(	O
the	O
A-register	O
)	O
,	O
while	O
16-bit	O
operations	O
could	O
be	O
performed	O
only	O
on	O
the	O
16-bit	O
pointer/accumulator	O
(	O
the	O
HL-register	O
pair	O
)	O
,	O
whereas	O
simple	O
operations	O
,	O
such	O
as	O
increment	O
,	O
were	O
possible	O
on	O
all	O
seven	O
8-bit	O
registers	O
.	O
</s>
<s>
This	O
was	O
largely	O
due	O
to	O
a	O
desire	O
to	O
keep	O
all	O
opcodes	B-Language
one	O
byte	B-Application
long	O
.	O
</s>
<s>
The	O
binary-compatible	B-General_Concept
Z80	B-General_Concept
later	O
added	O
prefix-codes	O
to	O
escape	O
from	O
this	O
1-byte	O
limit	O
and	O
allow	O
for	O
a	O
more	O
powerful	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
The	O
same	O
basic	O
idea	O
was	O
employed	O
for	O
the	O
Intel	B-General_Concept
8086	I-General_Concept
,	O
although	O
,	O
to	O
allow	O
for	O
more	O
radical	O
extensions	O
,	O
binary-compatibility	O
with	O
the	O
8080	B-General_Concept
was	O
not	O
attempted	O
here	O
.	O
</s>
<s>
It	O
maintained	O
some	O
degree	O
of	O
non-orthogonality	O
for	O
the	O
sake	O
of	O
high	O
code	O
density	O
at	O
the	O
time	O
.	O
</s>
<s>
The	O
32-bit	O
extension	O
of	O
this	O
architecture	O
that	O
was	O
introduced	O
with	O
the	O
80386	B-General_Concept
,	O
was	O
somewhat	O
more	O
orthogonal	B-Application
despite	O
keeping	O
all	O
the	O
8086	B-General_Concept
instructions	O
and	O
their	O
extended	O
counterparts	O
.	O
</s>
<s>
However	O
,	O
the	O
encoding-strategy	O
used	O
still	O
shows	O
many	O
traces	O
from	O
the	O
8008	O
and	O
8080	B-General_Concept
(	O
and	O
Z80	B-General_Concept
)	O
.	O
</s>
<s>
For	O
instance	O
,	O
single-byte	O
encodings	O
remain	O
for	O
certain	O
frequent	O
operations	O
such	O
as	O
push	B-Application
and	I-Application
pop	I-Application
of	O
registers	O
and	O
constants	O
;	O
and	O
the	O
primary	O
accumulator	B-General_Concept
,	O
the	O
EAX	O
register	O
,	O
employs	O
shorter	O
encodings	O
than	O
the	O
other	O
registers	O
on	O
certain	O
types	O
of	O
operations	O
.	O
</s>
<s>
A	O
number	O
of	O
studies	O
through	O
the	O
1970s	O
demonstrated	O
that	O
the	O
flexibility	O
offered	O
by	O
orthogonal	B-Application
modes	O
was	O
rarely	O
or	O
never	O
used	O
in	O
actual	O
problems	O
.	O
</s>
<s>
In	O
particular	O
,	O
an	O
effort	O
at	O
IBM	O
studied	O
traces	O
of	O
code	O
running	O
on	O
the	O
System/370	B-Device
and	O
demonstrated	O
that	O
only	O
a	O
fraction	O
of	O
the	O
available	O
modes	O
were	O
being	O
used	O
in	O
actual	O
programs	O
.	O
</s>
<s>
Similar	O
studies	O
,	O
often	O
about	O
the	O
VAX	B-Device
,	O
demonstrated	O
the	O
same	O
pattern	O
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
it	O
was	O
shown	O
that	O
the	O
complexity	O
of	O
the	O
instructions	O
meant	O
they	O
took	O
longer	O
to	O
perform	O
than	O
the	O
sequence	O
of	O
smaller	O
instructions	O
,	O
with	O
the	O
canonical	O
example	O
of	O
this	O
being	O
the	O
VAX	B-Device
's	O
INDEX	O
instruction	O
.	O
</s>
<s>
If	O
the	O
processor	O
uses	O
a	O
larger	O
instruction	B-Language
word	I-Language
,	O
like	O
32-bits	O
,	O
two	O
constants	O
and	O
a	O
register	O
number	O
can	O
be	O
encoded	O
in	O
a	O
single	O
instruction	O
as	O
long	O
as	O
the	O
instruction	O
itself	O
does	O
not	O
use	O
too	O
many	O
bits	O
.	O
</s>
<s>
These	O
observations	O
led	O
to	O
the	O
abandonment	O
of	O
the	O
orthogonal	B-Application
design	O
as	O
a	O
primary	O
goal	O
of	O
processor	O
design	O
,	O
and	O
the	O
rise	O
of	O
the	O
RISC	B-Architecture
philosophy	O
in	O
the	O
1980s	O
.	O
</s>
<s>
RISC	B-Architecture
processors	I-Architecture
generally	O
have	O
only	O
two	O
addressing	B-Language
modes	I-Language
,	O
direct	O
(	O
constant	O
)	O
and	O
register	O
.	O
</s>
<s>
All	O
of	O
the	O
other	O
modes	O
found	O
in	O
older	O
processors	O
are	O
handled	O
explicitly	O
using	O
load	B-General_Concept
and	I-General_Concept
store	I-General_Concept
instructions	I-General_Concept
moving	O
data	O
to	O
and	O
from	O
the	O
registers	O
.	O
</s>
<s>
Only	O
a	O
few	O
addressing	B-Language
modes	I-Language
may	O
be	O
available	O
,	O
and	O
these	O
modes	O
may	O
vary	O
depending	O
on	O
whether	O
the	O
instruction	O
refers	O
to	O
data	O
or	O
involves	O
a	O
transfer	B-General_Concept
of	I-General_Concept
control	I-General_Concept
.	O
</s>
