<s>
Non-volatile	B-General_Concept
random-access	I-General_Concept
memory	I-General_Concept
(	O
NVRAM	B-General_Concept
)	O
is	O
random-access	B-Architecture
memory	I-Architecture
that	O
retains	O
data	O
without	O
applied	O
power	O
.	O
</s>
<s>
This	O
is	O
in	O
contrast	O
to	O
dynamic	O
random-access	B-Architecture
memory	I-Architecture
(	O
DRAM	O
)	O
and	O
static	B-Architecture
random-access	I-Architecture
memory	I-Architecture
(	O
SRAM	O
)	O
,	O
which	O
both	O
maintain	O
data	O
only	O
for	O
as	O
long	O
as	O
power	O
is	O
applied	O
,	O
or	O
forms	O
of	O
sequential-access	B-General_Concept
memory	I-General_Concept
such	O
as	O
magnetic	O
tape	O
,	O
which	O
cannot	O
be	O
randomly	O
accessed	O
but	O
which	O
retains	O
data	O
indefinitely	O
without	O
electric	O
power	O
.	O
</s>
<s>
Read-only	B-Device
memory	I-Device
devices	O
can	O
be	O
used	O
to	O
store	O
system	O
firmware	B-Application
in	O
embedded	B-Architecture
systems	I-Architecture
such	O
as	O
an	O
automotive	O
ignition	O
system	O
control	O
or	O
home	O
appliance	O
.	O
</s>
<s>
They	O
are	O
also	O
used	O
to	O
hold	O
the	O
initial	O
processor	O
instructions	O
required	O
to	O
bootstrap	B-Application
a	O
computer	O
system	O
.	O
</s>
<s>
Read-write	O
memory	O
can	O
be	O
used	O
to	O
store	O
calibration	O
constants	O
,	O
passwords	O
,	O
or	O
setup	O
information	O
,	O
and	O
may	O
be	O
integrated	O
into	O
a	O
microcontroller	B-Architecture
.	O
</s>
<s>
Development	O
is	O
going	O
on	O
for	O
the	O
use	O
of	O
non-volatile	O
memory	O
chips	O
as	O
a	O
system	O
's	O
main	O
memory	O
,	O
as	O
persistent	B-Library
memory	I-Library
.	O
</s>
<s>
A	O
standard	O
for	O
persistent	B-Library
memory	I-Library
known	O
as	O
NVDIMM-P	O
has	O
been	O
published	O
in	O
2021	O
.	O
</s>
<s>
Other	O
memory	O
types	O
required	O
constant	O
power	O
to	O
retain	O
data	O
,	O
such	O
as	O
vacuum	O
tube	O
or	O
solid-state	O
flip-flops	B-General_Concept
,	O
Williams	B-General_Concept
tubes	I-General_Concept
,	O
and	O
semiconductor	O
memory	O
(	O
static	O
or	O
dynamic	O
RAM	B-Architecture
)	O
.	O
</s>
<s>
Advances	O
in	O
semiconductor	B-Architecture
fabrication	I-Architecture
in	O
the	O
1970s	O
led	O
to	O
a	O
new	O
generation	O
of	O
solid	O
state	O
memories	O
that	O
magnetic-core	O
memory	O
could	O
not	O
match	O
on	O
cost	O
or	O
density	O
.	O
</s>
<s>
Today	O
dynamic	O
RAM	B-Architecture
forms	O
the	O
vast	O
majority	O
of	O
a	O
typical	O
computer	O
's	O
main	O
memory	O
.	O
</s>
<s>
Embedded	B-Architecture
systems	I-Architecture
,	O
such	O
as	O
an	O
engine	O
control	O
computer	O
for	O
a	O
car	O
,	O
must	O
retain	O
their	O
instructions	O
when	O
power	O
is	O
removed	O
.	O
</s>
<s>
Many	O
systems	O
used	O
a	O
combination	O
of	O
RAM	B-Architecture
and	O
some	O
form	O
of	O
ROM	B-Device
for	O
these	O
roles	O
.	O
</s>
<s>
Custom	O
ROM	B-Device
integrated	O
circuits	O
were	O
one	O
solution	O
.	O
</s>
<s>
PROM	B-General_Concept
improved	O
on	O
this	O
design	O
,	O
allowing	O
the	O
chip	O
to	O
be	O
written	O
electrically	O
by	O
the	O
end-user	O
.	O
</s>
<s>
PROM	B-General_Concept
consists	O
of	O
a	O
series	O
of	O
diodes	O
that	O
are	O
initially	O
all	O
set	O
to	O
a	O
single	O
value	O
,	O
"	O
1	O
"	O
for	O
instance	O
.	O
</s>
<s>
PROM	B-General_Concept
facilitated	O
prototyping	O
and	O
small	O
volume	O
manufacturing	O
.	O
</s>
<s>
Many	O
semiconductor	O
manufacturers	O
provided	O
a	O
PROM	B-General_Concept
version	O
of	O
their	O
mask	B-Device
ROM	I-Device
part	O
,	O
so	O
that	O
development	O
firmware	B-Application
could	O
be	O
tested	O
before	O
ordering	O
a	O
mask	B-Device
ROM	I-Device
.	O
</s>
<s>
Currently	O
,	O
the	O
best-known	O
form	O
of	O
both	O
NV-RAM	B-General_Concept
and	O
EEPROM	B-General_Concept
memory	O
is	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
Some	O
drawbacks	O
to	O
flash	B-Device
memory	I-Device
include	O
the	O
requirement	O
to	O
write	O
it	O
in	O
larger	O
blocks	O
than	O
many	O
computers	O
can	O
automatically	O
address	O
,	O
and	O
the	O
relatively	O
limited	O
longevity	O
of	O
flash	B-Device
memory	I-Device
due	O
to	O
its	O
finite	O
number	O
of	O
write-erase	O
cycles	O
(	O
as	O
of	O
January	O
2010	O
most	O
consumer	O
flash	O
products	O
can	O
withstand	O
only	O
around	O
100,000	O
rewrites	O
before	O
memory	O
begins	O
to	O
deteriorate	O
)	O
.	O
</s>
<s>
Another	O
drawback	O
is	O
the	O
performance	O
limitations	O
preventing	O
flash	O
from	O
matching	O
the	O
response	O
times	O
and	O
,	O
in	O
some	O
cases	O
,	O
the	O
random	O
addressability	O
offered	O
by	O
traditional	O
forms	O
of	O
RAM	B-Architecture
.	O
</s>
<s>
Several	O
newer	O
technologies	O
are	O
attempting	O
to	O
replace	O
flash	O
in	O
certain	O
roles	O
,	O
and	O
some	O
even	O
claim	O
to	O
be	O
a	O
truly	O
universal	B-Device
memory	I-Device
,	O
offering	O
the	O
performance	O
of	O
the	O
best	O
SRAM	O
devices	O
with	O
the	O
non-volatility	O
of	O
flash	O
.	O
</s>
<s>
Those	O
who	O
required	O
real	O
RAM-like	O
performance	O
and	O
non-volatility	O
typically	O
have	O
had	O
to	O
use	O
conventional	O
RAM	B-Architecture
devices	O
and	O
a	O
battery	O
backup	O
.	O
</s>
<s>
For	O
example	O
,	O
IBM	O
PC	O
's	O
and	O
successors	O
beginning	O
with	O
the	O
IBM	B-Operating_System
PC	I-Operating_System
AT	I-Operating_System
used	O
nonvolatile	B-Device
BIOS	I-Device
memory	I-Device
,	O
often	O
called	O
CMOS	B-Device
RAM	I-Device
or	O
parameter	O
RAM	B-Architecture
,	O
and	O
this	O
was	O
a	O
common	O
solution	O
in	O
other	O
early	O
microcomputer	O
systems	O
like	O
the	O
original	O
Apple	B-Device
Macintosh	I-Device
,	O
which	O
used	O
a	O
small	O
amount	O
of	O
memory	O
powered	O
by	O
a	O
battery	O
for	O
storing	O
basic	O
setup	O
information	O
like	O
the	O
selected	O
boot	O
volume	O
.	O
</s>
<s>
(	O
The	O
original	O
IBM	O
PC	O
and	O
PC	O
XT	O
instead	O
used	O
DIP	O
switches	O
to	O
represent	O
up	O
to	O
24	O
bits	O
of	O
system	O
configuration	O
data	O
;	O
DIP	O
or	O
similar	O
switches	O
are	O
another	O
,	O
primitive	O
type	O
of	O
programmable	B-General_Concept
ROM	I-General_Concept
device	O
that	O
was	O
widely	O
used	O
in	O
the	O
1970s	O
and	O
1980s	O
for	O
very	O
small	O
amounts	O
of	O
datatypically	O
no	O
more	O
than	O
8	O
bytes	O
.	O
)	O
</s>
<s>
Before	O
industry	O
standardization	O
on	O
the	O
IBM	O
PC	O
architecture	O
,	O
some	O
other	O
microcomputer	O
models	O
used	O
battery-backed	O
RAM	B-Architecture
more	O
extensively	O
:	O
for	O
example	O
,	O
in	O
the	O
TRS-80	O
Model	O
100/Tandy	O
102	O
,	O
all	O
of	O
the	O
main	O
memory	O
(	O
8	O
KB	O
minimum	O
,	O
32	O
KB	O
maximum	O
)	O
is	O
battery-backed	O
SRAM	O
.	O
</s>
<s>
for	O
consoles	O
such	O
as	O
the	O
Sega	B-Operating_System
Genesis	I-Operating_System
)	O
included	O
battery-backed	O
RAM	B-Architecture
to	O
retain	O
saved	O
games	O
,	O
high	O
scores	O
,	O
and	O
similar	O
data	O
.	O
</s>
<s>
Also	O
,	O
some	O
arcade	O
video	O
game	O
cabinets	O
contain	O
CPU	O
modules	O
that	O
include	O
battery-backed	O
RAM	B-Architecture
containing	O
keys	O
for	O
on-the-fly	O
game	O
software	O
decryption	O
.	O
</s>
<s>
Much	O
larger	O
battery	O
backed	O
memories	O
are	O
still	O
used	O
today	O
as	O
caches	B-General_Concept
for	O
high-speed	O
databases	O
that	O
require	O
a	O
performance	O
level	O
newer	O
NVRAM	B-General_Concept
devices	O
have	O
not	O
yet	O
managed	O
to	O
meet	O
.	O
</s>
<s>
A	O
huge	O
advance	O
in	O
NVRAM	B-General_Concept
technology	O
was	O
the	O
introduction	O
of	O
the	O
floating-gate	B-Algorithm
MOSFET	I-Algorithm
transistor	O
,	O
which	O
led	O
to	O
the	O
introduction	O
of	O
erasable	B-General_Concept
programmable	I-General_Concept
read-only	I-General_Concept
memory	I-General_Concept
,	O
or	O
EPROM	B-General_Concept
.	O
</s>
<s>
EPROM	B-General_Concept
consists	O
of	O
a	O
grid	O
of	O
transistors	O
whose	O
gate	O
terminal	O
(	O
the	O
"	O
switch	O
"	O
)	O
is	O
protected	O
by	O
a	O
high-quality	O
insulator	O
.	O
</s>
<s>
EPROM	B-General_Concept
can	O
be	O
re-set	O
to	O
the	O
"	O
base	O
state	O
"	O
(	O
all	O
"	O
1	O
"	O
s	O
or	O
"	O
0	O
"	O
s	O
,	O
depending	O
on	O
the	O
design	O
)	O
by	O
applying	O
ultraviolet	B-Application
light	O
(	O
UV	O
)	O
.	O
</s>
<s>
The	O
UV	O
photons	B-Application
have	O
enough	O
energy	O
to	O
push	O
the	O
electrons	O
through	O
the	O
insulator	O
and	O
return	O
the	O
base	O
to	O
a	O
ground	O
state	O
.	O
</s>
<s>
At	O
that	O
point	O
the	O
EPROM	B-General_Concept
can	O
be	O
re-written	O
from	O
scratch	O
.	O
</s>
<s>
An	O
improvement	O
on	O
EPROM	B-General_Concept
,	O
EEPROM	B-General_Concept
,	O
soon	O
followed	O
.	O
</s>
<s>
The	O
extra	O
"	O
E	O
"	O
stands	O
for	O
electrically	O
,	O
referring	O
to	O
the	O
ability	O
to	O
reset	O
EEPROM	B-General_Concept
using	O
electricity	O
instead	O
of	O
UV	O
,	O
making	O
the	O
devices	O
much	O
easier	O
to	O
use	O
in	O
practice	O
.	O
</s>
<s>
This	O
process	O
has	O
the	O
disadvantage	O
of	O
mechanically	O
degrading	O
the	O
chip	O
,	O
however	O
,	O
so	O
memory	O
systems	O
based	O
on	O
floating-gate	B-Algorithm
transistors	I-Algorithm
in	O
general	O
have	O
short	O
write-lifetimes	O
,	O
on	O
the	O
order	O
of	O
105	O
writes	O
to	O
any	O
particular	O
bit	O
.	O
</s>
<s>
One	O
approach	O
to	O
overcoming	O
the	O
rewrite	O
count	O
limitation	O
is	O
to	O
have	O
a	O
standard	O
SRAM	O
where	O
each	O
bit	O
is	O
backed	O
up	O
by	O
an	O
EEPROM	B-General_Concept
bit	O
.	O
</s>
<s>
In	O
normal	O
operation	O
the	O
chip	O
functions	O
as	O
a	O
fast	O
SRAM	O
and	O
in	O
case	O
of	O
power	O
failure	O
the	O
content	O
is	O
quickly	O
transferred	O
to	O
the	O
EEPROM	B-General_Concept
part	O
,	O
from	O
where	O
it	O
gets	O
loaded	O
back	O
at	O
the	O
next	O
power	O
up	O
.	O
</s>
<s>
The	O
basis	O
of	O
flash	B-Device
memory	I-Device
is	O
identical	O
to	O
EEPROM	B-General_Concept
,	O
and	O
differs	O
largely	O
in	O
internal	O
layout	O
.	O
</s>
<s>
Memory	B-Device
storage	I-Device
density	I-Device
is	O
the	O
main	O
determinant	O
of	O
cost	O
in	O
most	O
computer	O
memory	O
systems	O
,	O
and	O
due	O
to	O
this	O
flash	O
has	O
evolved	O
into	O
one	O
of	O
the	O
lowest	O
cost	O
solid-state	O
memory	O
devices	O
available	O
.	O
</s>
<s>
Starting	O
around	O
2000	O
,	O
demand	O
for	O
ever-greater	O
quantities	O
of	O
flash	O
have	O
driven	O
manufacturers	O
to	O
use	O
only	O
the	O
latest	O
fabrication	B-Architecture
systems	O
in	O
order	O
to	O
increase	O
density	O
as	O
much	O
as	O
possible	O
.	O
</s>
<s>
Although	O
fabrication	B-Architecture
limits	O
are	O
starting	O
to	O
come	O
into	O
play	O
,	O
new	O
"	B-Device
multi-bit	I-Device
"	I-Device
techniques	I-Device
appear	O
to	O
be	O
able	O
to	O
double	O
or	O
quadruple	O
the	O
density	O
even	O
at	O
existing	O
linewidths	O
.	O
</s>
<s>
Flash	O
and	O
EEPROM	B-General_Concept
's	O
limited	O
write-cycles	O
are	O
a	O
serious	O
problem	O
for	O
any	O
real	O
RAM-like	O
role	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
high	O
power	O
needed	O
to	O
write	O
the	O
cells	O
is	O
a	O
problem	O
in	O
low-power	O
roles	O
,	O
where	O
NVRAM	B-General_Concept
is	O
often	O
used	O
.	O
</s>
<s>
To	O
date	O
,	O
the	O
only	O
such	O
system	O
to	O
enter	O
widespread	O
production	O
is	O
ferroelectric	O
RAM	B-Architecture
,	O
or	O
F-RAM	O
(	O
sometimes	O
referred	O
to	O
as	O
FeRAM	O
)	O
.	O
</s>
<s>
F-RAM	O
is	O
a	O
random-access	B-Architecture
memory	I-Architecture
similar	O
in	O
construction	O
to	O
DRAM	O
but	O
(	O
instead	O
of	O
a	O
dielectric	O
layer	O
like	O
in	O
DRAM	O
)	O
contains	O
a	O
thin	O
ferroelectric	O
film	O
of	O
lead	O
zirconate	O
titanate	O
[],	O
commonly	O
referred	O
to	O
as	O
PZT	O
.	O
</s>
<s>
Unlike	O
RAM	B-Architecture
devices	O
,	O
F-RAM	O
retains	O
its	O
data	O
memory	O
when	O
power	O
is	O
shut	O
off	O
or	O
interrupted	O
,	O
due	O
to	O
the	O
PZT	O
crystal	O
maintaining	O
polarity	O
.	O
</s>
<s>
Due	O
to	O
this	O
crystal	O
structure	O
and	O
how	O
it	O
is	O
influenced	O
,	O
F-RAM	O
offers	O
distinct	O
properties	O
from	O
other	O
nonvolatile	O
memory	O
options	O
,	O
including	O
extremely	O
high	O
endurance	O
(	O
exceeding	O
1016	O
access	O
cycles	O
for	O
3.3V	O
devices	O
)	O
,	O
ultra	O
low	O
power	O
consumption	O
(	O
since	O
F-RAM	O
does	O
not	O
require	O
a	O
charge	O
pump	O
like	O
other	O
non-volatile	O
memories	O
)	O
,	O
single-cycle	O
write	O
speeds	O
,	O
and	O
gamma	O
radiation	O
tolerance	O
.	O
</s>
<s>
Ramtron	O
International	O
has	O
developed	O
,	O
produced	O
,	O
and	O
licensed	O
ferroelectric	O
RAM	B-Architecture
(	O
F-RAM	O
)	O
,	O
and	O
other	O
companies	O
that	O
have	O
licensed	O
and	O
produced	O
F-RAM	O
technology	O
include	O
Texas	O
Instruments	O
,	O
Rohm	O
,	O
and	O
Fujitsu	O
.	O
</s>
<s>
Another	O
approach	O
to	O
see	O
major	O
development	O
effort	O
is	O
magnetoresistive	B-General_Concept
random-access	I-General_Concept
memory	I-General_Concept
,	O
or	O
MRAM	B-General_Concept
,	O
which	O
uses	O
magnetic	O
elements	O
and	O
in	O
general	O
operates	O
in	O
a	O
fashion	O
similar	O
to	O
core	O
,	O
at	O
least	O
for	O
the	O
first-generation	O
technology	O
.	O
</s>
<s>
Only	O
one	O
MRAM	B-General_Concept
chip	O
has	O
entered	O
production	O
to	O
date	O
:	O
Everspin	O
Technologies	O
 '	O
4	O
Mbit	O
part	O
,	O
which	O
is	O
a	O
first-generation	O
MRAM	B-General_Concept
that	O
utilizes	O
cross-point	O
field	O
induced	O
writing	O
.	O
</s>
<s>
Two	O
second-generation	O
techniques	O
are	O
currently	O
in	O
development	O
:	O
Thermal	O
Assisted	O
Switching	O
(	O
TAS	O
)	O
,	O
which	O
is	O
being	O
developed	O
by	O
Crocus	O
Technology	O
,	O
and	O
spin-transfer	B-General_Concept
torque	I-General_Concept
(	O
STT	O
)	O
on	O
which	O
Crocus	O
,	O
Hynix	O
,	O
IBM	O
,	O
and	O
several	O
other	O
companies	O
are	O
working	O
.	O
</s>
<s>
STT-MRAM	O
appears	O
to	O
allow	O
for	O
much	O
higher	O
densities	O
than	O
those	O
of	O
the	O
first	O
generation	O
,	O
but	O
is	O
lagging	O
behind	O
flash	O
for	O
the	O
same	O
reasons	O
as	O
FeRAM	O
enormous	O
competitive	O
pressures	O
in	O
the	O
flash	O
market	O
.	O
</s>
<s>
Another	O
solid-state	O
technology	O
to	O
see	O
more	O
than	O
purely	O
experimental	O
development	O
is	O
Phase-change	B-Device
RAM	I-Device
,	O
or	O
PRAM	O
.	O
</s>
<s>
Considered	O
a	O
"	O
dark	O
horse	O
"	O
for	O
some	O
time	O
,	O
in	O
2006	O
Samsung	B-Application
announced	O
the	O
availability	O
of	O
a	O
512	O
Mbit	O
part	O
,	O
considerably	O
higher	O
capacity	O
than	O
either	O
MRAM	B-General_Concept
or	O
FeRAM	O
.	O
</s>
<s>
The	O
areal	B-Device
density	I-Device
of	O
these	O
parts	O
appears	O
to	O
be	O
even	O
higher	O
than	O
modern	O
flash	O
devices	O
,	O
the	O
lower	O
overall	O
storage	O
being	O
due	O
to	O
the	O
lack	O
of	O
multi-bit	O
encoding	O
.	O
</s>
<s>
Intel	O
and	O
Micron	O
Technology	O
had	O
a	O
joint	O
venture	O
to	O
sell	O
PRAM	O
devices	O
under	O
the	O
names	O
3D	B-Device
XPoint	I-Device
,	O
Optane	O
and	O
QuantX	O
,	O
which	O
was	O
discontinued	O
in	O
July	O
2022	O
.	O
</s>
<s>
STMicroelectronics	O
manufactures	O
phase-change	B-Device
memory	I-Device
devices	O
for	O
automotive	O
applications	O
.	O
</s>
<s>
Perhaps	O
one	O
of	O
the	O
more	O
innovative	O
solutions	O
is	O
millipede	B-General_Concept
memory	I-General_Concept
,	O
developed	O
by	O
IBM	O
.	O
</s>
<s>
Millipede	B-General_Concept
is	O
,	O
in	O
essence	O
,	O
a	O
punched	B-Architecture
card	I-Architecture
rendered	O
using	O
nanotechnology	O
in	O
order	O
to	O
dramatically	O
increase	O
areal	B-Device
density	I-Device
.	O
</s>
<s>
Although	O
it	O
was	O
planned	O
to	O
introduce	O
Millipede	B-General_Concept
as	O
early	O
as	O
2003	O
,	O
unexpected	O
problems	O
in	O
development	O
delayed	O
this	O
until	O
2005	O
,	O
by	O
which	O
point	O
it	O
was	O
no	O
longer	O
competitive	O
with	O
flash	O
.	O
</s>
<s>
In	O
theory	O
the	O
technology	O
offers	O
storage	B-Device
densities	I-Device
on	O
the	O
order	O
of	O
1	O
Tbit/in²	O
( ≈155	O
Gbit/cm2	O
)	O
,	O
greater	O
than	O
even	O
the	O
best	O
hard	B-Device
drive	I-Device
technologies	O
currently	O
in	O
use	O
(	O
perpendicular	B-Device
recording	I-Device
offers	O
636	O
Gbit/in²	O
( ≈	O
98.6	O
Gbit/cm2	O
)	O
as	O
of	O
Dec	O
.	O
2011	O
)	O
,	O
but	O
future	O
heat-assisted	O
magnetic	O
recording	O
and	O
patterned	O
media	O
together	O
could	O
support	O
densities	O
of	O
10	O
Tbit/in²	O
( ≈	O
1.55	O
Tbit/cm2	O
)	O
.	O
</s>
<s>
However	O
,	O
slow	O
read	O
and	O
write	O
times	O
for	O
memories	O
this	O
large	O
seem	O
to	O
limit	O
this	O
technology	O
to	O
hard	B-Device
drive	I-Device
replacements	O
as	O
opposed	O
to	O
high-speed	O
RAM-like	O
uses	O
,	O
although	O
to	O
a	O
very	O
large	O
degree	O
the	O
same	O
is	O
true	O
of	O
flash	O
as	O
well	O
.	O
</s>
<s>
Such	O
devices	O
are	O
claimed	O
to	O
have	O
the	O
advantage	O
that	O
they	O
utilise	O
the	O
same	O
technology	O
as	O
HKMG	B-Algorithm
(	O
high-L	O
metal	O
gate	O
)	O
based	O
lithography	O
,	O
and	O
scale	O
to	O
the	O
same	O
size	O
as	O
a	O
conventional	O
FET	O
at	O
a	O
given	O
process	O
node	O
.	O
</s>
<s>
As	O
of	O
2017	O
32Mbit	O
devices	O
have	O
been	O
demonstrated	O
at	O
22	B-Algorithm
nm	I-Algorithm
.	O
</s>
