<s>
A	O
network	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
or	O
network-on-chip	B-Architecture
(	O
NoC	B-Architecture
or	O
)	O
is	O
a	O
network-based	O
communications	O
subsystem	O
on	O
an	O
integrated	O
circuit	O
(	O
"	O
microchip	O
"	O
)	O
,	O
most	O
typically	O
between	O
modules	B-Architecture
in	O
a	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SoC	B-Architecture
)	O
.	O
</s>
<s>
The	O
modules	B-Architecture
on	O
the	O
IC	O
are	O
typically	O
semiconductor	B-Architecture
IP	I-Architecture
cores	O
schematizing	O
various	O
functions	O
of	O
the	O
computer	O
system	O
,	O
and	O
are	O
designed	O
to	O
be	O
modular	B-Architecture
in	O
the	O
sense	O
of	O
network	O
science	O
.	O
</s>
<s>
The	O
network	B-Architecture
on	I-Architecture
chip	I-Architecture
is	O
a	O
router-based	O
packet	B-Protocol
switching	I-Protocol
network	O
between	O
SoC	B-Architecture
modules	B-Architecture
.	O
</s>
<s>
NoC	B-Architecture
technology	O
applies	O
the	O
theory	O
and	O
methods	O
of	O
computer	B-Architecture
networking	I-Architecture
to	O
on-chip	O
communication	O
and	O
brings	O
notable	O
improvements	O
over	O
conventional	O
bus	B-General_Concept
and	O
crossbar	O
communication	B-Architecture
architectures	I-Architecture
.	O
</s>
<s>
Networks-on-chip	O
come	O
in	O
many	O
network	B-Architecture
topologies	I-Architecture
,	O
many	O
of	O
which	O
are	O
still	O
experimental	O
as	O
of	O
2018	O
.	O
</s>
<s>
In	O
2000s	O
researchers	O
had	O
started	O
to	O
propose	O
a	O
type	O
of	O
on-chip	O
interconnection	O
in	O
the	O
form	O
of	O
packet	B-Protocol
switching	I-Protocol
networks	O
in	O
order	O
to	O
address	O
the	O
scalability	B-Architecture
issues	O
of	O
bus-based	O
design	O
.	O
</s>
<s>
Preceding	O
researches	O
proposed	O
the	O
design	O
that	O
routes	O
data	B-Protocol
packets	I-Protocol
instead	O
of	O
routing	O
the	O
wires	O
.	O
</s>
<s>
NoCs	B-Architecture
improve	O
the	O
scalability	B-Architecture
of	O
systems-on-chip	O
and	O
the	O
power	O
efficiency	O
of	O
complex	O
SoCs	O
compared	O
to	O
other	O
communication	O
subsystem	O
designs	O
.	O
</s>
<s>
They	O
are	O
an	O
emerging	O
technology	O
,	O
with	O
projections	O
for	O
large	O
growth	O
in	O
the	O
near	O
future	O
as	O
multicore	B-Architecture
computer	O
architectures	O
become	O
more	O
common	O
.	O
</s>
<s>
NoCs	B-Architecture
can	O
span	O
synchronous	O
and	O
asynchronous	B-Application
clock	O
domains	O
,	O
known	O
as	O
clock	O
domain	O
crossing	O
,	O
or	O
use	O
unclocked	O
asynchronous	B-Application
logic	I-Application
.	O
</s>
<s>
NoCs	B-Architecture
support	O
globally	O
asynchronous	B-Application
,	O
locally	O
synchronous	O
electronics	O
architectures	O
,	O
allowing	O
each	O
processor	O
core	O
or	O
functional	O
unit	O
on	O
the	O
System-on-Chip	B-Architecture
to	O
have	O
its	O
own	O
clock	O
domain	O
.	O
</s>
<s>
NoC	B-Architecture
architectures	O
typically	O
model	O
sparse	B-Algorithm
small-world	O
networks	O
(	O
SWNs	O
)	O
and	O
scale-free	O
networks	O
(	O
SFNs	O
)	O
to	O
limit	O
the	O
number	O
,	O
length	O
,	O
area	O
and	O
power	O
consumption	O
of	O
interconnection	O
wires	O
and	O
point-to-point	B-Architecture
connections	O
.	O
</s>
<s>
The	O
topology	B-Architecture
is	O
the	O
first	O
fundamental	O
aspect	O
of	O
NoC	B-Architecture
design	O
,	O
and	O
it	O
has	O
a	O
profound	O
effect	O
on	O
the	O
overall	O
network	O
cost	O
and	O
performance	O
.	O
</s>
<s>
The	O
topology	B-Architecture
determines	O
the	O
physical	O
layout	O
and	O
connections	O
between	O
nodes	O
and	O
channels	O
.	O
</s>
<s>
Also	O
,	O
the	O
message	O
traverse	O
hops	O
and	O
each	O
hop	O
’s	O
channel	O
length	O
depend	O
on	O
the	O
topology	B-Architecture
.	O
</s>
<s>
Thus	O
,	O
the	O
topology	B-Architecture
significantly	O
influences	O
the	O
latency	O
and	O
power	O
consumption	O
.	O
</s>
<s>
Furthermore	O
,	O
since	O
the	O
topology	B-Architecture
determines	O
the	O
number	O
of	O
alternative	O
paths	O
between	O
nodes	O
,	O
it	O
affects	O
the	O
network	O
traffic	O
distribution	O
,	O
and	O
hence	O
the	O
network	O
bandwidth	O
and	O
performance	O
achieved	O
.	O
</s>
<s>
Traditionally	O
,	O
ICs	O
have	O
been	O
designed	O
with	O
dedicated	O
point-to-point	B-Architecture
connections	O
,	O
with	O
one	O
wire	O
dedicated	O
to	O
each	O
signal	O
.	O
</s>
<s>
This	O
results	O
in	O
a	O
dense	O
network	B-Architecture
topology	I-Architecture
.	O
</s>
<s>
The	O
wires	O
occupy	O
much	O
of	O
the	O
area	O
of	O
the	O
chip	O
,	O
and	O
in	O
nanometer	O
CMOS	B-Device
technology	O
,	O
interconnects	B-General_Concept
dominate	O
both	O
performance	O
and	O
dynamic	O
power	O
dissipation	O
,	O
as	O
signal	O
propagation	O
in	O
wires	O
across	O
the	O
chip	O
requires	O
multiple	O
clock	O
cycles	O
.	O
</s>
<s>
(	O
See	O
Rent	O
's	O
rule	O
for	O
a	O
discussion	O
of	O
wiring	O
requirements	O
for	O
point-to-point	B-Architecture
connections	O
)	O
.	O
</s>
<s>
Sparsity	B-Algorithm
and	O
locality	B-General_Concept
of	O
interconnections	O
in	O
the	O
communications	O
subsystem	O
yield	O
several	O
improvements	O
over	O
traditional	O
bus-based	O
and	O
crossbar-based	O
systems	O
.	O
</s>
<s>
The	O
wires	O
in	O
the	O
links	O
of	O
the	O
network-on-chip	B-Architecture
are	O
shared	O
by	O
many	O
signals	O
.	O
</s>
<s>
A	O
high	O
level	O
of	O
parallelism	B-Operating_System
is	O
achieved	O
,	O
because	O
all	O
data	O
links	O
in	O
the	O
NoC	B-Architecture
can	O
operate	O
simultaneously	O
on	O
different	O
data	B-Protocol
packets	I-Protocol
.	O
</s>
<s>
Therefore	O
,	O
as	O
the	O
complexity	O
of	O
integrated	O
systems	O
keeps	O
growing	O
,	O
a	O
NoC	B-Architecture
provides	O
enhanced	O
performance	O
(	O
such	O
as	O
throughput	O
)	O
and	O
scalability	B-Architecture
in	O
comparison	O
with	O
previous	O
communication	B-Architecture
architectures	I-Architecture
(	O
e.g.	O
,	O
dedicated	O
point-to-point	B-Architecture
signal	O
wires	O
,	O
shared	O
buses	B-General_Concept
,	O
or	O
segmented	O
buses	B-General_Concept
with	O
bridges	B-Protocol
)	O
.	O
</s>
<s>
The	O
algorithms	O
must	O
be	O
designed	O
in	O
such	O
a	O
way	O
that	O
they	O
offer	O
large	B-Operating_System
parallelism	I-Operating_System
and	O
can	O
hence	O
utilize	O
the	O
potential	O
of	O
NoC	B-Architecture
.	O
</s>
<s>
Some	O
researchers	O
think	O
that	O
NoCs	B-Architecture
need	O
to	O
support	O
quality	O
of	O
service	O
(	O
QoS	O
)	O
,	O
namely	O
achieve	O
the	O
various	O
requirements	O
in	O
terms	O
of	O
throughput	O
,	O
end-to-end	O
delays	O
,	O
fairness	B-Protocol
,	O
and	O
deadlines	O
.	O
</s>
<s>
Real-time	B-General_Concept
computation	O
,	O
including	O
audio	O
and	O
video	O
playback	O
,	O
is	O
one	O
reason	O
for	O
providing	O
QoS	O
support	O
.	O
</s>
<s>
However	O
,	O
current	O
system	O
implementations	O
like	O
VxWorks	B-Operating_System
,	O
RTLinux	B-Application
or	O
QNX	B-Operating_System
are	O
able	O
to	O
achieve	O
sub-millisecond	O
real-time	B-General_Concept
computing	I-General_Concept
without	O
special	O
hardware	B-Architecture
.	O
</s>
<s>
This	O
may	O
indicate	O
that	O
for	O
many	O
real-time	B-General_Concept
applications	I-General_Concept
the	O
service	O
quality	O
of	O
existing	O
on-chip	O
interconnect	B-General_Concept
infrastructure	O
is	O
sufficient	O
,	O
and	O
dedicated	O
hardware	B-Architecture
logic	O
would	O
be	O
necessary	O
to	O
achieve	O
microsecond	O
precision	O
,	O
a	O
degree	O
that	O
is	O
rarely	O
needed	O
in	O
practice	O
for	O
end	O
users	O
(	O
sound	O
or	O
video	O
jitter	O
need	O
only	O
tenth	O
of	O
milliseconds	O
latency	O
guarantee	O
)	O
.	O
</s>
<s>
Another	O
motivation	O
for	O
NoC-level	O
quality	O
of	O
service	O
(	O
QoS	O
)	O
is	O
to	O
support	O
multiple	O
concurrent	B-Operating_System
users	O
sharing	O
resources	O
of	O
a	O
single	O
chip	B-Architecture
multiprocessor	I-Architecture
in	O
a	O
public	O
cloud	B-Architecture
computing	I-Architecture
infrastructure	O
.	O
</s>
<s>
In	O
such	O
instances	O
,	O
hardware	B-Architecture
QoS	O
logic	O
enables	O
the	O
service	O
provider	O
to	O
make	O
contractual	O
guarantees	O
on	O
the	O
level	O
of	O
service	O
that	O
a	O
user	O
receives	O
,	O
a	O
feature	O
that	O
may	O
be	O
deemed	O
desirable	O
by	O
some	O
corporate	O
or	O
government	O
clients	O
.	O
</s>
<s>
Research	O
has	O
been	O
conducted	O
on	O
integrated	O
optical	O
waveguides	O
and	O
devices	O
comprising	O
an	O
optical	O
network	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
ONoC	O
)	O
.	O
</s>
<s>
The	O
possible	O
way	O
to	O
increasing	O
the	O
performance	O
of	O
NoC	B-Architecture
is	O
use	O
wireless	O
communication	O
channels	O
between	O
chiplets	O
—	O
named	O
wireless	O
network	B-Architecture
on	I-Architecture
chip	I-Architecture
(	O
WiNoC	O
)	O
.	O
</s>
<s>
In	O
a	O
multi-core	B-Architecture
system	O
,	O
connected	O
by	O
NoC	B-Architecture
,	O
coherency	O
messages	O
and	O
cache	O
miss	O
requests	O
have	O
to	O
pass	O
switches	O
.	O
</s>
<s>
NoC	B-Architecture
development	O
and	O
studies	O
require	O
comparing	O
different	O
proposals	O
and	O
options	O
.	O
</s>
<s>
NoC	B-Architecture
traffic	O
patterns	O
are	O
under	O
development	O
to	O
help	O
such	O
evaluations	O
.	O
</s>
<s>
Existing	O
NoC	B-Architecture
benchmarks	O
include	O
NoCBench	O
and	O
MCSL	O
NoC	B-Architecture
Traffic	O
Patterns	O
.	O
</s>
<s>
An	O
interconnect	B-General_Concept
processing	O
unit	O
(	O
IPU	O
)	O
is	O
an	O
on-chip	O
communication	O
network	O
with	O
hardware	B-Architecture
and	O
software	O
components	O
which	O
jointly	O
implement	O
key	O
functions	O
of	O
different	O
system-on-chip	B-Architecture
programming	O
models	O
through	O
a	O
set	O
of	O
communication	O
and	O
synchronization	O
primitives	O
and	O
provide	O
low-level	O
platform	O
services	O
to	O
enable	O
advanced	O
features	O
in	O
modern	O
heterogeneous	O
applications	O
on	O
a	O
single	O
die	O
.	O
</s>
