<s>
The	O
NetFPGA	B-Device
project	O
is	O
an	O
effort	O
to	O
develop	O
open-source	O
hardware	O
and	O
software	O
for	O
rapid	B-Device
prototyping	I-Device
of	O
computer	B-Architecture
network	I-Architecture
devices	O
.	O
</s>
<s>
NetFPGA	B-Device
used	O
an	O
FPGA-based	O
approach	O
to	O
prototyping	O
networking	O
devices	O
.	O
</s>
<s>
NetFPGA	B-Device
focused	O
on	O
supporting	O
developers	O
that	O
can	O
share	O
and	O
build	O
on	O
each	O
other	O
's	O
projects	O
and	O
IP	O
building	O
blocks	O
.	O
</s>
<s>
The	O
project	O
began	O
in	O
2007	O
as	O
a	O
research	O
project	O
at	O
Stanford	O
University	O
called	O
the	O
NetFPGA-1G	O
.	O
</s>
<s>
The	O
1G	O
platform	O
consisted	O
of	O
a	O
PCI	B-Protocol
board	O
with	O
a	O
Xilinx	O
Virtex-II	O
pro	O
FPGA	B-Architecture
and	O
4	O
x	O
1GigE	O
interfaces	O
feeding	O
into	O
it	O
,	O
along	O
with	O
a	O
downloadable	O
code	O
repository	O
containing	O
an	O
IP	O
library	O
and	O
a	O
few	O
example	O
designs	O
.	O
</s>
<s>
By	O
2011	O
over	O
46	O
academic	O
papers	O
had	O
been	O
published	O
regarding	O
research	O
that	O
used	O
the	O
NetFPGA-1G	O
platform	O
.	O
</s>
<s>
In	O
2009	O
work	O
began	O
in	O
secrecy	O
on	O
the	O
NetFPGA-10G	O
with	O
4	O
x	O
10	O
GigE	O
interfaces	O
.	O
</s>
<s>
The	O
10G	O
board	O
was	O
also	O
designed	O
with	O
a	O
much	O
larger	O
FPGA	B-Architecture
,	O
more	O
memory	O
,	O
and	O
a	O
number	O
of	O
other	O
upgrades	O
.	O
</s>
<s>
The	O
second	O
release	O
of	O
the	O
NetFPGA-10G	O
platform	O
is	O
codenamed	O
“	O
Skellig	O
”	O
and	O
is	O
scheduled	O
for	O
release	O
before	O
second	O
quarter	O
2011	O
.	O
</s>
<s>
The	O
NetFPGA-1G	O
code	O
is	O
distributed	O
using	O
a	O
BSD-style	O
license	O
.	O
</s>
<s>
The	O
NetFPGA-10G	O
code	O
base	O
contains	O
code	O
covered	O
under	O
a	O
variety	O
of	O
different	O
licenses	O
,	O
though	O
the	O
default	O
license	O
is	O
the	O
GNU	O
LGPL	O
version	O
3	O
.	O
</s>
