<s>
The	O
NX	B-General_Concept
bit	I-General_Concept
(	O
no-execute	O
)	O
is	O
a	O
technology	O
used	O
in	O
CPUs	B-Device
to	O
segregate	O
areas	O
of	O
a	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
for	O
use	O
by	O
either	O
storage	O
of	O
processor	O
instructions	O
or	O
for	O
storage	O
of	O
data	O
.	O
</s>
<s>
An	O
operating	B-General_Concept
system	I-General_Concept
with	O
support	O
for	O
the	O
NX	B-General_Concept
bit	I-General_Concept
may	O
mark	O
certain	O
areas	O
of	O
an	O
address	O
space	O
as	O
non-executable	O
.	O
</s>
<s>
The	O
general	O
technique	O
,	O
known	O
as	O
executable	O
space	O
protection	O
,	O
also	O
called	O
Write	O
XOR	O
Execute	O
,	O
is	O
used	O
to	O
prevent	O
certain	O
types	O
of	O
malicious	O
software	O
from	O
taking	O
over	O
computers	O
by	O
inserting	O
their	O
code	O
into	O
another	O
program	O
's	O
data	O
storage	O
area	O
and	O
running	O
their	O
own	O
code	O
from	O
within	O
this	O
section	O
;	O
one	O
class	O
of	O
such	O
attacks	O
is	O
known	O
as	O
the	O
buffer	B-General_Concept
overflow	I-General_Concept
attack	O
.	O
</s>
<s>
The	O
term	O
NX	B-General_Concept
bit	I-General_Concept
originated	O
with	O
Advanced	O
Micro	O
Devices	O
(	O
AMD	O
)	O
,	O
as	O
a	O
marketing	O
term	O
.	O
</s>
<s>
Intel	O
markets	O
the	O
feature	O
as	O
the	O
XD	B-General_Concept
bit	I-General_Concept
(	O
execute	O
disable	O
)	O
.	O
</s>
<s>
The	O
MIPS	B-Device
architecture	I-Device
refers	O
to	O
the	O
feature	O
as	O
XI	O
bit	O
(	O
execute	O
inhibit	O
)	O
.	O
</s>
<s>
The	O
ARM	B-Architecture
architecture	I-Architecture
refers	O
to	O
the	O
feature	O
,	O
which	O
was	O
introduced	O
in	O
ARMv6	O
,	O
as	O
XN	O
(	O
execute	O
never	O
)	O
.	O
</s>
<s>
The	O
term	O
NX	B-General_Concept
bit	I-General_Concept
itself	O
is	O
sometimes	O
used	O
to	O
describe	O
similar	O
technologies	O
in	O
other	O
processors	O
.	O
</s>
<s>
x86	B-Operating_System
processors	O
,	O
since	O
the	O
80286	B-General_Concept
,	O
included	O
a	O
similar	O
capability	O
implemented	O
at	O
the	O
segment	B-General_Concept
level	O
.	O
</s>
<s>
However	O
,	O
almost	O
all	O
operating	B-General_Concept
systems	I-General_Concept
for	O
the	O
80386	B-General_Concept
and	O
later	O
x86	B-Operating_System
processors	O
implement	O
the	O
flat	B-General_Concept
memory	I-General_Concept
model	I-General_Concept
,	O
so	O
they	O
cannot	O
use	O
this	O
capability	O
.	O
</s>
<s>
There	O
was	O
no	O
'	O
Executable	O
 '	O
flag	O
in	O
the	O
page	B-General_Concept
table	I-General_Concept
entry	O
(	O
page	B-General_Concept
descriptor	O
)	O
in	O
those	O
processors	O
,	O
until	O
,	O
to	O
make	O
this	O
capability	O
available	O
to	O
operating	B-General_Concept
systems	I-General_Concept
using	O
the	O
flat	B-General_Concept
memory	I-General_Concept
model	I-General_Concept
,	O
AMD	O
added	O
a	O
"	O
no-execute	O
"	O
or	O
NX	B-General_Concept
bit	I-General_Concept
to	O
the	O
page	B-General_Concept
table	I-General_Concept
entry	O
in	O
its	O
AMD64	B-Device
architecture	O
,	O
providing	O
a	O
mechanism	O
that	O
can	O
control	O
execution	O
per	O
page	B-General_Concept
rather	O
than	O
per	O
whole	O
segment	B-General_Concept
.	O
</s>
<s>
Intel	O
implemented	O
a	O
similar	O
feature	O
in	O
its	O
Itanium	B-General_Concept
(	O
Merced	O
)	O
processorhaving	O
IA-64	B-General_Concept
architecturein	O
2001	O
,	O
but	O
did	O
not	O
bring	O
it	O
to	O
the	O
more	O
popular	O
x86	B-Operating_System
processor	O
families	O
(	O
Pentium	B-General_Concept
,	O
Celeron	B-Device
,	O
Xeon	B-Device
,	O
etc	O
.	O
)	O
.	O
</s>
<s>
In	O
the	O
x86	B-Operating_System
architecture	I-Operating_System
it	O
was	O
first	O
implemented	O
by	O
AMD	O
,	O
as	O
the	O
NX	B-General_Concept
bit	I-General_Concept
,	O
for	O
use	O
by	O
its	O
AMD64	B-Device
line	O
of	O
processors	O
,	O
such	O
as	O
the	O
Athlon	O
64	O
and	O
Opteron	B-General_Concept
.	O
</s>
<s>
After	O
AMD	O
's	O
decision	O
to	O
include	O
this	O
functionality	O
in	O
its	O
AMD64	B-Device
instruction	O
set	O
,	O
Intel	O
implemented	O
the	O
similar	O
XD	B-General_Concept
bit	I-General_Concept
feature	O
in	O
x86	B-Operating_System
processors	O
beginning	O
with	O
the	O
Pentium	B-General_Concept
4	I-General_Concept
processors	O
based	O
on	O
later	O
iterations	O
of	O
the	O
Prescott	O
core	O
.	O
</s>
<s>
The	O
NX	B-General_Concept
bit	I-General_Concept
specifically	O
refers	O
to	O
bit	O
number	O
63	O
(	O
i.e.	O
</s>
<s>
the	O
most	O
significant	O
bit	O
)	O
of	O
a	O
64-bit	O
entry	O
in	O
the	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
If	O
this	O
bit	O
is	O
set	O
to	O
0	O
,	O
then	O
code	O
can	O
be	O
executed	O
from	O
that	O
page	B-General_Concept
;	O
if	O
set	O
to	O
1	O
,	O
code	O
cannot	O
be	O
executed	O
from	O
that	O
page	B-General_Concept
,	O
and	O
anything	O
residing	O
there	O
is	O
assumed	O
to	O
be	O
data	O
.	O
</s>
<s>
It	O
is	O
only	O
available	O
with	O
the	O
long	O
mode	O
(	O
64-bit	O
mode	O
)	O
or	O
legacy	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
page-table	O
formats	O
,	O
but	O
not	O
x86	B-Operating_System
's	O
original	O
32-bit	O
page	B-General_Concept
table	I-General_Concept
format	O
because	O
page	B-General_Concept
table	I-General_Concept
entries	O
in	O
that	O
format	O
lack	O
the	O
64th	O
bit	O
used	O
to	O
disable	O
and	O
enable	O
execution	O
.	O
</s>
<s>
In	O
ARMv6	O
,	O
a	O
new	O
page	B-General_Concept
table	I-General_Concept
entry	O
format	O
was	O
introduced	O
;	O
it	O
includes	O
an	O
"	O
execute	O
never	O
"	O
bit	O
.	O
</s>
<s>
For	O
ARMv8-A	O
,	O
VMSAv8-64	O
block	O
and	O
page	B-General_Concept
descriptors	O
,	O
and	O
VMSAv8-32	O
long-descriptor	O
block	O
and	O
page	B-General_Concept
descriptors	O
,	O
for	O
stage	O
1	O
translations	O
have	O
"	O
execute	O
never	O
"	O
bits	O
for	O
both	O
privileged	O
and	O
unprivileged	O
modes	O
,	O
and	O
block	O
and	O
page	B-General_Concept
descriptors	O
for	O
stage	O
2	O
translations	O
have	O
a	O
single	O
"	O
execute	O
never	O
"	O
bit( two	O
bits	O
due	O
to	O
ARMv8.2-TTS2UXN	O
feature	O
)	O
;	O
VMSAv8-32	O
short-descriptor	O
translation	O
table	O
descriptors	O
at	O
level	O
1	O
have	O
"	O
execute	O
never	O
"	O
bits	O
for	O
both	O
privileged	O
and	O
unprivileged	O
mode	O
and	O
at	O
level	O
2	O
have	O
a	O
single	O
"	O
execute	O
never	O
"	O
bit	O
.	O
</s>
<s>
As	O
of	O
the	O
Fourth	O
Edition	O
of	O
the	O
Alpha	B-Device
Architecture	O
manual	O
,	O
DEC	O
(	O
now	O
HP	O
)	O
Alpha	B-Device
has	O
a	O
Fault	O
on	O
Execute	O
bit	O
in	O
page	B-General_Concept
table	I-General_Concept
entries	O
with	O
the	O
OpenVMS	B-Operating_System
,	O
Tru64	B-Operating_System
UNIX	I-Operating_System
,	O
and	O
Alpha	B-Device
Linux	O
PALcode	B-General_Concept
.	O
</s>
<s>
The	O
SPARC	B-Architecture
Reference	O
MMU	O
for	O
Sun	B-Architecture
SPARC	I-Architecture
version	O
8	O
has	O
permission	O
values	O
of	O
Read	O
Only	O
,	O
Read/Write	O
,	O
Read/Execute	O
,	O
and	O
Read/Write/Execute	O
in	O
page	B-General_Concept
table	I-General_Concept
entries	O
,	O
although	O
not	O
all	O
SPARC	B-Architecture
processors	O
have	O
a	O
SPARC	B-Architecture
Reference	O
MMU	O
.	O
</s>
<s>
A	O
SPARC	B-Architecture
version	O
9	O
MMU	O
may	O
provide	O
,	O
but	O
is	O
not	O
required	O
to	O
provide	O
,	O
any	O
combination	O
of	O
read/write/execute	O
permissions	O
.	O
</s>
<s>
A	O
Translation	O
Table	O
Entry	O
in	O
a	O
Translation	O
Storage	O
Buffer	O
in	O
Oracle	B-Application
SPARC	B-Architecture
Architecture	O
2011	O
,	O
Draft	O
D1.0.0	O
has	O
separate	O
Executable	O
and	O
Writable	O
bits	O
.	O
</s>
<s>
Page	B-General_Concept
table	I-General_Concept
entries	O
for	O
IBM	B-Architecture
PowerPC	I-Architecture
's	O
hashed	O
page	B-General_Concept
tables	I-General_Concept
have	O
a	O
no-execute	O
page	B-General_Concept
bit	O
.	O
</s>
<s>
Page	B-General_Concept
table	I-General_Concept
entries	O
for	O
radix-tree	O
page	B-General_Concept
tables	I-General_Concept
in	O
the	O
Power	O
ISA	O
have	O
separate	O
permission	O
bits	O
granting	O
read/write	O
and	O
execute	O
access	O
.	O
</s>
<s>
Translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
)	O
entries	O
and	O
page	B-General_Concept
table	I-General_Concept
entries	O
in	O
PA-RISC	B-Device
1.1	O
and	O
PA-RISC	B-Device
2.0	O
support	O
read-only	O
,	O
read/write	O
,	O
read/execute	O
,	O
and	O
read/write/execute	O
pages	O
.	O
</s>
<s>
TLB	O
entries	O
in	O
Itanium	B-General_Concept
support	O
read-only	O
,	O
read/write	O
,	O
read/execute	O
,	O
and	O
read/write/execute	O
pages	O
.	O
</s>
<s>
As	O
of	O
the	O
twelfth	O
edition	O
of	O
the	O
z/Architecture	B-Device
Principles	O
of	O
Operation	O
,	O
z/Architecture	B-Device
processors	O
may	O
support	O
the	O
Instruction-Execution	O
Protection	O
facility	O
,	O
which	O
adds	O
a	O
bit	O
in	O
page	B-General_Concept
table	I-General_Concept
entries	O
that	O
controls	O
whether	O
instructions	O
from	O
a	O
given	O
region	O
,	O
segment	B-General_Concept
,	O
or	O
page	B-General_Concept
can	O
be	O
executed	O
.	O
</s>
