<s>
The	O
NS32000	B-Device
,	O
sometimes	O
known	O
as	O
the	O
32k	O
,	O
is	O
a	O
series	O
of	O
microprocessors	B-Architecture
produced	O
by	O
National	O
Semiconductor	O
.	O
</s>
<s>
The	O
first	O
member	O
of	O
the	O
family	O
came	O
to	O
market	O
in	O
1982	O
,	O
briefly	O
known	O
as	O
the	O
16032	B-Device
before	O
becoming	O
the	O
32016	B-Device
.	O
</s>
<s>
It	O
was	O
the	O
first	O
32-bit	O
general-purpose	O
microprocessor	B-Architecture
on	O
the	O
market	O
:	O
the	O
Motorola	B-Device
68000	I-Device
could	O
process	O
32-bit	O
data	O
and	O
stored	O
addresses	O
in	O
32	O
bits	O
but	O
could	O
only	O
address	O
16MiB	O
of	O
RAM	O
and	O
had	O
a	O
16-bit	O
ALU	B-General_Concept
,	O
whereas	O
the	O
32000	O
series	O
was	O
described	O
in	O
1983	O
as	O
the	O
only	O
microprocessor	B-Architecture
available	O
at	O
that	O
time	O
with	O
32-bit	O
internal	O
data	O
paths	O
and	O
ALU	B-General_Concept
.	O
</s>
<s>
However	O
,	O
the	O
32016	B-Device
contained	O
a	O
large	O
number	O
of	O
bugs	O
and	O
often	O
could	O
not	O
be	O
run	O
at	O
its	O
rated	O
speed	O
.	O
</s>
<s>
These	O
problems	O
,	O
and	O
the	O
presence	O
of	O
the	O
similar	O
Motorola	B-Device
68000	I-Device
which	O
had	O
been	O
available	O
since	O
1980	O
,	O
led	O
to	O
little	O
use	O
in	O
the	O
market	O
.	O
</s>
<s>
Several	O
improved	O
versions	O
followed	O
,	O
including	O
1985	O
's	O
32032	O
which	O
was	O
essentially	O
a	O
bug-fixed	O
32016	B-Device
with	O
an	O
external	O
32-bit	O
data	B-General_Concept
bus	I-General_Concept
.	O
</s>
<s>
While	O
it	O
offered	O
about	O
50%	O
better	O
speed	O
than	O
the	O
32016	B-Device
,	O
it	O
was	O
outperformed	O
by	O
the	O
32-bit	O
Motorola	B-Device
68020	I-Device
,	O
released	O
a	O
year	O
prior	O
.	O
</s>
<s>
The	O
32532	O
,	O
released	O
in	O
1987	O
,	O
outperformed	O
the	O
contemporary	O
Motorola	B-Device
68030	I-Device
by	O
almost	O
two	O
times	O
,	O
but	O
by	O
this	O
time	O
most	O
interest	O
in	O
microprocessors	B-Architecture
had	O
turned	O
to	O
RISC	B-Architecture
platforms	O
and	O
this	O
otherwise	O
excellent	O
design	O
saw	O
almost	O
no	O
use	O
as	O
well	O
.	O
</s>
<s>
National	O
was	O
working	O
on	O
further	O
improvements	O
in	O
the	O
32732	O
,	O
but	O
eventually	O
gave	O
up	O
attempting	O
to	O
compete	O
in	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
space	O
.	O
</s>
<s>
Instead	O
,	O
the	O
basic	O
32000	O
architecture	O
was	O
combined	O
with	O
several	O
support	O
systems	O
and	O
relaunched	O
as	O
the	O
Swordfish	O
microcontroller	B-Architecture
.	O
</s>
<s>
This	O
had	O
some	O
success	O
in	O
the	O
market	O
before	O
it	O
was	O
replaced	O
by	O
the	O
CompactRISC	B-Device
architecture	O
in	O
mid-1990s	O
.	O
</s>
<s>
The	O
NS32000	B-Device
series	O
traces	O
its	O
history	O
to	O
an	O
effort	O
by	O
National	O
Semiconductor	O
to	O
produce	O
a	O
single-chip	O
implementation	O
of	O
the	O
VAX-11	O
architecture	O
.	O
</s>
<s>
The	O
VAX	O
is	O
well	O
known	O
for	O
its	O
highly	O
"	O
orthogonal	B-General_Concept
"	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
,	O
in	O
which	O
any	O
instruction	O
can	O
be	O
applied	O
to	O
any	O
data	O
.	O
</s>
<s>
For	O
instance	O
,	O
an	O
ADD	O
instruction	O
might	O
add	O
the	O
contents	O
of	O
two	O
processor	B-General_Concept
registers	I-General_Concept
,	O
or	O
one	O
register	O
against	O
a	O
value	O
in	O
memory	O
,	O
two	O
values	O
in	O
memory	O
,	O
or	O
use	O
the	O
register	O
as	O
an	O
offset	O
against	O
an	O
address	O
.	O
</s>
<s>
This	O
flexibility	O
was	O
considered	O
the	O
paragon	O
of	O
design	O
in	O
the	O
era	O
of	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computers	I-Architecture
(	O
CISC	B-Architecture
)	O
.	O
</s>
<s>
Although	O
the	O
new	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
was	O
not	O
VAX-11	O
compatible	O
,	O
it	O
did	O
retain	O
its	O
highly	O
"	O
orthogonal	B-General_Concept
"	O
design	O
philosophy	O
.	O
</s>
<s>
The	O
original	O
processor	O
family	O
consisted	O
of	O
the	O
NS16032	B-Device
CPU	O
and	O
a	O
NS16C032	O
low-power	O
variant	O
,	O
both	O
having	O
a	O
16-bit	O
data	O
path	O
and	O
so	O
requiring	O
two	O
machine	O
cycles	O
to	O
load	O
a	O
single	O
32-bit	O
word	O
.	O
</s>
<s>
Both	O
could	O
be	O
used	O
with	O
the	O
NS16082	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
,	O
which	O
provided	O
24-bit	O
virtual	B-Architecture
memory	I-Architecture
support	O
for	O
up	O
to	O
16MB	O
physical	O
memory	O
.	O
</s>
<s>
The	O
NS16008	O
was	O
a	O
cut-down	O
version	O
with	O
an	O
8-bit	O
external	O
data	O
path	O
and	O
no	O
virtual	B-Architecture
memory	I-Architecture
support	O
,	O
which	O
had	O
a	O
reduced	O
pin	O
count	O
and	O
was	O
thus	O
somewhat	O
easier	O
to	O
implement	O
.	O
</s>
<s>
Early	O
announcements	O
of	O
the	O
family	O
included	O
the	O
NS16016	O
with	O
a	O
16-bit	O
data	B-General_Concept
bus	I-General_Concept
,	O
and	O
both	O
the	O
NS16008	O
and	O
NS16016	O
were	O
to	O
feature	O
an	O
emulation	O
mode	O
for	O
the	O
Intel	B-General_Concept
8080	I-General_Concept
running	O
at	O
four	O
times	O
the	O
speed	O
of	O
that	O
processor	O
.	O
</s>
<s>
The	O
former	O
was	O
essentially	O
a	O
version	O
of	O
the	O
NS16032	B-Device
with	O
a	O
32-bit	O
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
,	O
allowing	O
it	O
to	O
read	O
data	O
at	O
twice	O
the	O
rate	O
.	O
</s>
<s>
All	O
of	O
these	O
could	O
also	O
be	O
used	O
with	O
the	O
NS16081	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
The	O
instruction	B-General_Concept
set	I-General_Concept
is	O
very	O
much	O
in	O
the	O
CISC	B-Architecture
model	O
,	O
with	O
2-operand	O
instructions	O
,	O
memory-to-memory	O
operations	O
,	O
flexible	O
addressing	B-Language
modes	I-Language
,	O
and	O
variable-length	O
byte-aligned	O
instruction	O
encoding	O
.	O
</s>
<s>
Addressing	B-Language
modes	I-Language
can	O
involve	O
up	O
to	O
two	O
displacements	O
and	O
two	O
memory	O
indirections	O
per	O
operand	O
as	O
well	O
as	O
scaled	O
indexing	O
,	O
making	O
the	O
longest	O
conceivable	O
instruction	O
23	O
bytes	O
.	O
</s>
<s>
The	O
actual	O
number	O
of	O
instructions	O
is	O
much	O
lower	O
than	O
that	O
of	O
contemporary	O
RISC	B-Architecture
processors	I-Architecture
.	O
</s>
<s>
Unlike	O
some	O
other	O
processors	O
,	O
autoincrement	O
of	O
the	O
base	O
register	O
is	O
not	O
provided	O
;	O
the	O
only	O
exception	O
is	O
a	O
"	O
top	O
of	O
stack	O
"	O
addressing	B-Language
modes	I-Language
that	O
pop	O
sources	O
and	O
push	O
destinations	O
.	O
</s>
<s>
The	O
first	O
chip	O
in	O
the	O
series	O
was	O
originally	O
referred	O
to	O
as	O
the	O
16032	B-Device
,	O
but	O
later	O
renamed	O
32016	B-Device
to	O
emphasize	O
its	O
32-bit	O
internals	O
.	O
</s>
<s>
This	O
contrasts	O
it	O
with	O
its	O
primary	O
competitor	O
in	O
this	O
space	O
,	O
1979	O
's	O
Motorola	B-Device
68000	I-Device
(	O
68k	O
)	O
.	O
</s>
<s>
The	O
68k	O
used	O
32-bit	O
instructions	O
and	O
registers	O
,	O
but	O
its	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	B-General_Concept
)	O
,	O
which	O
controls	O
much	O
of	O
the	O
overall	O
processing	O
task	O
,	O
was	O
only	O
16-bit	O
.	O
</s>
<s>
This	O
meant	O
it	O
had	O
to	O
cycle	O
32-bit	O
data	O
through	O
the	O
ALU	B-General_Concept
twice	O
to	O
complete	O
an	O
operation	O
.	O
</s>
<s>
In	O
contrast	O
,	O
the	O
NS32000	B-Device
has	O
a	O
32-bit	O
ALU	B-General_Concept
,	O
so	O
that	O
16-bit	O
and	O
32-bit	O
instructions	O
take	O
the	O
same	O
time	O
to	O
complete	O
.	O
</s>
<s>
The	O
32016	B-Device
first	O
shipped	O
in	O
1982	O
in	O
a	O
46-pin	O
DIP	B-Algorithm
package	O
.	O
</s>
<s>
In	O
a	O
report	O
in	O
a	O
June	O
1983	O
publication	O
,	O
however	O
,	O
it	O
was	O
remarked	O
that	O
National	O
was	O
"	O
promising	O
production	O
quantities	O
this	O
summer	O
"	O
of	O
16032	B-Device
parts	O
,	O
having	O
been	O
"	O
shipping	O
sample	O
quantities	O
for	O
several	O
months	O
"	O
,	O
with	O
the	O
floating	O
point	O
co-processor	B-General_Concept
sampling	O
"	O
this	O
month	O
"	O
.	O
</s>
<s>
Although	O
a	O
1982	O
introduction	O
post-dates	O
the	O
68k	O
by	O
about	O
two	O
years	O
,	O
the	O
68k	O
was	O
not	O
yet	O
being	O
widely	O
used	O
in	O
the	O
market	O
and	O
the	O
32016	B-Device
generated	O
significant	O
interest	O
.	O
</s>
<s>
An	O
early	O
1985	O
article	O
about	O
the	O
32016-based	O
Whitechapel	B-Device
MG-1	I-Device
workstation	O
noted	O
that	O
the	O
32081	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
was	O
"	O
suffering	O
from	O
bugs	O
"	O
and	O
had	O
been	O
situated	O
on	O
its	O
own	O
board	O
providing	O
hardware	O
fixes	O
.	O
</s>
<s>
In	O
1986	O
,	O
Texas	O
Instruments	O
announced	O
a	O
"	O
fully	O
qualified	O
10MHz	O
TI32000	O
32-bit	O
microprocessor	B-Architecture
chip	O
set	O
"	O
consisting	O
of	O
the	O
TI32016	O
CPU	O
and	O
TI32082	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
as	O
48-pin	O
devices	O
,	O
the	O
TI32201	O
timing	O
control	O
unit	O
and	O
TI32081	O
floating-point	B-General_Concept
unit	I-General_Concept
as	O
24-pin	O
devices	O
,	O
and	O
the	O
TI32202	O
interrupt	O
control	O
unit	O
as	O
a	O
40-pin	O
device	O
,	O
with	O
the	O
five-device	O
chipset	O
"	O
priced	O
at	O
$289	O
in	O
100-unit	O
quantities	O
"	O
.	O
</s>
<s>
National	O
changed	O
its	O
design	O
methodology	O
to	O
make	O
it	O
possible	O
to	O
get	O
the	O
part	O
into	O
production	O
and	O
a	O
design	O
system	O
based	O
on	O
the	O
language	O
"	O
Z	B-Algorithm
"	O
was	O
co-developed	O
with	O
the	O
University	O
of	O
Tel-Aviv	O
,	O
close	O
to	O
the	O
"	O
NSC	O
"	O
design	O
centre	O
in	O
Herzliya	O
,	O
Israel	O
.	O
</s>
<s>
The	O
"	O
Z	B-Algorithm
"	O
language	O
is	O
similar	O
to	O
today	O
's	O
Verilog	B-Language
and	O
VHDL	B-Language
,	O
but	O
has	O
a	O
Pascal-like	O
syntax	O
and	O
is	O
optimized	O
for	O
two-phase	O
clock	O
designs	O
.	O
</s>
<s>
However	O
,	O
by	O
the	O
times	O
the	O
fruit	O
of	O
these	O
efforts	O
were	O
being	O
felt	O
in	O
the	O
design	O
,	O
numerous	O
68k	O
machines	O
were	O
already	O
on	O
the	O
market	O
,	O
notably	O
the	O
Apple	B-Device
Macintosh	I-Device
,	O
and	O
the	O
32016	B-Device
never	O
saw	O
widespread	O
use	O
.	O
</s>
<s>
The	O
32016	B-Device
has	O
a	O
16-bit	O
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
,	O
a	O
24-bit	O
external	O
address	B-Architecture
bus	I-Architecture
,	O
and	O
a	O
full	O
32-bit	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
It	O
also	O
includes	O
a	O
coprocessor	B-General_Concept
interface	O
,	O
allowing	O
coprocessors	B-General_Concept
such	O
as	O
FPUs	O
and	O
MMUs	B-General_Concept
to	O
be	O
attached	O
as	O
peers	O
to	O
the	O
main	O
processor	O
.	O
</s>
<s>
The	O
MMU	O
is	O
based	O
on	O
demand	B-General_Concept
paging	I-General_Concept
Virtual	B-Architecture
Memory	I-Architecture
,	O
which	O
is	O
the	O
most	O
unusual	O
feature	O
compared	O
to	O
the	O
segmented	O
memory	O
approach	O
used	O
by	O
the	O
competition	O
,	O
and	O
has	O
become	O
the	O
standard	O
for	O
how	O
microprocessors	B-Architecture
are	O
designed	O
today	O
.	O
</s>
<s>
While	O
often	O
compared	O
to	O
the	O
68k	O
's	O
instruction	B-General_Concept
set	I-General_Concept
,	O
this	O
was	O
rejected	O
by	O
NSC	O
employees	O
;	O
one	O
of	O
the	O
key	O
marketing	O
phrases	O
of	O
the	O
time	O
was	O
"	O
Elegance	O
is	O
Everything	O
"	O
,	O
comparing	O
the	O
highly	O
orthogonal	B-General_Concept
Series	O
32000	O
to	O
the	O
"	O
kludge	O
"	O
.	O
</s>
<s>
One	O
key	O
difference	O
is	O
Motorola	O
's	O
use	O
of	O
address	B-General_Concept
registers	I-General_Concept
and	O
data	O
registers	O
,	O
with	O
instructions	O
only	O
working	O
on	O
either	O
address	O
or	O
data	O
registers	O
.	O
</s>
<s>
It	O
is	O
almost	O
completely	O
compatible	O
with	O
the	O
32016	B-Device
,	O
but	O
features	O
a	O
32-bit	O
data	B-General_Concept
bus	I-General_Concept
(	O
although	O
keeping	O
the	O
24-bit	O
address	B-Architecture
bus	I-Architecture
)	O
for	O
somewhat	O
faster	O
performance	O
,	O
described	O
as	O
"	O
minicomputer	O
performance	O
"	O
comparable	O
with	O
that	O
of	O
a	O
VAX-11	O
system	O
.	O
</s>
<s>
There	O
was	O
also	O
a	O
32008	O
,	O
a	O
32016	B-Device
with	O
a	O
data	B-General_Concept
bus	I-General_Concept
cut	O
down	O
to	O
8-bits	O
wide	O
for	O
low-cost	O
applications	O
.	O
</s>
<s>
It	O
is	O
philosophically	O
similar	O
to	O
the	O
MC68008	B-Device
,	O
and	O
equally	O
unpopular	O
.	O
</s>
<s>
National	O
also	O
produced	O
a	O
series	O
of	O
related	O
support	O
chips	O
like	O
the	O
NS32081	O
Floating	B-General_Concept
Point	I-General_Concept
Unit	I-General_Concept
(	O
FPU	B-General_Concept
)	O
,	O
NS32082	O
Memory	B-General_Concept
Management	I-General_Concept
Units	I-General_Concept
(	O
MMUs	B-General_Concept
)	O
,	O
NS32203	O
Direct	B-General_Concept
Memory	I-General_Concept
Access	I-General_Concept
(	O
DMA	O
)	O
and	O
NS32202	O
Interrupt	O
Controllers	O
.	O
</s>
<s>
With	O
the	O
full	O
set	O
plus	O
memory	O
chips	O
and	O
peripherals	O
,	O
it	O
was	O
feasible	O
to	O
build	O
a	O
32-bit	O
computer	O
system	O
capable	O
of	O
supporting	O
modern	O
multi-tasking	O
operating	O
systems	O
,	O
something	O
that	O
had	O
previously	O
been	O
possible	O
only	O
on	O
expensive	O
minicomputers	O
and	O
mainframes	B-Architecture
.	O
</s>
<s>
From	O
the	O
datasheet	O
,	O
the	O
enhancements	O
include	O
"	O
the	O
addition	O
of	O
new	O
dedicated	O
addressing	O
hardware	O
(	O
consisting	O
of	O
a	O
high	O
speed	O
ALU	B-General_Concept
,	O
a	O
barrel	O
shifter	O
and	O
an	O
address	B-General_Concept
register	I-General_Concept
)	O
,	O
a	O
very	O
efficient	O
increased	O
(	O
20	O
bytes	O
)	O
instruction	O
prefetch	O
queue	O
,	O
a	O
new	O
system/memory	O
bus	O
interface/protocol	O
,	O
increased	O
efficiency	O
slave	O
processor	O
protocol	O
and	O
finally	O
enhancements	O
of	O
microcode.	O
"	O
</s>
<s>
There	O
was	O
also	O
a	O
new	O
NS32382	O
MMU	O
,	O
NS32381	O
FPU	B-General_Concept
and	O
the	O
(	O
very	O
rare	O
)	O
NS32310	O
interface	O
to	O
a	O
Weitek	O
FPA	O
.	O
</s>
<s>
The	O
aggregate	O
performance	O
boost	O
of	O
the	O
NS32332	O
from	O
these	O
enhancements	O
only	O
made	O
it	O
50	O
percent	O
faster	O
than	O
the	O
original	O
NS32032	O
,	O
and	O
therefore	O
less	O
than	O
that	O
of	O
the	O
main	O
competitor	O
,	O
the	O
MC68020	B-Device
.	O
</s>
<s>
Running	O
at	O
20-	O
,	O
25	O
-	O
&	O
30-MHz	O
,	O
it	O
was	O
a	O
complete	O
redesign	O
of	O
the	O
internal	O
implementation	O
with	O
a	O
five-stage	O
pipeline	O
,	O
an	O
integrated	O
Cache/MMU	O
and	O
improved	O
memory	O
performance	O
,	O
making	O
it	O
about	O
twice	O
as	O
performant	O
as	O
the	O
competing	O
MC68030	B-Device
and	O
i80386	B-General_Concept
.	O
</s>
<s>
At	O
this	O
stage	O
RISC	B-Architecture
architectures	I-Architecture
were	O
starting	O
to	O
make	O
inroads	O
,	O
and	O
the	O
main	O
competitors	O
became	O
the	O
now	O
equally	O
dead	O
AM29000	B-General_Concept
and	O
MC88000	B-Architecture
,	O
which	O
was	O
considered	O
faster	O
than	O
the	O
NS32532	O
.	O
</s>
<s>
The	O
NS32532	O
was	O
the	O
basis	O
of	O
the	O
PC532	B-Device
,	O
a	O
"	O
public	O
domain	O
"	O
hardware	O
project	O
,	O
and	O
one	O
of	O
the	O
few	O
to	O
produce	O
a	O
useful	O
machine	O
running	O
a	O
real	O
operating	O
system	O
(	O
in	O
this	O
case	O
,	O
Minix	B-Operating_System
or	O
NetBSD	B-Device
)	O
.	O
</s>
<s>
A	O
derivative	O
of	O
the	O
NS32732	O
called	O
Swordfish	O
was	O
aimed	O
at	O
embedded	B-Architecture
systems	I-Architecture
and	O
arrived	O
in	O
about	O
1990	O
.	O
</s>
<s>
Swordfish	O
has	O
an	O
integrated	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
,	O
timers	O
,	O
DMA	B-General_Concept
controllers	I-General_Concept
and	O
other	O
peripherals	O
not	O
normally	O
available	O
in	O
microprocessors	B-Architecture
.	O
</s>
<s>
It	O
has	O
a	O
64-bit	O
data	B-General_Concept
bus	I-General_Concept
and	O
is	O
internally	O
overclocked	O
from	O
25	O
to	O
50MHz	O
.	O
</s>
<s>
The	O
lessons	O
from	O
the	O
Swordfish	O
were	O
used	O
for	O
the	O
CompactRISC	B-Device
designs	O
.	O
</s>
<s>
In	O
the	O
beginning	O
,	O
there	O
were	O
both	O
a	O
CompactRISC-32	O
and	O
a	O
CompactRISC-16	O
,	O
designed	O
using	O
"	O
Z	B-Algorithm
"	O
.	O
</s>
<s>
National	O
never	O
brought	O
a	O
chip	O
to	O
the	O
market	O
with	O
the	O
CompactRISC-32	O
core	O
.	O
</s>
<s>
National	O
's	O
Research	O
department	O
worked	O
with	O
the	O
University	O
of	O
Michigan	O
to	O
develop	O
the	O
first	O
synthesizable	O
Verilog	B-Language
Model	O
,	O
and	O
Verilog	B-Language
was	O
used	O
from	O
the	O
CR16C	B-Device
and	O
onwards	O
.	O
</s>
<s>
Versions	O
of	O
the	O
older	O
NS32000	B-Device
line	O
for	O
low-cost	O
products	O
such	O
as	O
the	O
NS32CG16	O
,	O
NS32CG160	O
,	O
NS32FV16	O
,	O
NS32FX161	O
,	O
NS32FX164	O
and	O
the	O
NS32AM160/1/3	O
,	O
all	O
based	O
on	O
the	O
NS302CG16	O
were	O
introduced	O
from	O
1987	O
and	O
onwards	O
.	O
</s>
<s>
These	O
processors	O
had	O
some	O
success	O
in	O
the	O
laser	O
printer	O
and	O
fax	O
market	O
,	O
despite	O
intense	O
competition	O
from	O
AMD	O
and	O
Intel	O
RISC	B-Architecture
chips	O
.	O
</s>
<s>
The	O
key	O
difference	O
between	O
this	O
and	O
the	O
NS32C016	O
is	O
the	O
integration	O
of	O
the	O
expensive	O
TCU	O
(	O
Timing	O
Control	O
Unit	O
)	O
which	O
generates	O
the	O
needed	O
two-phase	O
clock	O
from	O
a	O
crystal	O
,	O
and	O
the	O
removal	O
of	O
the	O
floating	O
point	O
coprocessor	B-General_Concept
support	O
,	O
which	O
freed	O
up	O
microcode	O
space	O
for	O
the	O
useful	O
BitBLT	O
instruction	B-General_Concept
set	I-General_Concept
,	O
which	O
significantly	O
improves	O
the	O
performance	O
in	O
laser	O
printer	O
operations	O
,	O
making	O
this	O
60,000	O
transistor	O
chip	O
faster	O
than	O
the	O
200,000	O
transistor	O
MC68020	B-Device
.	O
</s>
<s>
The	O
NS32GX32	O
is	O
the	O
NS32532	O
without	O
the	O
MMU	O
sold	O
at	O
an	O
attractive	O
price	O
for	O
embedded	B-Architecture
system	I-Architecture
.	O
</s>
<s>
The	O
bus	O
usage	O
of	O
the	O
NS32032	O
is	O
about	O
50	O
percent	O
,	O
owing	O
to	O
its	O
very	O
compact	O
instruction	B-General_Concept
set	I-General_Concept
,	O
or	O
its	O
very	O
slow	O
pipeline	O
as	O
competitors	O
would	O
phrase	O
it	O
.	O
</s>
<s>
Prototype	O
systems	O
were	O
built	O
by	O
Diab	O
Data	O
AB	O
in	O
Sweden	O
,	O
but	O
did	O
not	O
perform	O
as	O
well	O
as	O
the	O
single-CPU	O
MC68020	B-Device
system	O
designed	O
by	O
the	O
same	O
company	O
.	O
</s>
<s>
In	O
June	O
2015	O
,	O
Udo	O
Möller	O
released	O
a	O
complete	O
Verilog	B-Language
implementation	O
of	O
an	O
NS32000	B-Device
processor	O
on	O
OpenCores	O
.	O
</s>
<s>
Fully	O
software-compatible	O
with	O
an	O
NS32532	O
CPU	O
with	O
N32381	O
FPU	B-General_Concept
,	O
it	O
is	O
significantly	O
faster	O
when	O
implemented	O
on	O
an	O
FPGA	O
,	O
both	O
operating	O
at	O
a	O
higher	O
clock	O
rate	O
and	O
using	O
fewer	O
cycles	O
per	O
instruction	O
.	O
</s>
