<s>
N-type	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
logic	O
uses	O
n-type	O
(	O
-	O
)	O
MOSFETs	B-Architecture
(	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
field-effect	I-Architecture
transistors	I-Architecture
)	O
to	O
implement	O
logic	O
gates	O
and	O
other	O
digital	O
circuits	O
.	O
</s>
<s>
These	O
nMOS	B-Architecture
transistors	I-Architecture
operate	O
by	O
creating	O
an	O
inversion	O
layer	O
in	O
a	O
p-type	O
transistor	O
body	O
.	O
</s>
<s>
Like	O
other	O
MOSFETs	B-Architecture
,	O
nMOS	B-Architecture
transistors	I-Architecture
have	O
four	O
modes	O
of	O
operation	O
:	O
cut-off	O
(	O
or	O
subthreshold	O
)	O
,	O
triode	O
,	O
saturation	O
(	O
sometimes	O
called	O
active	O
)	O
,	O
and	O
velocity	O
saturation	O
.	O
</s>
<s>
For	O
many	O
years	O
,	O
NMOS	O
circuits	O
were	O
much	O
faster	O
than	O
comparable	O
PMOS	B-Algorithm
and	O
CMOS	B-Device
circuits	O
,	O
which	O
had	O
to	O
use	O
much	O
slower	O
p-channel	O
transistors	O
.	O
</s>
<s>
It	O
was	O
also	O
easier	O
to	O
manufacture	O
NMOS	O
than	O
CMOS	B-Device
,	O
as	O
the	O
latter	O
has	O
to	O
implement	O
p-channel	O
transistors	O
in	O
special	O
n-wells	O
on	O
the	O
p-substrate	O
.	O
</s>
<s>
The	O
major	O
drawback	O
with	O
NMOS	O
(	O
and	O
most	O
other	O
logic	B-General_Concept
families	I-General_Concept
)	O
is	O
that	O
a	O
DC	O
current	O
must	O
flow	O
through	O
a	O
logic	O
gate	O
even	O
when	O
the	O
output	O
is	O
in	O
a	O
steady	O
state	O
(	O
low	O
in	O
the	O
case	O
of	O
NMOS	O
)	O
.	O
</s>
<s>
Additionally	O
,	O
just	O
like	O
in	O
diode	B-General_Concept
–	I-General_Concept
transistor	I-General_Concept
logic	I-General_Concept
,	O
transistor	B-General_Concept
–	I-General_Concept
transistor	I-General_Concept
logic	I-General_Concept
,	O
emitter-coupled	B-General_Concept
logic	I-General_Concept
etc.	O
,	O
the	O
asymmetric	O
input	O
logic	O
levels	O
make	O
NMOS	O
and	O
PMOS	B-Algorithm
circuits	O
more	O
susceptible	O
to	O
noise	O
than	O
CMOS	B-Device
.	O
</s>
<s>
These	O
disadvantages	O
are	O
why	O
CMOS	B-Device
logic	O
has	O
supplanted	O
most	O
of	O
these	O
types	O
in	O
most	O
high-speed	O
digital	O
circuits	O
such	O
as	O
microprocessors	B-Architecture
despite	O
the	O
fact	O
that	O
CMOS	B-Device
was	O
originally	O
very	O
slow	O
compared	O
to	O
logic	O
gates	O
built	O
with	O
bipolar	O
transistors	O
.	O
</s>
<s>
MOS	O
stands	O
for	O
metal-oxide-semiconductor	B-Architecture
,	O
reflecting	O
the	O
way	O
MOS-transistors	O
were	O
originally	O
constructed	O
,	O
predominantly	O
before	O
the	O
1970s	O
,	O
with	O
gates	O
of	O
metal	O
,	O
typically	O
aluminium	O
.	O
</s>
<s>
These	O
silicon	O
gates	O
are	O
still	O
used	O
in	O
most	O
types	O
of	O
MOSFET	B-Architecture
based	O
integrated	O
circuits	O
,	O
although	O
metal	O
gates	O
(	O
Al	O
or	O
Cu	O
)	O
started	O
to	O
reappear	O
in	O
the	O
early	O
2000s	O
for	O
certain	O
types	O
of	O
high	O
speed	O
circuits	O
,	O
such	O
as	O
high	O
performance	O
microprocessors	B-Architecture
.	O
</s>
<s>
The	O
MOSFETs	B-Architecture
are	O
n-type	O
enhancement	B-Algorithm
mode	I-Algorithm
transistors	O
,	O
arranged	O
in	O
a	O
so-called	O
"	O
pull-down	O
network	O
"	O
(	O
PDN	O
)	O
between	O
the	O
logic	O
gate	O
output	O
and	O
negative	O
supply	O
voltage	O
(	O
typically	O
the	O
ground	O
)	O
.	O
</s>
<s>
If	O
either	O
input	O
A	O
or	O
input	O
B	O
is	O
high	O
(	O
logic	O
1	O
,	O
=	O
True	O
)	O
,	O
the	O
respective	O
MOS	B-Architecture
transistor	I-Architecture
acts	O
as	O
a	O
very	O
low	O
resistance	O
between	O
the	O
output	O
and	O
the	O
negative	O
supply	O
,	O
forcing	O
the	O
output	O
to	O
be	O
low	O
(	O
logic	O
0	O
,	O
=	O
False	O
)	O
.	O
</s>
<s>
A	O
MOSFET	B-Architecture
can	O
be	O
made	O
to	O
operate	O
as	O
a	O
resistor	O
,	O
so	O
the	O
whole	O
circuit	O
can	O
be	O
made	O
with	O
n-channel	O
MOSFETs	B-Architecture
only	O
.	O
</s>
<s>
However	O
,	O
a	O
better	O
(	O
and	O
the	O
most	O
common	O
)	O
way	O
to	O
make	O
the	O
gates	O
faster	O
is	O
to	O
use	O
depletion-mode	B-Algorithm
transistors	O
instead	O
of	O
enhancement-mode	B-Architecture
transistors	O
as	O
loads	O
.	O
</s>
<s>
This	O
is	O
called	O
depletion-load	B-Algorithm
NMOS	I-Algorithm
logic	I-Algorithm
.	O
</s>
<s>
The	O
MOSFET	B-Architecture
was	O
invented	O
by	O
Egyptian	O
engineer	O
Mohamed	O
M	O
.	O
Atalla	O
and	O
Korean	O
engineer	O
Dawon	O
Kahng	O
at	O
Bell	O
Labs	O
in	O
1959	O
,	O
and	O
demonstrated	O
in	O
1960	O
.	O
</s>
<s>
They	O
fabricated	B-Architecture
both	O
PMOS	B-Algorithm
and	O
NMOS	O
devices	O
with	O
a	O
20µm	O
process	O
.	O
</s>
<s>
However	O
,	O
the	O
NMOS	O
devices	O
were	O
impractical	O
,	O
and	O
only	O
the	O
PMOS	B-Algorithm
type	O
were	O
practical	O
devices	O
.	O
</s>
<s>
In	O
1965	O
,	O
Chih-Tang	O
Sah	O
,	O
Otto	O
Leistiko	O
and	O
A.S.	O
Grove	O
at	O
Fairchild	O
Semiconductor	O
fabricated	B-Architecture
several	O
NMOS	O
devices	O
with	O
channel	O
lengths	O
between	O
8µm	O
and	O
65µm	O
.	O
</s>
<s>
Dale	O
L	O
.	O
Critchlow	O
and	O
Robert	O
H	O
.	O
Dennard	O
at	O
IBM	O
also	O
fabricated	B-Architecture
NMOS	O
devices	O
in	O
the	O
1960s	O
.	O
</s>
<s>
The	O
first	O
IBM	O
NMOS	O
product	O
was	O
a	O
memory	B-Architecture
chip	I-Architecture
with	O
1kb	O
data	O
and	O
50100	O
ns	O
access	B-General_Concept
time	I-General_Concept
,	O
which	O
entered	O
large-scale	O
manufacturing	O
in	O
the	O
early	O
1970s	O
.	O
</s>
<s>
This	O
led	O
to	O
MOS	O
semiconductor	B-Architecture
memory	I-Architecture
replacing	O
earlier	O
bipolar	O
and	O
ferrite-core	O
memory	O
technologies	O
in	O
the	O
1970s	O
.	O
</s>
<s>
The	O
earliest	B-General_Concept
microprocessors	I-General_Concept
in	O
the	O
early	O
1970s	O
were	O
PMOS	B-Algorithm
processors	O
,	O
which	O
initially	O
dominated	O
the	O
early	O
microprocessor	B-Architecture
industry	O
.	O
</s>
<s>
In	O
1973	O
,	O
NEC	O
's	O
μCOM-4	B-Device
was	O
an	O
early	O
NMOS	O
microprocessor	B-Architecture
,	O
fabricated	B-Architecture
by	O
the	O
NEC	O
LSI	O
team	O
,	O
consisting	O
of	O
five	O
researchers	O
led	O
by	O
Sohichi	O
Suzuki	O
.	O
</s>
<s>
By	O
the	O
late	O
1970s	O
,	O
NMOS	O
microprocessors	B-Architecture
had	O
overtaken	O
PMOS	B-Algorithm
processors	O
.	O
</s>
<s>
CMOS	B-Device
microprocessors	B-Architecture
were	O
introduced	O
in	O
1975	O
.	O
</s>
<s>
However	O
,	O
CMOS	B-Device
processors	O
did	O
not	O
become	O
dominant	O
until	O
the	O
1980s	O
.	O
</s>
<s>
CMOS	B-Device
was	O
initially	O
slower	O
than	O
NMOS	B-Algorithm
logic	I-Algorithm
,	O
thus	O
NMOS	O
was	O
more	O
widely	O
used	O
for	O
computers	O
in	O
the	O
1970s	O
.	O
</s>
<s>
The	O
Intel	O
5101	O
(	O
1kb	O
SRAM	B-Architecture
)	O
CMOS	B-Device
memory	B-Architecture
chip	I-Architecture
(	O
1974	O
)	O
had	O
an	O
access	B-General_Concept
time	I-General_Concept
of	O
800ns	O
,	O
whereas	O
the	O
fastest	O
NMOS	O
chip	O
at	O
the	O
time	O
,	O
the	O
Intel	O
2147	O
(	O
4kb	O
SRAM	B-Architecture
)	O
HMOS	O
memory	B-Architecture
chip	I-Architecture
(	O
1976	O
)	O
,	O
had	O
an	O
access	B-General_Concept
time	I-General_Concept
of	O
55/70ns	O
.	O
</s>
<s>
In	O
1978	O
,	O
a	O
Hitachi	O
research	O
team	O
led	O
by	O
Toshiaki	O
Masuhara	O
introduced	O
the	O
twin-well	O
Hi-CMOS	O
process	O
,	O
with	O
its	O
HM6147	O
(	O
4kb	O
SRAM	B-Architecture
)	O
memory	B-Architecture
chip	I-Architecture
,	O
manufactured	O
with	O
a	O
3	O
µm	O
process	O
.	O
</s>
<s>
With	O
comparable	O
performance	O
and	O
much	O
less	O
power	O
consumption	O
,	O
the	O
twin-well	O
CMOS	B-Device
process	O
eventually	O
overtook	O
NMOS	O
as	O
the	O
most	O
common	O
semiconductor	B-Architecture
manufacturing	I-Architecture
process	I-Architecture
for	O
computers	O
in	O
the	O
1980s	O
.	O
</s>
<s>
In	O
the	O
1980s	O
,	O
CMOS	B-Device
microprocessors	B-Architecture
overtook	O
NMOS	O
microprocessors	B-Architecture
.	O
</s>
