<s>
The	O
NEC	B-Device
V60	I-Device
is	O
a	O
CISC	B-Architecture
microprocessor	B-Architecture
manufactured	O
by	O
NEC	O
starting	O
in	O
1986	O
.	O
</s>
<s>
Several	O
improved	O
versions	O
were	O
introduced	O
with	O
the	O
same	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	B-General_Concept
)	O
,	O
the	O
V70	O
in	O
1987	O
,	O
and	O
the	O
V80	O
and	O
AFPP	O
in	O
1989	O
.	O
</s>
<s>
They	O
were	O
succeeded	O
by	O
the	O
V800	B-Device
product	O
families	O
,	O
which	O
is	O
currently	O
produced	O
by	O
Renesas	O
.	O
</s>
<s>
The	O
V60	B-Device
family	O
includes	O
a	O
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
and	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	B-General_Concept
)	O
and	O
real-time	B-Operating_System
operating	I-Operating_System
system	I-Operating_System
(	O
RTOS	B-Operating_System
)	O
support	O
for	O
both	O
Unix-based	O
user-application-oriented	O
systems	O
and	O
I-TRON	O
–	O
based	O
hardware-control-oriented	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
They	O
can	O
be	O
used	O
in	O
a	O
multi-cpu	O
lockstep	B-General_Concept
fault-tolerant	B-General_Concept
mechanism	I-General_Concept
named	O
FRM	O
.	O
</s>
<s>
Development	B-Application
tools	I-Application
included	O
Ada	B-Language
certified	O
system	O
MV-4000	O
,	O
and	O
an	O
in-circuit	B-Application
emulator	I-Application
(	O
ICE	O
)	O
.	O
</s>
<s>
The	O
V60/V70/V80	O
'	O
s	O
applications	O
covered	O
a	O
wide	O
area	O
,	O
including	O
circuit	B-Protocol
switching	I-Protocol
telephone	O
exchanges	O
,	O
minicomputers	B-Architecture
,	O
aerospace	O
guidance	O
systems	O
,	O
word	B-General_Concept
processors	I-General_Concept
,	O
industrial	B-Architecture
computers	I-Architecture
,	O
and	O
various	O
arcade	O
games	O
.	O
</s>
<s>
NEC	B-Device
V60	I-Device
is	O
a	O
CISC	B-Architecture
processor	I-Architecture
manufactured	O
by	O
NEC	O
starting	O
in	O
1986	O
.	O
</s>
<s>
It	O
was	O
the	O
first	O
32-bit	O
general-purpose	B-Architecture
microprocessor	I-Architecture
commercially	O
available	O
in	O
Japan	O
.	O
</s>
<s>
Based	O
on	O
a	O
relatively	O
traditional	O
design	O
for	O
the	O
period	O
,	O
the	O
V60	B-Device
was	O
a	O
radical	O
departure	O
from	O
NEC	O
's	O
previous	O
,	O
16-bit	O
V	O
–	O
series	O
processor	O
,	O
the	O
V20-V50	B-Device
,	O
which	O
were	O
based	O
on	O
the	O
Intel	B-General_Concept
8086	I-General_Concept
model	O
,	O
although	O
the	O
V60	B-Device
had	O
the	O
ability	O
to	O
emulate	O
the	O
V20/V30	O
.	O
</s>
<s>
According	O
to	O
NEC	O
's	O
documentation	O
,	O
this	O
computer	B-General_Concept
architectural	I-General_Concept
change	O
was	O
due	O
to	O
the	O
increasing	O
demands	O
for	O
,	O
and	O
the	O
diversity	O
of	O
,	O
high-level	B-Language
programming	I-Language
languages	I-Language
.	O
</s>
<s>
These	O
were	O
common	O
features	O
of	O
RISC	B-Architecture
chips	O
.	O
</s>
<s>
At	B-Operating_System
the	O
time	O
,	O
a	O
transition	O
from	O
CISC	B-Architecture
to	O
RISC	B-Architecture
seemed	O
to	O
bring	O
many	O
benefits	O
for	O
emerging	O
markets	O
.	O
</s>
<s>
Today	O
,	O
RISC	B-Architecture
chips	O
are	O
common	O
,	O
and	O
CISC	B-Architecture
designs	O
—	O
such	O
as	O
Intel	B-Operating_System
's	I-Operating_System
x86	I-Operating_System
and	O
the	O
80486	B-General_Concept
—	O
which	O
have	O
been	O
mainstream	O
for	O
several	O
decades	O
,	O
internally	O
adopt	O
RISC	B-Architecture
features	O
in	O
their	O
microarchitectures	B-General_Concept
.	O
</s>
<s>
According	O
to	O
Pat	O
Gelsinger	O
,	O
binary	O
backward	O
compatibility	O
for	O
legacy	O
software	O
is	O
more	O
important	O
than	O
changing	O
the	O
ISA	B-General_Concept
.	O
</s>
<s>
The	O
V60	B-Device
(	O
μPD70616	B-Device
)	O
retained	O
a	O
CISC	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
Its	O
manual	O
describes	O
their	O
architecture	B-General_Concept
as	O
having	O
"	O
features	O
of	O
high-end	O
mainframe	B-Architecture
and	O
supercomputers	B-Architecture
"	O
,	O
with	O
a	O
fully	O
orthogonal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
that	O
includes	O
non-uniform-length	O
instructions	O
,	O
memory-to-memory	O
operations	O
that	O
include	O
string	O
manipulation	O
,	O
and	O
complex	O
operand-addressing	O
schemes	O
.	O
</s>
<s>
The	O
V60	B-Device
operates	O
as	O
a	O
32	O
bit	O
processor	O
internally	O
,	O
whilst	O
externally	O
providing	O
16-bit	O
data	O
,	O
and	O
24-bit	O
address	O
,	O
buses	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
V60	B-Device
has	O
32	O
32-bit	O
general-purpose	O
registers	O
.	O
</s>
<s>
Its	O
basic	O
architecture	B-General_Concept
is	O
used	O
in	O
several	O
variants	O
.	O
</s>
<s>
Launched	O
in	O
1989	O
,	O
the	O
V80	O
( μPD70832	O
)	O
is	O
the	O
culmination	O
of	O
the	O
series	O
:	O
having	O
on-chip	O
caches	B-General_Concept
,	O
a	O
branch	B-General_Concept
predictor	I-General_Concept
,	O
and	O
less	O
reliance	O
on	O
microcode	B-Device
for	O
complex	O
operations	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
systems	I-General_Concept
developed	O
for	O
the	O
V60-V80	O
series	O
are	O
generally	O
oriented	O
toward	O
real-time	B-Operating_System
operations	O
.	O
</s>
<s>
Several	O
OSs	O
were	O
ported	O
to	O
the	O
series	O
,	O
including	O
real-time	B-Operating_System
versions	O
of	O
Unix	B-Application
and	O
I‑TRON	O
.	O
</s>
<s>
Because	O
the	O
V60/V70	O
was	O
used	O
in	O
various	O
Japanese	O
arcade	O
games	O
,	O
their	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
is	O
emulated	O
in	O
the	O
MAME	B-Device
CPU	O
simulator	O
.	O
</s>
<s>
The	O
latest	O
open-source	B-Application
code	O
is	O
available	O
from	O
the	O
GitHub	B-Application
repository	B-General_Concept
.	O
</s>
<s>
All	O
three	O
processors	O
have	O
the	O
FRM	O
(	O
Functional	O
Redundancy	O
Monitoring	O
)	O
synchronous	O
multiple	O
modular	O
lockstep	B-General_Concept
mechanism	O
,	O
which	O
enables	O
fault-tolerant	B-General_Concept
computer	I-General_Concept
systems	I-General_Concept
.	O
</s>
<s>
The	O
work	O
on	O
V60	B-Device
processor	O
began	O
in	O
1982	O
with	O
about	O
250	O
engineers	O
under	O
the	O
leadership	O
of	O
Yoichi	O
Yano	O
,	O
and	O
the	O
processor	O
debuted	O
in	O
February	O
1986	O
.	O
</s>
<s>
It	O
operates	O
at	B-Operating_System
5V	O
and	O
was	O
initially	O
packaged	O
in	O
a	O
68-pin	O
PGA	B-Algorithm
.	O
</s>
<s>
The	O
first	O
version	O
ran	O
at	B-Operating_System
16MHz	O
and	O
attained	O
3.5	O
MIPS	B-Device
.	O
</s>
<s>
Its	O
sample	O
price	O
at	B-Operating_System
launch	O
was	O
set	O
at	B-Operating_System
¥	O
100,000	O
(	O
$588.23	O
)	O
.	O
</s>
<s>
Sega	O
employed	O
this	O
processor	O
for	O
most	O
of	O
its	O
arcade	O
game	O
sets	O
in	O
the	O
1990s	O
;	O
both	O
the	O
Sega	O
System	O
32	O
and	O
the	O
Sega	O
Model	O
1	O
architectures	O
used	O
V60	B-Device
as	O
their	O
main	O
CPU	O
.	O
</s>
<s>
The	O
V60	B-Device
was	O
also	O
used	O
as	O
the	O
main	O
CPU	O
in	O
the	O
SSV	O
arcade	O
architecture	B-General_Concept
—	O
so	O
named	O
because	O
it	O
was	O
developed	O
jointly	O
by	O
Seta	O
,	O
Sammy	O
,	O
and	O
Visco	O
.	O
</s>
<s>
Sega	O
originally	O
considered	O
using	O
a	O
16MHz	O
V60	B-Device
as	O
the	O
basis	O
for	O
its	O
Sega	B-Device
Saturn	I-Device
console	O
;	O
but	O
after	O
receiving	O
word	O
that	O
the	O
PlayStation	B-Device
employed	O
a	O
33.8MHz	O
MIPS	B-Device
R3000A	B-Device
processor	O
,	O
instead	O
chose	O
the	O
dual-SH-2	O
design	O
for	O
the	O
production	O
model	O
.	O
</s>
<s>
In	O
1988	O
,	O
NEC	O
released	O
a	O
kit	O
called	O
PS98-145-HMW	O
for	O
Unix	B-Application
enthusiasts	O
.	O
</s>
<s>
The	O
kit	O
contained	O
a	O
V60	B-Device
processor	O
board	O
that	O
could	O
be	O
plugged	O
into	O
selected	O
models	O
of	O
the	O
PC-9800	B-Operating_System
computer	O
series	O
and	O
a	O
distribution	O
of	O
their	O
UNIX	B-Operating_System
System	I-Operating_System
V	I-Operating_System
port	O
,	O
the	O
PC-UX/V	B-Operating_System
Rel	O
2.0	O
(	O
V60	B-Device
)	O
,	O
on	O
15	O
8-inch	O
floppy	O
disks	O
.	O
</s>
<s>
NEC-group	O
companies	O
themselves	O
intensively	O
employed	O
the	O
V60	B-Device
processor	O
.	O
</s>
<s>
Their	O
telephone	O
circuit	O
switcher	O
(	O
exchange	O
)	O
,	O
which	O
was	O
one	O
of	O
the	O
first	O
intended	O
targets	O
,	O
used	O
V60	B-Device
.	O
</s>
<s>
In	O
1991	O
,	O
they	O
expanded	O
their	O
word	B-General_Concept
processor	I-General_Concept
products	O
line	O
with	O
Bungou	O
Mini	O
( 文豪ミニ	O
in	O
Japanese	O
)	O
series	O
5SX	O
,	O
7SX	O
,	O
and	O
7SD	O
,	O
which	O
used	O
the	O
V60	B-Device
for	O
fast	O
outline	O
font	O
processing	O
,	O
while	O
the	O
main	O
system	O
processor	O
was	O
a	O
16MHz	O
NEC	B-Device
V33	I-Device
.	O
</s>
<s>
In	O
addition	O
,	O
V60	B-Device
microcode	B-Device
variants	O
were	O
employed	O
in	O
NEC	O
's	O
MS-4100	O
minicomputer	B-Architecture
series	O
,	O
which	O
was	O
the	O
fastest	O
one	O
in	O
Japan	O
at	B-Operating_System
that	O
time	O
.	O
</s>
<s>
The	O
V70	O
( μPD70632	O
)	O
improved	O
on	O
the	O
V60	B-Device
by	O
increasing	O
the	O
external	O
buses	O
to	O
32	O
bits	O
,	O
equal	O
to	O
the	O
internal	O
buses	O
.	O
</s>
<s>
Its	O
die	O
had	O
385,000	O
transistors	O
and	O
was	O
packaged	O
in	O
a	O
132-pin	O
ceramic	O
PGA	B-Algorithm
.	O
</s>
<s>
Its	O
MMU	B-General_Concept
had	O
support	O
for	O
demand	B-General_Concept
paging	I-General_Concept
.	O
</s>
<s>
Its	O
floating-point	B-General_Concept
unit	I-General_Concept
was	O
IEEE	O
754	O
compliant	O
.	O
</s>
<s>
The	O
20MHz	O
version	O
attained	O
a	O
peak	O
performance	O
of	O
6.6	O
MIPS	B-Device
and	O
was	O
priced	O
,	O
at	B-Operating_System
launch	O
in	O
August	O
1987	O
,	O
at	B-Operating_System
¥	O
100,000	O
(	O
$719.42	O
)	O
.	O
</s>
<s>
A	O
later	O
report	O
describes	O
it	O
as	O
fabricated	B-Architecture
in	O
1.2-micrometer	O
CMOS	O
on	O
a	O
die	O
.	O
</s>
<s>
The	O
V70	O
had	O
a	O
two-cycle	O
non-pipeline	O
(	O
T1-T2	O
)	O
external	O
bus	O
system	O
,	O
whereas	O
that	O
of	O
the	O
V60	B-Device
operated	O
at	B-Operating_System
3	O
or	O
4	O
cycles	O
(	O
T1-T3/T4	O
)	O
.	O
</s>
<s>
JAXA	O
embedded	B-Architecture
its	O
variant	O
of	O
the	O
V70	O
,	O
with	O
the	O
I-TRON	O
RX616	B-Operating_System
operating	B-General_Concept
system	I-General_Concept
,	O
in	O
the	O
Guidance	O
Control	O
Computer	O
of	O
the	O
H-IIA	O
carrier	O
rockets	O
,	O
in	O
satellites	O
such	O
as	O
the	O
Akatsuki	O
(	O
Venus	O
Climate	O
Orbiter	O
)	O
,	O
and	O
the	O
Kibo	O
International	O
Space	O
Station	O
(	O
ISS	O
)	O
module	O
.	O
</s>
<s>
This	O
variant	O
was	O
used	O
until	O
its	O
replacement	O
,	O
in	O
2013	O
,	O
by	O
the	O
HR5000	O
64-bit	O
,	O
25MHz	O
microprocessor	B-Architecture
,	O
which	O
is	O
based	O
on	O
the	O
MIPS64-5Kf	O
architecture	B-General_Concept
,	O
fabricated	B-Architecture
by	O
HIREC	O
,	O
whose	O
development	O
was	O
completed	O
around	O
2011	O
.	O
</s>
<s>
"	O
Space	O
Environment	O
Data	O
Acquisition	O
"	O
for	O
the	O
V70	O
was	O
done	O
at	B-Operating_System
the	O
Kibo-ISS	O
exposed	O
facility	O
.	O
</s>
<s>
By	O
incorporating	O
on-chip	O
caches	B-General_Concept
and	O
a	O
branch	B-General_Concept
predictor	I-General_Concept
,	O
it	O
was	O
declared	O
NEC	O
's	O
486	B-General_Concept
by	O
Computer	O
Business	O
Review	O
.	O
</s>
<s>
(	O
For	O
more	O
detailed	O
differences	O
,	O
see	O
the	O
hardware	O
architecture	B-General_Concept
section	O
below	O
.	O
)	O
</s>
<s>
It	O
was	O
packaged	O
in	O
a	O
280-pin	O
PGA	B-Algorithm
,	O
and	O
operated	O
at	B-Operating_System
25	O
and	O
33MHz	O
with	O
claimed	O
peak	O
performances	O
of	O
12.5	O
and	O
16.5	O
MIPS	B-Device
,	O
respectively	O
.	O
</s>
<s>
The	O
V80	O
had	O
separate	O
1KB	O
on-die	O
caches	B-General_Concept
for	O
both	O
instructions	O
and	O
data	O
.	O
</s>
<s>
It	O
had	O
a	O
64-entry	O
branch	B-General_Concept
predictor	I-General_Concept
,	O
a	O
5%	O
performance	O
gain	O
being	O
attributed	O
to	O
it	O
.	O
</s>
<s>
The	O
V80	O
,	O
with	O
μPD72691	O
co-FPP	O
and	O
μPD71101	O
simple	O
peripheral	O
chips	O
,	O
was	O
used	O
for	O
an	O
industrial	B-Architecture
computer	I-Architecture
running	O
the	O
RX-UX832	B-Operating_System
real-time	B-Operating_System
UNIX	B-Application
operating	I-Application
system	I-Application
and	O
a	O
X11-R4-based	O
windowing	O
system	O
.	O
</s>
<s>
The	O
Advanced	O
Floating	B-General_Concept
Point	I-General_Concept
Processor	I-General_Concept
(	O
AFPP	O
)	O
( μPD72691	O
)	O
is	O
a	O
co-processor	O
for	O
floating-point	O
arithmetic	O
operations	O
.	O
</s>
<s>
The	O
V60/V70/V80	O
themselves	O
can	O
perform	O
floating-point	O
arithmetic	O
,	O
but	O
they	O
are	O
very	O
slow	O
because	O
they	O
lack	O
hardware	O
dedicated	O
to	O
such	O
operations	O
.	O
</s>
<s>
In	O
1989	O
,	O
to	O
compensate	O
V60/V70/V80	O
for	O
their	O
fairly	O
weak	O
floating-point	O
performance	O
,	O
NEC	O
launched	O
this	O
80-bit	O
floating-point	O
co-processor	O
for	O
32-bit	O
single	O
precision	O
,	O
64-bit	O
double	O
precision	O
,	O
and	O
80-bit	O
extended	B-Algorithm
precision	I-Algorithm
operations	O
according	O
to	O
IEEE	O
754	O
specifications	O
.	O
</s>
<s>
This	O
chip	O
had	O
a	O
performance	O
of	O
6.7	O
MFLOPS	O
,	O
doing	O
vector-matrix	O
multiplication	O
while	O
operating	O
at	B-Operating_System
20MHz	O
.	O
</s>
<s>
It	O
was	O
fabricated	B-Architecture
using	O
a	O
1.2-micrometer	O
double-metal	O
layer	O
CMOS	O
process	O
,	O
resulting	O
in	O
433,000	O
transistors	O
on	O
an	O
die	O
.	O
</s>
<s>
It	O
was	O
packaged	O
in	O
a	O
68-pin	O
PGA	B-Algorithm
.	O
</s>
<s>
This	O
co-processor	O
connected	O
to	O
a	O
V80	O
via	O
a	O
dedicated	O
bus	O
,	O
to	O
a	O
V60	B-Device
or	O
V70	O
via	O
a	O
shared	O
main	O
bus	O
,	O
which	O
constrained	O
peak	O
performance	O
.	O
</s>
<s>
The	O
V60/V70/V80	O
shared	O
a	O
basic	O
architecture	B-General_Concept
.	O
</s>
<s>
They	O
had	O
thirty-two	O
32-bit	O
general-purpose	O
registers	O
,	O
with	O
the	O
last	O
three	O
of	O
them	O
commonly	O
used	O
as	O
stack	O
pointer	O
,	O
frame	O
pointer	O
,	O
and	O
argument	O
pointer	O
,	O
which	O
well	O
matched	O
high	B-Language
level	I-Language
language	I-Language
compilers	B-Language
 '	O
calling	O
conventions	O
.	O
</s>
<s>
The	O
V60	B-Device
and	O
V70	O
have	O
119	O
machine	O
instructions	O
,	O
with	O
that	O
number	O
being	O
extended	O
slightly	O
to	O
123	O
instructions	O
for	O
the	O
V80	O
.	O
</s>
<s>
The	O
instructions	O
are	O
of	O
non-uniform	B-Architecture
length	I-Architecture
,	O
between	O
one	O
and	O
22	O
bytes	O
,	O
and	O
take	O
two	O
operands	O
,	O
both	O
of	O
which	O
can	O
be	O
addresses	O
in	O
main	O
memory	O
.	O
</s>
<s>
After	O
studying	O
the	O
V60	B-Device
's	O
reference	O
manual	O
,	O
Paul	O
Vixie	O
described	O
it	O
as	O
"	O
a	O
very	O
VAX-ish	O
arch	O
,	O
with	O
a	O
V20/V30	O
emulation	O
mode	O
(	O
which[ 	O
...	O
]	O
means	O
it	O
can	O
run	O
Intel	O
8086/8088	O
software	O
)	O
"	O
.	O
</s>
<s>
The	O
V60	B-Device
–	O
V80	O
has	O
a	O
built-in	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	B-General_Concept
)	O
that	O
divides	O
a	O
4-GB	O
virtual	B-Architecture
address	I-Architecture
space	I-Architecture
into	O
four	O
1-GB	O
sections	O
,	O
each	O
section	O
being	O
further	O
divided	O
into	O
1,024	O
1-MB	O
areas	O
,	O
and	O
each	O
area	O
being	O
composed	O
of	O
256	O
4-KB	O
pages	O
.	O
</s>
<s>
On	O
the	O
V60/V70	O
,	O
four	O
registers	O
(	O
ATBR0	O
to	O
ATBR3	O
)	O
store	O
section	O
pointers	O
,	O
but	O
the	O
"	O
area	O
tables	O
entries	O
"	O
(	O
ATE	O
)	O
and	O
page	O
tables	O
entries	O
(	O
PTE	O
)	O
are	O
stored	O
in	O
off-chip	O
RAM	O
.	O
</s>
<s>
The	O
V80	O
merged	O
the	O
ATE	O
and	O
ATBR	O
registers	O
—	O
which	O
are	O
both	O
on-chip	O
,	O
with	O
only	O
the	O
PTE	O
entries	O
stored	O
in	O
external	O
RAM	O
—	O
allowing	O
for	O
faster	O
execution	O
of	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	B-Architecture
)	O
misses	O
by	O
eliminating	O
one	O
memory	O
read	O
.	O
</s>
<s>
The	O
translation	B-Architecture
lookaside	I-Architecture
buffers	I-Architecture
on	O
the	O
V60/70	O
are	O
16-entry	O
fully	O
associative	O
with	O
replacement	O
done	O
by	O
microcode	B-Device
.	O
</s>
<s>
The	O
V80	O
,	O
in	O
contrast	O
,	O
has	O
a	O
64-entry	O
2-way	O
set	O
associative	O
TLB	B-Architecture
with	O
replacement	O
done	O
in	O
hardware	O
.	O
</s>
<s>
TLB	B-Architecture
replacement	O
took	O
58	O
cycles	O
in	O
the	O
V70	O
and	O
disrupted	O
the	O
pipelined	O
execution	O
of	O
other	O
instructions	O
.	O
</s>
<s>
On	O
the	O
V80	O
,	O
a	O
TLB	B-Architecture
replacement	O
takes	O
only	O
6	O
or	O
11	O
cycles	O
depending	O
on	O
whether	O
the	O
page	O
is	O
in	O
the	O
same	O
area	O
;	O
pipeline	O
disruption	O
no	O
longer	O
occurs	O
in	O
the	O
V80	O
because	O
of	O
the	O
separate	O
TLB	B-Architecture
replacement	O
hardware	O
unit	O
,	O
which	O
operates	O
in	O
parallel	O
with	O
the	O
rest	O
of	O
the	O
processor	O
.	O
</s>
<s>
All	O
three	O
processors	O
use	O
the	O
same	O
protection	O
mechanism	O
,	O
with	O
4	O
protection	B-Operating_System
levels	I-Operating_System
set	O
via	O
a	O
program	B-Device
status	I-Device
word	I-Device
,	O
Ring	B-Operating_System
0	I-Operating_System
being	O
the	O
privileged	O
level	O
that	O
could	O
access	O
a	O
special	O
set	O
of	O
registers	O
on	O
the	O
processors	O
.	O
</s>
<s>
All	O
three	O
models	O
support	O
a	O
triple-mode	O
redundancy	O
configuration	O
with	O
three	O
CPUs	O
used	O
in	O
a	O
byzantine	B-Operating_System
fault	I-Operating_System
–	O
tolerance	O
scheme	O
with	O
bus	O
freeze	O
,	O
instruction	O
retry	O
,	O
and	O
chip	O
replacement	O
signals	O
.	O
</s>
<s>
String	O
operations	O
were	O
implemented	O
in	O
microcode	B-Device
in	O
the	O
V60/V70	O
;	O
but	O
these	O
were	O
aided	O
by	O
a	O
hardware	O
data	O
control	B-General_Concept
unit	I-General_Concept
,	O
running	O
at	B-Operating_System
full	O
bus	O
speed	O
,	O
in	O
the	O
V80	O
.	O
</s>
<s>
This	O
made	O
string	O
operations	O
about	O
five	O
times	O
faster	O
in	O
the	O
V80	O
than	O
in	O
the	O
V60/V70	O
.	O
</s>
<s>
All	O
floating-point	O
operations	O
are	O
largely	O
implemented	O
in	O
microcode	B-Device
across	O
the	O
processor	O
family	O
and	O
are	O
thus	O
fairly	O
slow	O
.	O
</s>
<s>
On	O
the	O
V60/V70	O
,	O
the	O
32-bit	O
floating-point	O
operations	O
take	O
120/116/137	O
cycles	O
for	O
addition/multiplication/division	O
,	O
while	O
the	O
corresponding	O
64-bit	O
floating-point	O
operations	O
take	O
178/270/590	O
cycles	O
.	O
</s>
<s>
decomposition	O
into	O
sign	O
,	O
exponent	O
,	O
and	O
mantissa	O
—	O
thus	O
its	O
floating-point	B-General_Concept
unit	I-General_Concept
was	O
claimed	O
to	O
be	O
up	O
to	O
three	O
times	O
as	O
effective	O
as	O
that	O
of	O
the	O
V70	O
,	O
with	O
32-bit	O
floating-point	O
operations	O
taking	O
36/44/74	O
cycles	O
and	O
64-bit	O
operations	O
taking	O
75/110/533	O
cycles	O
(	O
addition/multiplication/division	O
)	O
.	O
</s>
<s>
NEC	O
ported	O
several	O
variants	O
of	O
the	O
Unix	B-Application
operating	I-Application
system	I-Application
to	O
its	O
V60/V70/V80	O
processors	O
for	O
user-application-oriented	O
systems	O
,	O
including	O
real-time	B-Operating_System
ones	O
.	O
</s>
<s>
The	O
first	O
flavor	O
of	O
NEC	O
's	O
UNIX	B-Operating_System
System	I-Operating_System
V	I-Operating_System
port	O
for	O
V60	B-Device
was	O
called	O
PC-UX/V	B-Operating_System
Rel	O
2.0	O
(	O
V60	B-Device
)	O
.	O
</s>
<s>
NEC	O
developed	O
a	O
Unix	B-Application
variant	O
with	O
a	O
focus	O
on	O
real-time	B-Operating_System
operation	I-Operating_System
to	O
run	O
on	O
V60/V70/V80	O
.	O
</s>
<s>
Called	O
Real-time	B-Operating_System
UNIX	B-Application
RX-UX	O
832	O
,	O
it	O
has	O
a	O
double-layered	O
kernel	O
structure	O
,	O
with	O
all	O
task	O
scheduling	O
handled	O
by	O
the	O
real-time	B-Operating_System
kernel	O
.	O
</s>
<s>
A	O
multiprocessor	O
version	O
of	O
RX-UX	O
832	O
was	O
also	O
developed	O
,	O
named	O
MUSTARD	O
(	O
Multiprocessor	O
Unix	B-Application
for	O
Embedded	B-Architecture
Real-Time	B-Operating_System
Systems	O
)	O
.	O
</s>
<s>
For	O
hardware-control-oriented	O
embedded	B-Architecture
systems	I-Architecture
,	O
the	O
I-TRON-based	O
real-time	B-Operating_System
operating	I-Operating_System
system	I-Operating_System
,	O
named	O
RX616	B-Operating_System
,	O
was	O
implemented	O
by	O
NEC	O
for	O
the	O
V60/V70	O
.	O
</s>
<s>
The	O
32-bit	O
RX616	B-Operating_System
was	O
a	O
continuous	O
fork	O
from	O
the	O
16-bit	O
RX116	O
,	O
which	O
was	O
for	O
the	O
V20-V50	B-Device
.	O
</s>
<s>
In	O
1987	O
,	O
Digital	O
Research	O
,	O
Inc	O
.	O
also	O
announced	O
that	O
they	O
were	O
planning	O
on	O
porting	O
FlexOS	B-Operating_System
to	O
the	O
V60	B-Device
and	O
V70	O
.	O
</s>
<s>
The	O
V60	B-Device
could	O
also	O
run	O
CP/M	B-Application
and	O
DOS	B-Device
programs	O
(	O
ported	O
from	O
the	O
V20-V50	B-Device
series	O
)	O
using	O
V20/V30	O
emulation	O
mode	O
.	O
</s>
<s>
According	O
to	O
a	O
1991	O
article	O
in	O
InfoWorld	O
,	O
Digital	O
Research	O
was	O
working	O
on	O
a	O
version	O
of	O
Concurrent	B-Operating_System
DOS	I-Operating_System
for	O
the	O
V60	B-Device
at	B-Operating_System
some	O
point	O
;	O
but	O
this	O
was	O
never	O
released	O
,	O
as	O
the	O
V60/V70	O
processors	O
were	O
not	O
imported	O
to	O
the	O
US	O
for	O
use	O
in	O
PC	O
clones	O
.	O
</s>
<s>
As	O
part	O
of	O
its	O
development	B-Application
tool	I-Application
kit	O
and	O
integrated	B-Application
development	I-Application
environment	I-Application
(	O
IDE	O
)	O
,	O
NEC	O
had	O
its	O
own	O
C-compiler	O
,	O
the	O
PKG70616	O
"	O
Software	O
Generation	O
tool	O
package	O
for	O
V60/V70	O
"	O
.	O
</s>
<s>
In	O
addition	O
,	O
GHS	O
(	O
Green	O
Hills	O
Software	O
)	O
made	O
its	O
native	O
mode	O
C	B-Language
compiler	B-Language
(	O
MULTI	O
)	O
,	O
and	O
MetaWare	O
,	O
Inc	O
.	O
(	O
currently	O
Synopsys	O
,	O
via	O
ARC	O
International	O
)	O
made	O
one	O
,	O
for	O
V20/V30	O
(	O
Intel	B-General_Concept
8086	I-General_Concept
)	O
,	O
emulation	O
mode	O
,	O
called	O
High	O
C/C	O
++	O
.	O
</s>
<s>
Cygnus	O
Solutions	O
(	O
currently	O
Red	O
Hat	O
)	O
also	O
ported	O
GCC	B-Application
as	O
a	O
part	O
of	O
an	O
enhanced	O
GNU	B-Application
compiler	I-Application
system	O
(	O
EGCS	O
)	O
fork	O
,	O
but	O
it	O
seems	O
not	O
to	O
be	O
public	O
.	O
</s>
<s>
,	O
the	O
processor-specific	O
directory	O
necv70	O
is	O
still	O
kept	O
alive	O
in	O
the	O
newlib	B-Language
C-language	O
libraries	O
(	O
libc.a	O
and	O
libm.a	O
)	O
by	O
RedHat	O
.	O
</s>
<s>
The	O
latest	O
source	O
code	O
is	O
available	O
from	O
its	O
git	B-Application
repository	B-General_Concept
.	O
</s>
<s>
The	O
Ada	B-Language
83	I-Language
–	O
certified	O
"	O
platform	O
system	O
"	O
was	O
named	O
MV‑4000	O
,	O
certified	O
as	O
"	O
MV4000	O
"	O
.	O
</s>
<s>
This	O
certification	O
was	O
done	O
with	O
a	O
target	O
system	O
,	O
that	O
utilized	O
the	O
real-time	B-Operating_System
UNIX	B-Application
RX-UX	O
832	O
OS	O
running	O
on	O
a	O
VMEbus	B-Architecture
(	O
IEEE	O
1014	O
)	O
–	O
based	O
system	O
with	O
a	O
V70	O
processor	O
board	O
plugged	O
in	O
.	O
</s>
<s>
The	O
host	O
of	O
the	O
cross	B-Application
compiler	I-Application
was	O
an	O
NEC	O
Engineering	O
Work	O
Station	O
EWS	O
4800	O
,	O
whose	O
host	O
OS	O
,	O
EWS-US/V	B-Operating_System
,	O
was	O
also	O
UNIX	B-Application
System	I-Application
V	O
–	O
based	O
.	O
</s>
<s>
The	O
processor	O
received	O
Ada-83	O
validation	O
from	O
AETECH	O
,	O
Inc.	O
,	O
running	O
the	O
Ada	B-Language
Compiler	I-Language
Validation	I-Language
Capability	I-Language
tests	O
.	O
</s>
<s>
NEC	O
released	O
some	O
plug-in	O
evaluation	O
board	O
kits	O
for	O
the	O
V60/V70	O
.	O
</s>
<s>
NEC	O
based	O
its	O
own	O
full	O
(	O
non-ROM	O
and	O
non-JTAG	O
)	O
probe-based	O
in-circuit	B-Application
emulator	I-Application
,	O
the	O
IE-V60	O
,	O
on	O
the	O
V60	B-Device
,	O
because	O
V60/V70	O
chips	O
themselves	O
had	O
emulator-chip	O
capabilities	O
.	O
</s>
<s>
The	O
IE-V60	O
was	O
the	O
first	O
in-circuit	B-Application
emulator	I-Application
for	O
V60	B-Device
that	O
was	O
manufactured	O
by	O
NEC	O
.	O
</s>
<s>
The	O
external	O
bus	O
system	O
indicates	O
its	O
bus	O
status	O
using	O
3	O
status	O
pins	O
,	O
which	O
provide	O
three	O
bits	O
to	O
signal	O
such	O
conditions	O
as	O
first	O
instruction	O
fetch	O
after	O
branch	O
,	O
continuous	O
instruction	O
fetch	O
,	O
TLB	B-Architecture
data	B-General_Concept
access	I-General_Concept
,	O
single	O
data	B-General_Concept
access	I-General_Concept
,	O
and	O
sequential	B-General_Concept
data	I-General_Concept
access	I-General_Concept
.	O
</s>
<s>
However	O
,	O
the	O
V80	O
did	O
not	O
have	O
an	O
in-circuit	B-Application
emulator	I-Application
,	O
possibly	O
because	O
the	O
presence	O
of	O
such	O
software	O
as	O
real-time	B-Operating_System
UNIX	B-Application
RX-UX	O
832	O
and	O
real-time	B-Operating_System
I-TRON	O
RX616	B-Operating_System
rendered	O
such	O
a	O
function	O
unnecessary	O
.	O
</s>
<s>
Once	O
Unix	B-Application
boots	O
up	O
,	O
there	O
is	O
no	O
need	O
for	O
an	O
in-circuit	B-Application
emulator	I-Application
for	O
developing	O
either	O
device	B-Application
drivers	I-Application
or	O
application	B-Application
software	I-Application
.	O
</s>
<s>
What	O
is	O
needed	O
is	O
a	O
C	B-Language
compiler	B-Language
,	O
a	O
cross	B-Application
compiler	I-Application
,	O
and	O
a	O
screen	O
debugger	O
—	O
such	O
as	O
GDB-Tk	O
—	O
that	O
works	O
with	O
the	O
target	O
device	O
,	O
.	O
</s>
<s>
Hewlett	O
Packard	O
(	O
currently	O
Keysight	O
)	O
offered	O
probing-pod-based	O
in-circuit	B-Application
emulation	I-Application
hardware	O
for	O
the	O
V70	O
,	O
built	O
on	O
their	O
HP	O
64700	O
Series	O
systems	O
,	O
the	O
successor	O
to	O
the	O
HP	B-Device
64000	I-Device
Series	O
,	O
specifically	O
the	O
HP	O
64758	O
.	O
</s>
<s>
This	O
test	O
equipment	O
also	O
displays	O
disassembled	O
source	O
code	O
automatically	O
,	O
with	O
trace	O
data	O
display	O
and	O
without	O
an	O
object	B-Application
file	I-Application
,	O
and	O
displays	O
high-level	B-Language
language	I-Language
source	O
code	O
when	O
the	O
source	O
code	O
and	O
the	O
object	B-Application
files	I-Application
are	O
provided	O
and	O
they	O
were	O
compiled	B-Language
in	O
DWARF	O
format	O
.	O
</s>
<s>
An	O
interface	O
for	O
the	O
V60	B-Device
(	O
10339G	O
)	O
was	O
also	O
in	O
the	O
catalog	O
,	O
but	O
the	O
long	O
probing-pod	O
cable	O
required	O
"	O
special	O
grade	O
qualified	O
"	O
devices	O
,	O
i.e.	O
</s>
<s>
In	O
its	O
development	O
phase	O
,	O
the	O
V80	O
was	O
thought	O
to	O
have	O
the	O
same	O
performance	O
as	O
the	O
Intel	B-General_Concept
80486	I-General_Concept
,	O
but	O
they	O
ended	O
up	O
having	O
many	O
different	O
features	O
.	O
</s>
<s>
The	O
internal	O
execution	O
for	O
each	O
instruction	O
of	O
the	O
V80	O
needed	O
at	B-Operating_System
least	O
two	O
cycles	O
,	O
while	O
that	O
of	O
i486	B-General_Concept
required	O
one	O
.	O
</s>
<s>
The	O
internal	O
pipeline	O
of	O
the	O
V80	O
seemed	O
buffered	O
asynchronous	O
,	O
but	O
that	O
of	O
i486	B-General_Concept
was	O
synchronous	O
.	O
</s>
<s>
In	O
other	O
words	O
,	O
the	O
internal	O
microarchitecture	B-General_Concept
of	O
V80	O
was	O
CISC	B-Architecture
,	O
but	O
that	O
of	O
i486	B-General_Concept
was	O
RISC	B-Architecture
.	O
</s>
<s>
Both	O
of	O
their	O
ISAs	O
allowed	O
long	O
non-uniform	O
CISC	B-Architecture
instructions	O
,	O
but	O
the	O
i486	B-General_Concept
had	O
a	O
wider	O
,	O
128-bit	O
internal	O
cache	B-General_Concept
memory	I-General_Concept
bus	O
,	O
while	O
that	O
of	O
V80	O
had	O
a	O
32-bit	O
width	O
.	O
</s>
<s>
The	O
V60-V80	O
architecture	B-General_Concept
did	O
not	O
enjoy	O
much	O
commercial	O
success	O
.	O
</s>
<s>
The	O
V60	B-Device
,	O
V70	O
,	O
and	O
V80	O
were	O
listed	O
in	O
the	O
1989	O
and	O
1990	O
NEC	O
catalogs	O
in	O
their	O
PGA	B-Algorithm
packaging	O
.	O
</s>
<s>
A	O
NEC	O
catalog	O
from	O
1995	O
still	O
listed	O
the	O
V60	B-Device
and	O
V70	O
(	O
not	O
only	O
in	O
their	O
PGA	B-Algorithm
version	O
but	O
also	O
in	O
a	O
QFP	B-Algorithm
packaging	O
,	O
and	O
also	O
included	O
a	O
low-cost	O
variant	O
of	O
the	O
V60	B-Device
named	O
μPD70615	O
,	O
which	O
eliminated	O
V20/V30	O
emulation	O
and	O
FRM	O
function	O
)	O
,	O
alongside	O
their	O
assorted	O
chipsets	O
;	O
but	O
the	O
V80	O
was	O
not	O
offered	O
in	O
this	O
catalog	O
.	O
</s>
<s>
The	O
1999	O
edition	O
of	O
the	O
same	O
catalog	O
no	O
longer	O
had	O
any	O
V60-V80	O
products	O
.	O
</s>
<s>
In	O
1992	O
,	O
NEC	O
launched	O
a	O
new	O
model	O
,	O
the	O
V800Series	O
32-bit	O
microcontroller	B-Architecture
;	O
but	O
it	O
did	O
not	O
have	O
a	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	B-General_Concept
)	O
.	O
</s>
<s>
It	O
had	O
a	O
RISC-based	B-Architecture
architecture	B-General_Concept
,	O
inspired	O
by	O
the	O
Intel	B-General_Concept
i960	I-General_Concept
and	O
MIPS	B-Device
architectures	I-Device
,	O
and	O
other	O
RISC	B-Architecture
processor	I-Architecture
instructions	O
,	O
such	O
as	O
JARL	O
(	O
Jump	O
and	O
Register	O
Link	O
)	O
and	O
load/store	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
At	B-Operating_System
this	O
time	O
,	O
the	O
enormous	O
software	O
assets	O
of	O
the	O
V60/V70	O
,	O
such	O
as	O
real-time	B-Operating_System
Unix	B-Application
,	O
were	O
abandoned	O
and	O
never	O
returned	O
to	O
their	O
successors	O
,	O
a	O
scenario	O
Intel	O
avoided	O
.	O
</s>
<s>
The	O
V800Series	O
had	O
3	O
major	O
variants	O
,	O
the	O
V810	O
,	O
V830	O
,	O
and	O
V850	B-Device
families	O
.	O
</s>
<s>
One	O
Japanese	O
pronunciation	O
of	O
"	O
4	O
"	O
means	O
"	O
death	O
"	O
,	O
thus	O
avoid	O
names	O
evoking	O
such	O
as	O
Death-watch	O
Shi-ban	O
(	O
the	O
number	O
4	O
–	O
Shi-ban	O
)	O
Bug	B-Error_Name
(	O
,	O
precisely	O
"	O
deathwatch	O
beetle	O
"	O
)	O
.	O
</s>
<s>
As	O
of	O
2005	O
,	O
it	O
was	O
already	O
the	O
V850	B-Device
era	O
,	O
and	O
the	O
V850family	O
has	O
been	O
enjoying	O
great	O
success	O
.	O
</s>
<s>
As	O
of	O
2018	O
,	O
it	O
is	O
called	O
the	O
Renesas	O
V850family	O
and	O
the	O
RH850family	O
,	O
with	O
V850/V850E1/V850E2	O
and	O
V850E2/V850E3	O
CPU	O
cores	O
,	O
respectively	O
.	O
</s>
<s>
Those	O
CPU	O
cores	O
have	O
extended	O
the	O
ISA	B-General_Concept
of	O
the	O
original	O
V810	O
core	O
;	O
running	O
with	O
the	O
V850	B-Device
compiler	B-Language
.	O
</s>
<s>
Because	O
the	O
V60/V70	O
had	O
been	O
used	O
for	O
many	O
Japanese	O
arcade	O
games	O
,	O
MAME	B-Device
(	O
for	O
"	O
Multiple	B-Device
Arcade	I-Device
Machine	I-Device
Emulator	I-Device
"	O
)	O
,	O
which	O
emulates	O
multiple	O
old	O
arcade	O
games	O
for	O
enthusiasts	O
,	O
includes	O
an	O
CPU	O
simulator	O
for	O
their	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
It	O
is	O
a	O
kind	O
of	O
an	O
instruction	B-Application
set	I-Application
simulator	I-Application
,	O
not	O
for	O
developers	O
but	O
for	O
users	O
.	O
</s>
<s>
The	O
latest	O
open-source	B-Application
code	O
,	O
written	O
in	O
C++	B-Language
,	O
is	O
available	O
from	O
the	O
GitHub	B-Application
repository	B-General_Concept
.	O
</s>
<s>
The	O
operation	B-Language
codes	I-Language
in	O
the	O
file	O
are	O
exactly	O
the	O
same	O
as	O
those	O
of	O
the	O
V60	B-Device
.	O
</s>
