<s>
4	O
chip	O
VLSI	O
implementation	O
(	O
including	O
the	O
82C206	B-Device
IPC	O
)	O
of	O
the	O
control	O
logic	O
used	O
in	O
the	O
IBM	B-Device
PC	I-Device
compatible	O
PC/AT	B-Operating_System
computers	O
.	O
</s>
<s>
It	O
consists	O
of	O
the	O
82C211	O
CPU/Bus	O
controller	O
,	O
82C212	O
Page/Interleave	O
and	O
EMS	O
Memory	B-General_Concept
controller	I-General_Concept
,	O
82C215	O
Data/Address	O
buffer	B-General_Concept
,	O
and	O
82C206	B-Device
Integrated	O
Peripherals	O
Controller	O
(	O
IPC	O
)	O
.	O
</s>
<s>
NEAT	O
,	O
official	O
designation	O
CS8221	B-Device
,	O
was	O
developed	O
by	O
Chips	O
and	O
Technologies	O
.	O
</s>
<s>
The	O
NEAT	B-Device
chipset	I-Device
descended	O
from	O
the	O
first	O
chipset	O
that	O
C&T	O
had	O
developed	O
for	O
IBM	O
XT-compatible	O
systems	O
,	O
which	O
is	O
based	O
around	O
the	O
82C100	B-Device
"	O
XT	B-Device
controller	O
"	O
chip	O
.	O
</s>
<s>
82C100	B-Device
incorporates	O
the	O
functionality	O
of	O
what	O
had	O
been	O
,	O
until	O
its	O
invention	O
,	O
discrete	O
TTL	B-General_Concept
chips	O
on	O
the	O
XT	B-Device
's	O
mainboard	B-Device
,	O
namely	O
:	O
</s>
<s>
IBM	B-Device
PC	I-Device
compatibility	O
is	O
provided	O
by	O
CT	O
's	O
82C206	B-Device
Integrated	O
Peripheral	O
Controller	O
(	O
IPC	O
)	O
,	O
introduced	O
by	O
C&T	O
in	O
1986	O
.	O
</s>
<s>
This	O
chip	O
,	O
like	O
its	O
predecessor	O
the	O
82C100	B-Device
,	O
provides	O
equivalent	O
functionality	O
to	O
the	O
TTL	B-General_Concept
chips	O
on	O
the	O
PC/AT	B-Operating_System
'	O
s	O
mainboard	B-Device
,	O
namely	O
:	O
</s>
<s>
NEAT	O
CS8221	B-Device
's	O
predecessor	O
,	O
called	O
CS8220	B-Device
,	O
requires	O
five	O
chips	O
(	O
buffers	B-General_Concept
and	O
memory	B-General_Concept
controllers	I-General_Concept
)	O
for	O
a	O
virtually	O
complete	O
motherboard	B-Device
,	O
while	O
NEAT	O
requires	O
four	O
,	O
and	O
added	O
support	O
for	O
separate	O
ISA	B-Architecture
bus	I-Architecture
clocks	O
.	O
</s>
<s>
The	O
eventual	O
successor	O
to	O
the	O
NEAT	B-Device
chipset	I-Device
,	O
82C235	O
Single	O
Chip	O
AT	O
(	O
SCAT	O
)	O
,	O
amalgamates	O
all	O
of	O
the	O
chips	O
of	O
the	O
NEAT	B-Device
chipset	I-Device
into	O
a	O
single	O
chip	O
.	O
</s>
<s>
OPTi	O
,	O
for	O
example	O
,	O
produced	O
a	O
two-chip	O
"	O
AT	O
controller	O
"	O
chipset	O
comprising	O
the	O
OPTi	O
82C206	B-Device
and	O
82C495XLC	B-Device
,	O
which	O
is	O
found	O
in	O
many	O
early	O
80486	B-General_Concept
and	O
Pentium	B-General_Concept
AT-compatible	O
machines	O
.	O
</s>
<s>
The	O
OPTi	O
82C206	B-Device
is	O
pin	O
and	O
function	O
compatible	O
with	O
CT	O
's	O
82C206	B-Device
.	O
</s>
<s>
The	O
82C495XLC	B-Device
incorporates	O
the	O
additional	O
memory	B-General_Concept
controller	I-General_Concept
and	O
shadow	B-General_Concept
RAM	I-General_Concept
support	O
.	O
</s>
