<s>
In	O
computer	B-General_Concept
architecture	I-General_Concept
,	O
multithreading	B-Operating_System
is	O
the	O
ability	O
of	O
a	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
(	O
or	O
a	O
single	O
core	O
in	O
a	O
multi-core	B-Architecture
processor	I-Architecture
)	O
to	O
provide	O
multiple	O
threads	B-Operating_System
of	I-Operating_System
execution	I-Operating_System
concurrently	O
,	O
supported	O
by	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
This	O
approach	O
differs	O
from	O
multiprocessing	B-Operating_System
.	O
</s>
<s>
In	O
a	O
multithreaded	O
application	O
,	O
the	O
threads	B-Operating_System
share	O
the	O
resources	O
of	O
a	O
single	O
or	O
multiple	O
cores	O
,	O
which	O
include	O
the	O
computing	O
units	O
,	O
the	O
CPU	B-General_Concept
caches	I-General_Concept
,	O
and	O
the	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
)	O
.	O
</s>
<s>
Where	O
multiprocessing	B-Operating_System
systems	O
include	O
multiple	O
complete	O
processing	O
units	O
in	O
one	O
or	O
more	O
cores	O
,	O
multithreading	B-Operating_System
aims	O
to	O
increase	O
utilization	O
of	O
a	O
single	O
core	O
by	O
using	O
thread-level	B-Operating_System
parallelism	I-Operating_System
,	O
as	O
well	O
as	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
As	O
the	O
two	O
techniques	O
are	O
complementary	O
,	O
they	O
are	O
combined	O
in	O
nearly	O
all	O
modern	O
systems	O
architectures	O
with	O
multiple	O
multithreading	B-Operating_System
CPUs	O
and	O
with	O
CPUs	O
with	O
multiple	O
multithreading	B-Operating_System
cores	O
.	O
</s>
<s>
The	O
multithreading	B-Operating_System
paradigm	O
has	O
become	O
more	O
popular	O
as	O
efforts	O
to	O
further	O
exploit	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
have	O
stalled	O
since	O
the	O
late	O
1990s	O
.	O
</s>
<s>
This	O
allowed	O
the	O
concept	O
of	O
throughput	B-Operating_System
computing	I-Operating_System
to	O
re-emerge	O
from	O
the	O
more	O
specialized	O
field	O
of	O
transaction	B-General_Concept
processing	I-General_Concept
.	O
</s>
<s>
Even	O
though	O
it	O
is	O
very	O
difficult	O
to	O
further	O
speed	O
up	O
a	O
single	B-Operating_System
thread	I-Operating_System
or	O
single	O
program	O
,	O
most	O
computer	O
systems	O
are	O
actually	O
multitasking	B-Operating_System
among	O
multiple	O
threads	B-Operating_System
or	O
programs	O
.	O
</s>
<s>
Two	O
major	O
techniques	O
for	O
throughput	B-Operating_System
computing	I-Operating_System
are	O
multithreading	B-Operating_System
and	O
multiprocessing	B-Operating_System
.	O
</s>
<s>
If	O
a	O
thread	B-Operating_System
gets	O
a	O
lot	O
of	O
cache	O
misses	O
,	O
the	O
other	O
threads	B-Operating_System
can	O
continue	O
taking	O
advantage	O
of	O
the	O
unused	O
computing	O
resources	O
,	O
which	O
may	O
lead	O
to	O
faster	O
overall	O
execution	O
,	O
as	O
these	O
resources	O
would	O
have	O
been	O
idle	O
if	O
only	O
a	O
single	B-Operating_System
thread	I-Operating_System
were	O
executed	O
.	O
</s>
<s>
Also	O
,	O
if	O
a	O
thread	B-Operating_System
cannot	O
use	O
all	O
the	O
computing	O
resources	O
of	O
the	O
CPU	O
(	O
because	O
instructions	O
depend	O
on	O
each	O
other	O
's	O
result	O
)	O
,	O
running	O
another	O
thread	B-Operating_System
may	O
prevent	O
those	O
resources	O
from	O
becoming	O
idle	O
.	O
</s>
<s>
Multiple	O
threads	B-Operating_System
can	O
interfere	O
with	O
each	O
other	O
when	O
sharing	O
hardware	O
resources	O
such	O
as	O
caches	O
or	O
translation	B-Architecture
lookaside	I-Architecture
buffers	I-Architecture
(	O
TLBs	O
)	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
execution	O
times	O
of	O
a	O
single	B-Operating_System
thread	I-Operating_System
are	O
not	O
improved	O
and	O
can	O
be	O
degraded	O
,	O
even	O
when	O
only	O
one	O
thread	B-Operating_System
is	O
executing	O
,	O
due	O
to	O
lower	O
frequencies	O
or	O
additional	O
pipeline	B-General_Concept
stages	O
that	O
are	O
necessary	O
to	O
accommodate	O
thread-switching	O
hardware	O
.	O
</s>
<s>
Overall	O
efficiency	O
varies	O
;	O
Intel	O
claims	O
up	O
to	O
30%	O
improvement	O
with	O
its	O
Hyper-Threading	B-Operating_System
Technology	I-Operating_System
,	O
while	O
a	O
synthetic	O
program	O
just	O
performing	O
a	O
loop	O
of	O
non-optimized	O
dependent	O
floating-point	O
operations	O
actually	O
gains	O
a	O
100%	O
speed	O
improvement	O
when	O
run	O
in	O
parallel	O
.	O
</s>
<s>
On	O
the	O
other	O
hand	O
,	O
hand-tuned	O
assembly	B-Language
language	I-Language
programs	O
using	O
MMX	B-Architecture
or	O
AltiVec	B-General_Concept
extensions	O
and	O
performing	O
data	O
prefetches	O
(	O
as	O
a	O
good	O
video	O
encoder	O
might	O
)	O
do	O
not	O
suffer	O
from	O
cache	O
misses	O
or	O
idle	O
computing	O
resources	O
.	O
</s>
<s>
Such	O
programs	O
therefore	O
do	O
not	O
benefit	O
from	O
hardware	O
multithreading	B-Operating_System
and	O
can	O
indeed	O
see	O
degraded	O
performance	O
due	O
to	O
contention	O
for	O
shared	O
resources	O
.	O
</s>
<s>
From	O
the	O
software	O
standpoint	O
,	O
hardware	O
support	O
for	O
multithreading	B-Operating_System
is	O
more	O
visible	O
to	O
software	O
,	O
requiring	O
more	O
changes	O
to	O
both	O
application	O
programs	O
and	O
operating	B-General_Concept
systems	I-General_Concept
than	O
multiprocessing	B-Operating_System
.	O
</s>
<s>
Hardware	O
techniques	O
used	O
to	O
support	O
multithreading	B-Operating_System
often	O
parallel	O
the	O
software	O
techniques	O
used	O
for	O
computer	B-Operating_System
multitasking	I-Operating_System
.	O
</s>
<s>
Thread	B-Operating_System
scheduling	O
is	O
also	O
a	O
major	O
problem	O
in	O
multithreading	B-Operating_System
.	O
</s>
<s>
The	O
simplest	O
type	O
of	O
multithreading	B-Operating_System
occurs	O
when	O
one	O
thread	B-Operating_System
runs	O
until	O
it	O
is	O
blocked	O
by	O
an	O
event	O
that	O
normally	O
would	O
create	O
a	O
long-latency	O
stall	O
.	O
</s>
<s>
Instead	O
of	O
waiting	O
for	O
the	O
stall	O
to	O
resolve	O
,	O
a	O
threaded	O
processor	O
would	O
switch	O
execution	O
to	O
another	O
thread	B-Operating_System
that	O
was	O
ready	O
to	O
run	O
.	O
</s>
<s>
Only	O
when	O
the	O
data	O
for	O
the	O
previous	O
thread	B-Operating_System
had	O
arrived	O
,	O
would	O
the	O
previous	O
thread	B-Operating_System
be	O
placed	O
back	O
on	O
the	O
list	O
of	O
ready-to-run	O
threads	B-Operating_System
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
,	O
which	O
is	O
a	O
load	O
instruction	O
that	O
misses	O
in	O
all	O
caches	O
.	O
</s>
<s>
Cycle	O
:	O
thread	B-Operating_System
scheduler	O
invoked	O
,	O
switches	O
to	O
thread	B-Operating_System
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
Conceptually	O
,	O
it	O
is	O
similar	O
to	O
cooperative	O
multi-tasking	O
used	O
in	O
real-time	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
,	O
in	O
which	O
tasks	O
voluntarily	O
give	O
up	O
execution	O
time	O
when	O
they	O
need	O
to	O
wait	O
upon	O
some	O
type	O
of	O
the	O
event	O
.	O
</s>
<s>
This	O
type	O
of	O
multithreading	B-Operating_System
is	O
known	O
as	O
block	O
,	O
cooperative	O
or	O
coarse-grained	O
multithreading	B-Operating_System
.	O
</s>
<s>
The	O
goal	O
of	O
multithreading	B-Operating_System
hardware	O
support	O
is	O
to	O
allow	O
quick	O
switching	O
between	O
a	O
blocked	O
thread	B-Operating_System
and	O
another	O
thread	B-Operating_System
ready	O
to	O
run	O
.	O
</s>
<s>
Switching	O
from	O
one	O
thread	B-Operating_System
to	O
another	O
means	O
the	O
hardware	O
switches	O
from	O
using	O
one	O
register	O
set	O
to	O
another	O
.	O
</s>
<s>
For	O
example	O
,	O
to	O
quickly	O
switch	O
between	O
two	O
threads	B-Operating_System
,	O
the	O
processor	O
is	O
built	O
with	O
two	O
sets	O
of	O
registers	O
.	O
</s>
<s>
Additional	O
hardware	O
support	O
for	O
multithreading	B-Operating_System
allows	O
thread	B-Operating_System
switching	O
to	O
be	O
done	O
in	O
one	O
CPU	O
cycle	O
,	O
bringing	O
performance	O
improvements	O
.	O
</s>
<s>
Also	O
,	O
additional	O
hardware	O
allows	O
each	O
thread	B-Operating_System
to	O
behave	O
as	O
if	O
it	O
were	O
executing	O
alone	O
and	O
not	O
sharing	O
any	O
hardware	O
resources	O
with	O
other	O
threads	B-Operating_System
,	O
minimizing	O
the	O
amount	O
of	O
software	O
changes	O
needed	O
within	O
the	O
application	O
and	O
the	O
operating	B-General_Concept
system	I-General_Concept
to	O
support	O
multithreading	B-Operating_System
.	O
</s>
<s>
Many	O
families	O
of	O
microcontrollers	B-Architecture
and	O
embedded	O
processors	O
have	O
multiple	O
register	O
banks	O
to	O
allow	O
quick	O
context	B-Operating_System
switching	I-Operating_System
for	O
interrupts	O
.	O
</s>
<s>
Such	O
schemes	O
can	O
be	O
considered	O
a	O
type	O
of	O
block	O
multithreading	B-Operating_System
among	O
the	O
user	O
program	B-Operating_System
thread	I-Operating_System
and	O
the	O
interrupt	O
threads	B-Operating_System
.	O
</s>
<s>
The	O
purpose	O
of	O
Fine	O
grained	O
multithreading	B-Operating_System
is	O
to	O
remove	O
all	O
data	B-Operating_System
dependency	I-Operating_System
stalls	O
from	O
the	O
execution	O
pipeline	B-General_Concept
.	O
</s>
<s>
Since	O
one	O
thread	B-Operating_System
is	O
relatively	O
independent	O
from	O
other	O
threads	B-Operating_System
,	O
there	O
is	O
less	O
chance	O
of	O
one	O
instruction	O
in	O
one	O
pipelining	B-General_Concept
stage	O
needing	O
an	O
output	O
from	O
an	O
older	O
instruction	O
in	O
the	O
pipeline	B-General_Concept
.	O
</s>
<s>
Conceptually	O
,	O
it	O
is	O
similar	O
to	O
preemptive	B-Operating_System
multitasking	B-Operating_System
used	O
in	O
operating	B-General_Concept
systems	I-General_Concept
;	O
an	O
analogy	O
would	O
be	O
that	O
the	O
time	O
slice	O
given	O
to	O
each	O
active	O
thread	B-Operating_System
is	O
one	O
CPU	O
cycle	O
.	O
</s>
<s>
Cycle	O
:	O
an	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
an	O
instruction	O
from	O
thread	B-Operating_System
is	O
issued	O
.	O
</s>
<s>
This	O
type	O
of	O
multithreading	B-Operating_System
was	O
first	O
called	O
barrel	O
processing	O
,	O
in	O
which	O
the	O
staves	O
of	O
a	O
barrel	O
represent	O
the	O
pipeline	B-General_Concept
stages	O
and	O
their	O
executing	O
threads	B-Operating_System
.	O
</s>
<s>
Interleaved	O
,	O
preemptive	B-Operating_System
,	O
fine-grained	O
or	O
time-sliced	O
multithreading	B-Operating_System
are	O
more	O
modern	O
terminology	O
.	O
</s>
<s>
In	O
addition	O
to	O
the	O
hardware	O
costs	O
discussed	O
in	O
the	O
block	O
type	O
of	O
multithreading	B-Operating_System
,	O
interleaved	O
multithreading	B-Operating_System
has	O
an	O
additional	O
cost	O
of	O
each	O
pipeline	B-General_Concept
stage	O
tracking	O
the	O
thread	B-Operating_System
ID	O
of	O
the	O
instruction	O
it	O
is	O
processing	O
.	O
</s>
<s>
Also	O
,	O
since	O
there	O
are	O
more	O
threads	B-Operating_System
being	O
executed	O
concurrently	O
in	O
the	O
pipeline	B-General_Concept
,	O
shared	O
resources	O
such	O
as	O
caches	O
and	O
TLBs	O
need	O
to	O
be	O
larger	O
to	O
avoid	O
thrashing	O
between	O
the	O
different	O
threads	B-Operating_System
.	O
</s>
<s>
The	O
most	O
advanced	O
type	O
of	O
multithreading	B-Operating_System
applies	O
to	O
superscalar	B-General_Concept
processors	I-General_Concept
.	O
</s>
<s>
Whereas	O
a	O
normal	O
superscalar	B-General_Concept
processor	I-General_Concept
issues	O
multiple	O
instructions	O
from	O
a	O
single	B-Operating_System
thread	I-Operating_System
every	O
CPU	O
cycle	O
,	O
in	O
simultaneous	O
multithreading	B-Operating_System
(	O
SMT	O
)	O
a	O
superscalar	B-General_Concept
processor	I-General_Concept
can	O
issue	O
instructions	O
from	O
multiple	O
threads	B-Operating_System
every	O
CPU	O
cycle	O
.	O
</s>
<s>
Recognizing	O
that	O
any	O
single	B-Operating_System
thread	I-Operating_System
has	O
a	O
limited	O
amount	O
of	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
,	O
this	O
type	O
of	O
multithreading	B-Operating_System
tries	O
to	O
exploit	O
parallelism	O
available	O
across	O
multiple	O
threads	B-Operating_System
to	O
decrease	O
the	O
waste	O
associated	O
with	O
unused	O
issue	O
slots	O
.	O
</s>
<s>
Cycle	O
:	O
instructions	O
and	O
from	O
thread	B-Operating_System
and	O
instruction	O
from	O
thread	B-Operating_System
are	O
simultaneously	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
,	O
instruction	O
from	O
thread	B-Operating_System
,	O
and	O
instruction	O
from	O
thread	B-Operating_System
are	O
all	O
simultaneously	O
issued	O
.	O
</s>
<s>
Cycle	O
:	O
instruction	O
from	O
thread	B-Operating_System
and	O
instructions	O
and	O
from	O
thread	B-Operating_System
are	O
all	O
simultaneously	O
issued	O
.	O
</s>
<s>
To	O
distinguish	O
the	O
other	O
types	O
of	O
multithreading	B-Operating_System
from	O
SMT	O
,	O
the	O
term	O
"	O
temporal	B-Operating_System
multithreading	I-Operating_System
"	O
is	O
used	O
to	O
denote	O
when	O
instructions	O
from	O
only	O
one	O
thread	B-Operating_System
can	O
be	O
issued	O
at	O
a	O
time	O
.	O
</s>
<s>
In	O
addition	O
to	O
the	O
hardware	O
costs	O
discussed	O
for	O
interleaved	O
multithreading	B-Operating_System
,	O
SMT	O
has	O
the	O
additional	O
cost	O
of	O
each	O
pipeline	B-General_Concept
stage	O
tracking	O
the	O
thread	B-Operating_System
ID	O
of	O
each	O
instruction	O
being	O
processed	O
.	O
</s>
<s>
Again	O
,	O
shared	O
resources	O
such	O
as	O
caches	O
and	O
TLBs	O
have	O
to	O
be	O
sized	O
for	O
the	O
large	O
number	O
of	O
active	O
threads	B-Operating_System
being	O
processed	O
.	O
</s>
<s>
Implementations	O
include	O
DEC	O
(	O
later	O
Compaq	O
)	O
EV8	B-General_Concept
(	O
not	O
completed	O
)	O
,	O
Intel	O
Hyper-Threading	B-Operating_System
Technology	I-Operating_System
,	O
IBM	O
POWER5/POWER6/POWER7/POWER8/POWER9	O
,	O
IBM	O
z13/z14/z15	O
,	O
Sun	O
Microsystems	O
UltraSPARC	B-Device
T2	I-Device
,	O
Cray	B-Device
XMT	I-Device
,	O
and	O
AMD	O
Bulldozer	O
and	O
Zen	O
microarchitectures	O
.	O
</s>
<s>
A	O
major	O
area	O
of	O
research	O
is	O
the	O
thread	B-Operating_System
scheduler	O
that	O
must	O
quickly	O
choose	O
from	O
among	O
the	O
list	O
of	O
ready-to-run	O
threads	B-Operating_System
to	O
execute	O
next	O
,	O
as	O
well	O
as	O
maintain	O
the	O
ready-to-run	O
and	O
stalled	O
thread	B-Operating_System
lists	O
.	O
</s>
<s>
An	O
important	O
subtopic	O
is	O
the	O
different	O
thread	B-Operating_System
priority	O
schemes	O
that	O
can	O
be	O
used	O
by	O
the	O
scheduler	O
.	O
</s>
<s>
The	O
thread	B-Operating_System
scheduler	O
might	O
be	O
implemented	O
totally	O
in	O
software	O
,	O
totally	O
in	O
hardware	O
,	O
or	O
as	O
a	O
hardware/software	O
combination	O
.	O
</s>
<s>
Another	O
area	O
of	O
research	O
is	O
what	O
type	O
of	O
events	O
should	O
cause	O
a	O
thread	B-Operating_System
switch	I-Operating_System
:	O
cache	O
misses	O
,	O
inter-thread	O
communication	O
,	O
DMA	B-General_Concept
completion	O
,	O
etc	O
.	O
</s>
<s>
If	O
the	O
multithreading	B-Operating_System
scheme	O
replicates	O
all	O
of	O
the	O
software-visible	O
state	O
,	O
including	O
privileged	O
control	O
registers	O
and	O
TLBs	O
,	O
then	O
it	O
enables	O
virtual	B-Architecture
machines	I-Architecture
to	O
be	O
created	O
for	O
each	O
thread	B-Operating_System
.	O
</s>
<s>
This	O
allows	O
each	O
thread	B-Operating_System
to	O
run	O
its	O
own	O
operating	B-General_Concept
system	I-General_Concept
on	O
the	O
same	O
processor	O
.	O
</s>
<s>
On	O
the	O
other	O
hand	O
,	O
if	O
only	O
user-mode	O
state	O
is	O
saved	O
,	O
then	O
less	O
hardware	O
is	O
required	O
,	O
which	O
would	O
allow	O
more	O
threads	B-Operating_System
to	O
be	O
active	O
at	O
one	O
time	O
for	O
the	O
same	O
die	O
area	O
or	O
cost	O
.	O
</s>
