<s>
In	O
computing	O
,	O
especially	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
,	O
the	O
multiply	B-Algorithm
–	I-Algorithm
accumulate	I-Algorithm
(	O
MAC	O
)	O
or	O
multiply-add	B-Algorithm
(	O
MAD	O
)	O
operation	O
is	O
a	O
common	O
step	O
that	O
computes	O
the	O
product	O
of	O
two	O
numbers	O
and	O
adds	O
that	O
product	O
to	O
an	O
accumulator	B-General_Concept
.	O
</s>
<s>
The	O
hardware	O
unit	O
that	O
performs	O
the	O
operation	O
is	O
known	O
as	O
a	O
multiplier	B-Algorithm
–	I-Algorithm
accumulator	I-Algorithm
(	O
MAC	O
unit	O
)	O
;	O
the	O
operation	O
itself	O
is	O
also	O
often	O
called	O
a	O
MAC	O
or	O
a	O
MAD	O
operation	O
.	O
</s>
<s>
The	O
MAC	O
operation	O
modifies	O
an	O
accumulator	B-General_Concept
a	O
:	O
</s>
<s>
When	O
done	O
with	O
floating	B-Algorithm
point	I-Algorithm
numbers	I-Algorithm
,	O
it	O
might	O
be	O
performed	O
with	O
two	O
roundings	B-Algorithm
(	O
typical	O
in	O
many	O
DSPs	O
)	O
,	O
or	O
with	O
a	O
single	O
rounding	B-Algorithm
.	O
</s>
<s>
When	O
performed	O
with	O
a	O
single	O
rounding	B-Algorithm
,	O
it	O
is	O
called	O
a	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
(	O
FMA	O
)	O
or	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
accumulate	I-Algorithm
(	O
FMAC	B-Algorithm
)	O
.	O
</s>
<s>
Modern	O
computers	O
may	O
contain	O
a	O
dedicated	O
MAC	O
,	O
consisting	O
of	O
a	O
multiplier	O
implemented	O
in	O
combinational	O
logic	O
followed	O
by	O
an	O
adder	O
and	O
an	O
accumulator	B-General_Concept
register	O
that	O
stores	O
the	O
result	O
.	O
</s>
<s>
The	O
first	O
modern	O
processors	O
to	O
be	O
equipped	O
with	O
MAC	O
units	O
were	O
digital	B-Architecture
signal	I-Architecture
processors	I-Architecture
,	O
but	O
the	O
technique	O
is	O
now	O
also	O
common	O
in	O
general-purpose	O
processors	O
.	O
</s>
<s>
However	O
,	O
floating-point	B-Algorithm
numbers	I-Algorithm
have	O
only	O
a	O
certain	O
amount	O
of	O
mathematical	O
precision	B-Architecture
.	O
</s>
<s>
That	O
is	O
,	O
digital	O
floating-point	B-Algorithm
arithmetic	I-Algorithm
is	O
generally	O
not	O
associative	O
or	O
distributive	O
.	O
</s>
<s>
Therefore	O
,	O
it	O
makes	O
a	O
difference	O
to	O
the	O
result	O
whether	O
the	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
is	O
performed	O
with	O
two	O
roundings	B-Algorithm
,	O
or	O
in	O
one	O
operation	O
with	O
a	O
single	O
rounding	B-Algorithm
(	O
a	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
)	O
.	O
</s>
<s>
IEEE	O
754-2008	O
specifies	O
that	O
it	O
must	O
be	O
performed	O
with	O
one	O
rounding	B-Algorithm
,	O
yielding	O
a	O
more	O
accurate	O
result	O
.	O
</s>
<s>
is	O
a	O
floating-point	B-Algorithm
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
operation	O
performed	O
in	O
one	O
step	O
,	O
with	O
a	O
single	O
rounding	B-Algorithm
.	O
</s>
<s>
That	O
is	O
,	O
where	O
an	O
unfused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
would	O
compute	O
the	O
product	O
,	O
round	O
it	O
to	O
N	O
significant	O
bits	O
,	O
add	O
the	O
result	O
to	O
a	O
,	O
and	O
round	O
back	O
to	O
N	O
significant	O
bits	O
,	O
a	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
would	O
compute	O
the	O
entire	O
expression	O
to	O
its	O
full	O
precision	B-Architecture
before	O
rounding	B-Algorithm
the	O
final	O
result	O
down	O
to	O
N	O
significant	O
bits	O
.	O
</s>
<s>
Fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
can	O
usually	O
be	O
relied	O
on	O
to	O
give	O
more	O
accurate	O
results	O
.	O
</s>
<s>
If	O
is	O
evaluated	O
as	O
(	O
following	O
Kahan	O
's	O
suggested	O
notation	O
in	O
which	O
redundant	O
parentheses	O
direct	O
the	O
compiler	O
to	O
round	O
the	O
term	O
first	O
)	O
using	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
,	O
then	O
the	O
result	O
may	O
be	O
negative	O
even	O
when	O
due	O
to	O
the	O
first	O
multiplication	O
discarding	O
low	O
significance	O
bits	O
.	O
</s>
<s>
When	O
implemented	O
inside	O
a	O
microprocessor	B-Architecture
,	O
an	O
FMA	O
can	O
be	O
faster	O
than	O
a	O
multiply	O
operation	O
followed	O
by	O
an	O
add	O
.	O
</s>
<s>
Another	O
benefit	O
of	O
including	O
this	O
instruction	O
is	O
that	O
it	O
allows	O
an	O
efficient	O
software	O
implementation	O
of	O
division	O
(	O
see	O
division	B-Algorithm
algorithm	I-Algorithm
)	O
and	O
square	O
root	O
(	O
see	O
methods	B-Library
of	I-Library
computing	I-Library
square	I-Library
roots	I-Library
)	O
operations	O
,	O
thus	O
eliminating	O
the	O
need	O
for	O
dedicated	O
hardware	O
for	O
those	O
operations	O
.	O
</s>
<s>
Some	O
machines	O
combine	O
multiple	O
fused	O
multiply	B-Algorithm
add	I-Algorithm
operations	O
into	O
a	O
single	O
step	O
,	O
e.g.	O
</s>
<s>
performing	O
a	O
four-element	O
dot-product	O
on	O
two	O
128-bit	O
SIMD	B-Device
registers	O
a0×b0	O
+	O
a1×b1	O
+	O
a2×b2	O
+	O
a3×b3	O
with	O
single	O
cycle	O
throughput	O
.	O
</s>
<s>
The	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
VAX	B-Device
's	O
POLY	O
instruction	O
is	O
used	O
for	O
evaluating	O
polynomials	O
with	O
Horner	O
's	O
rule	O
using	O
a	O
succession	O
of	O
multiply	O
and	O
add	O
steps	O
.	O
</s>
<s>
This	O
instruction	O
has	O
been	O
a	O
part	O
of	O
the	O
VAX	B-Device
instruction	O
set	O
since	O
its	O
original	O
11/780	O
implementation	O
in	O
1977	O
.	O
</s>
<s>
The	O
1999	B-Language
standard	I-Language
of	O
the	O
C	B-Language
programming	I-Language
language	I-Language
supports	O
the	O
FMA	O
operation	O
through	O
the	O
fma( )	O
standard	O
math	O
library	O
function	O
and	O
the	O
automatic	O
transformation	O
of	O
a	O
multiplication	O
followed	O
by	O
an	O
addition	O
(	O
contraction	O
of	O
floating-point	B-Algorithm
expressions	O
)	O
,	O
which	O
can	O
be	O
explicitly	O
enabled	O
or	O
disabled	O
with	O
standard	O
pragmas	O
(	O
)	O
.	O
</s>
<s>
The	O
GCC	B-Application
and	O
Clang	B-Application
C	B-Language
compilers	O
do	O
such	O
transformations	O
by	O
default	O
for	O
processor	O
architectures	O
that	O
support	O
FMA	O
instructions	O
.	O
</s>
<s>
With	O
GCC	B-Application
,	O
which	O
does	O
not	O
support	O
the	O
aforementioned	O
pragma	O
,	O
this	O
can	O
be	O
globally	O
controlled	O
by	O
the	O
-ffp-contract	O
command	O
line	O
option	O
.	O
</s>
<s>
The	O
fused	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
operation	O
was	O
introduced	O
as	O
"	O
multiply	B-Algorithm
–	I-Algorithm
add	I-Algorithm
fused	O
"	O
in	O
the	O
IBM	O
POWER1	B-General_Concept
(	O
1990	O
)	O
processor	O
,	O
but	O
has	O
been	O
added	O
to	O
numerous	O
other	O
processors	O
since	O
then	O
:	O
</s>
<s>
Fujitsu	B-Device
A64FX	I-Device
has	O
"	O
Four-operand	O
FMA	O
with	O
Prefix	O
Instruction	O
"	O
.	O
</s>
