<s>
MultiClet	B-General_Concept
is	O
an	O
ongoing	O
innovation	O
project	O
for	O
a	O
microprocessor	B-Architecture
that	O
became	O
the	O
first	O
post	O
von	B-Architecture
Neumann	I-Architecture
,	O
multicellular	B-Architecture
microprocessor	B-Architecture
,	O
breaking	O
the	O
paradigm	O
for	O
computing	O
technology	O
that	O
has	O
been	O
in	O
place	O
for	O
more	O
than	O
60	O
years	O
.	O
</s>
<s>
There	O
have	O
been	O
attempts	O
in	O
the	O
past	O
to	O
shift	O
away	O
from	O
the	O
von	B-Architecture
Neumann	I-Architecture
architecture	I-Architecture
.	O
</s>
<s>
Under	O
MultiClet	B-General_Concept
a	O
4-cellular	O
dynamically	O
reconfigurable	O
microprocessor	B-Architecture
is	O
implemented	O
.	O
</s>
<s>
In	O
April	O
2013	O
,	O
the	O
Russian	O
company	O
Sputnix	O
signed	O
an	O
agreement	O
for	O
joint	O
development	O
of	O
the	O
MultiClet	B-General_Concept
microprocessor	B-Architecture
.	O
</s>
<s>
In	O
January	O
2014	O
,	O
an	O
announcement	O
is	O
made	O
that	O
the	O
FreeRTOS	B-Operating_System
operating	B-General_Concept
system	I-General_Concept
has	O
been	O
ported	O
to	O
the	O
MultiClet	B-General_Concept
microprocessor	B-Architecture
,	O
this	O
demonstrates	O
that	O
the	O
microprocessor	B-Architecture
potentially	O
can	O
perform	O
tasks	O
that	O
makes	O
it	O
suitable	O
for	O
real	O
products	O
.	O
</s>
<s>
In	O
April	O
2014	O
,	O
the	O
Kickstarter	O
project	O
Key_P1	O
MultiClet	B-General_Concept
:	O
Your	O
Powerful	O
Digital	O
Guardian	O
,	O
failed	O
to	O
raise	O
sufficient	O
funding	O
.	O
</s>
<s>
Since	O
June	O
2014	O
,	O
the	O
MultiClet	B-General_Concept
microprocessor	B-Architecture
is	O
reportedly	O
under	O
test	O
in	O
real	O
space	O
conditions	O
onboard	O
Sputnix	O
’s	O
microsatellite	O
TabletSat-Aurora	O
.	O
</s>
<s>
In	O
March	O
2014	O
,	O
Multiclet	B-General_Concept
present	O
first	O
multicellular	B-Architecture
dynamically	O
reconfigurable	O
microprocessor	B-Architecture
in	O
Inatronics	O
2014	O
.	O
</s>
<s>
In	O
2011	O
the	O
MultiClet	B-General_Concept
company	O
,	O
currently	O
responsible	O
for	O
the	O
development	O
of	O
the	O
microprocessor	B-Architecture
was	O
founded	O
with	O
a	O
capital	O
of	O
323	O
million	O
roubles	O
.	O
</s>
<s>
In	O
August	O
2014	O
,	O
a	O
financial	O
request	O
for	O
80	O
million	O
US	O
dollars	O
from	O
the	O
Russian-Chinese	O
Investment	O
Fund	O
(	O
RKIF	O
)	O
was	O
made	O
in	O
order	O
to	O
develop	O
a	O
MultiClet	B-General_Concept
based	O
computer	O
.	O
</s>
<s>
As	O
opposed	O
to	O
the	O
traditional	O
multi-core	B-Architecture
processor	I-Architecture
architecture	O
each	O
individual	O
cell	O
in	O
the	O
microprocessor	B-Architecture
can	O
communicate	O
with	O
each	O
other	O
,	O
without	O
the	O
need	O
to	O
store	O
intermediate	O
results	O
in	O
memory	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
This	O
removes	O
the	O
concept	O
of	O
assembly	B-Language
language	I-Language
instructions	O
with	O
sequential	O
dependence	O
,	O
in	O
favor	O
of	O
realizing	O
a	O
high	B-Language
level	I-Language
programming	I-Language
language	I-Language
directly	O
on	O
the	O
computer	O
hardware	O
.	O
</s>
<s>
Each	O
triad	O
can	O
describe	O
an	O
operation	O
between	O
references	O
to	O
other	O
triads	O
,	O
rather	O
than	O
references	O
to	O
the	O
current	O
contents	O
in	O
memory	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
when	O
an	O
operation	O
to	O
write	O
the	O
result	O
to	O
a	O
memory	B-General_Concept
register	I-General_Concept
is	O
issued	O
.	O
</s>
<s>
The	O
multicellular	B-Architecture
microprocessor	B-Architecture
architecture	O
makes	O
it	O
easier	O
to	O
perform	O
parallel	O
execution	O
because	O
the	O
need	O
to	O
access	O
intermediate	O
memory	O
for	O
each	O
operation	O
is	O
eliminated	O
,	O
thus	O
each	O
cell	O
can	O
operate	O
independently	O
until	O
the	O
result	O
is	O
needed	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
can	O
operate	O
with	O
reduced	O
performance	O
if	O
one	O
or	O
more	O
of	O
the	O
microprocessor	B-Architecture
cells	O
become	O
non-functioning	O
.	O
</s>
<s>
The	O
dynamic	O
reconfiguration	O
of	O
the	O
microprocessor	B-Architecture
,	O
in	O
case	O
of	O
permanent	O
failures	O
makes	O
it	O
ideal	O
for	O
operation	O
under	O
harsh	O
conditions	O
such	O
as	O
in	O
space	O
applications	O
.	O
</s>
<s>
Realization	O
of	O
all	O
operations	O
within	O
each	O
statement	O
,	O
without	O
memory	O
involvement	O
improves	O
computing	O
power	O
by	O
4	O
–	O
5	O
times	O
and	O
reduces	O
the	O
microprocessor	B-Architecture
energy	O
consumption	O
by	O
up	O
to	O
10	O
times	O
.	O
</s>
<s>
The	O
main	O
obstacle	O
would	O
be	O
the	O
high	O
level	O
of	O
communication	O
required	O
between	O
the	O
different	O
cells	O
of	O
the	O
multicellular	B-Architecture
architecture	O
and	O
its	O
implementation	O
using	O
CMOS	B-Device
semiconductor	O
process	O
technology	O
below	O
180	B-Algorithm
nanometer	I-Algorithm
.	O
</s>
<s>
Available	O
and	O
suggested	O
multicellular	B-Architecture
processor	O
variants	O
:	O
</s>
<s>
Available	O
multicellular	B-Architecture
processor	O
models	O
:	O
</s>
