<s>
In	O
electronics	O
,	O
a	O
multi-level	B-Device
cell	I-Device
(	O
MLC	O
)	O
is	O
a	O
memory	B-Algorithm
cell	I-Algorithm
capable	O
of	O
storing	O
more	O
than	O
a	O
single	O
bit	O
of	O
information	O
,	O
compared	O
to	O
a	O
single-level	O
cell	O
(	O
SLC	O
)	O
,	O
which	O
can	O
store	O
only	O
one	O
bit	O
per	O
memory	B-Algorithm
cell	I-Algorithm
.	O
</s>
<s>
A	O
memory	B-Algorithm
cell	I-Algorithm
typically	O
consists	O
of	O
a	O
single	O
floating-gate	B-Algorithm
MOSFET	I-Algorithm
(	O
metal	O
–	O
oxide	O
–	O
semiconductor	O
field-effect	O
transistor	O
)	O
,	O
thus	O
multi-level	B-Device
cells	I-Device
reduce	O
the	O
number	O
of	O
MOSFETs	O
required	O
to	O
store	O
the	O
same	O
amount	O
of	O
data	O
as	O
single-level	O
cells	O
.	O
</s>
<s>
The	O
name	O
"	O
multi-level	B-Device
cell	I-Device
"	O
is	O
sometimes	O
used	O
specifically	O
to	O
refer	O
to	O
the	O
"	O
two-level	O
cell	O
"	O
.	O
</s>
<s>
Examples	O
of	O
MLC	O
memories	O
are	O
MLC	O
NAND	O
flash	O
,	O
MLC	O
PCM	O
(	O
phase-change	B-Device
memory	I-Device
)	O
,	O
etc	O
.	O
</s>
<s>
Most	O
MLC	O
NAND	O
flash	B-Device
memory	I-Device
has	O
four	O
possible	O
states	O
per	O
cell	O
,	O
so	O
it	O
can	O
store	O
two	O
bits	O
of	O
information	O
per	O
cell	O
.	O
</s>
<s>
Multi-level	B-Device
cells	I-Device
that	O
are	O
designed	O
for	O
low	O
error	O
rates	O
are	O
sometimes	O
called	O
enterprise	B-Device
MLC	I-Device
(	O
eMLC	B-Device
)	O
.	O
</s>
<s>
New	O
technologies	O
,	O
such	O
as	O
multi-level	B-Device
cells	I-Device
and	O
3D	O
Flash	O
,	O
and	O
increased	O
production	O
volumes	O
will	O
continue	O
to	O
bring	O
prices	O
down	O
.	O
</s>
<s>
Flash	B-Device
memory	I-Device
stores	O
data	O
in	O
individual	O
memory	B-Algorithm
cells	I-Algorithm
,	O
which	O
are	O
made	O
of	O
floating-gate	B-Algorithm
MOSFET	I-Algorithm
transistors	O
.	O
</s>
<s>
Traditionally	O
,	O
each	O
cell	O
had	O
two	O
possible	O
states	O
(	O
each	O
with	O
one	O
voltage	O
level	O
)	O
,	O
with	O
each	O
state	O
representing	O
either	O
a	O
one	O
or	O
a	O
zero	O
,	O
so	O
one	O
bit	O
of	O
data	O
was	O
stored	O
in	O
each	O
cell	O
in	O
so-called	O
single-level	O
cells	O
,	O
or	O
SLC	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
Due	O
to	O
higher	O
transfer	O
speeds	O
and	O
expected	O
longer	O
life	O
,	O
SLC	O
flash	O
technology	O
is	O
used	O
in	O
high-performance	O
memory	B-Device
cards	I-Device
.	O
</s>
<s>
A	O
single-level	O
cell	O
(	O
SLC	O
)	O
flash	B-Device
memory	I-Device
may	O
have	O
a	O
lifetime	O
of	O
about	O
50,000	O
to	O
100,000	O
program/erase	O
cycles	O
.	O
</s>
<s>
The	O
primary	O
benefit	O
of	O
MLC	B-Device
flash	I-Device
memory	O
is	O
its	O
lower	O
cost	O
per	O
unit	O
of	O
storage	O
due	O
to	O
the	O
higher	O
data	O
density	O
,	O
and	O
memory-reading	O
software	O
can	O
compensate	O
for	O
a	O
larger	O
bit	O
error	O
rate	O
.	O
</s>
<s>
The	O
higher	O
error	O
rate	O
necessitates	O
an	O
error-correcting	B-Error_Name
code	I-Error_Name
(	O
ECC	O
)	O
that	O
can	O
correct	O
multiple	O
bit	O
errors	O
;	O
for	O
example	O
,	O
the	O
SandForce	O
SF-2500	O
flash	O
controller	O
can	O
correct	O
up	O
to	O
55bits	O
per	O
512-byte	O
sector	O
with	O
an	O
unrecoverable	O
read	O
error	O
rate	O
of	O
less	O
than	O
one	O
sector	O
per	O
1017bits	O
read	O
.	O
</s>
<s>
Other	O
drawbacks	O
of	O
MLC	O
NAND	O
are	O
lower	O
write	O
speeds	O
,	O
lower	O
number	O
of	O
program/erase	O
cycles	O
and	O
higher	O
power	O
consumption	O
compared	O
to	O
SLC	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
MLC	B-Device
flash	I-Device
may	O
have	O
a	O
lifetime	O
of	O
about	O
1,000	O
to	O
10,000	O
program/erase	O
cycles	O
.	O
</s>
<s>
This	O
typically	O
necessitates	O
the	O
use	O
of	O
a	O
flash	B-Application
file	I-Application
system	I-Application
,	O
which	O
is	O
designed	O
around	O
the	O
limitations	O
of	O
flash	B-Device
memory	I-Device
,	O
such	O
as	O
using	O
wear	B-Application
leveling	I-Application
to	O
extend	O
the	O
useful	O
lifetime	O
of	O
the	O
flash	O
device	O
.	O
</s>
<s>
The	O
Intel	B-Device
8087	I-Device
used	O
two-bits-per-cell	O
technology	O
for	O
its	O
microcode	B-Device
ROM	B-Device
,	O
and	O
in	O
1980	O
was	O
one	O
of	O
the	O
first	O
devices	O
on	O
the	O
market	O
to	O
use	O
multi-level	O
ROM	B-Device
cells	O
.	O
</s>
<s>
Intel	O
later	O
demonstrated	O
2-bit	O
multi-level	B-Device
cell	I-Device
(	O
MLC	O
)	O
NOR	O
flash	O
in	O
1997	O
.	O
</s>
<s>
NEC	O
demonstrated	O
quad-level	O
cells	O
in	O
1996	O
,	O
with	O
a	O
64Mbit	O
flash	B-Device
memory	I-Device
chip	O
storing	O
2bits	O
per	O
cell	O
.	O
</s>
<s>
STMicroelectronics	O
also	O
demonstrated	O
quad-level	O
cells	O
in	O
2000	O
,	O
with	O
a	O
64Mbit	O
NOR	O
flash	B-Device
memory	I-Device
chip	O
.	O
</s>
<s>
some	O
solid-state	B-Device
drives	I-Device
use	O
part	O
of	O
an	O
MLC	O
NAND	O
die	O
as	O
if	O
it	O
were	O
single-bit	O
SLC	O
NAND	O
,	O
giving	O
higher	O
write	O
speeds	O
.	O
</s>
<s>
Enterprise	B-Device
MLC	I-Device
(	O
eMLC	B-Device
)	O
is	O
a	O
more	O
expensive	O
variant	O
of	O
MLC	O
that	O
is	O
optimized	O
for	O
commercial	O
use	O
.	O
</s>
<s>
Although	O
many	O
SSD	B-Device
manufacturers	O
have	O
produced	O
MLC	O
drives	O
intended	O
for	O
enterprise	O
use	O
,	O
only	O
Micron	O
sells	O
raw	O
NAND	O
Flash	B-Device
chips	I-Device
under	O
this	O
designation	O
.	O
</s>
<s>
A	O
triple-level	O
cell	O
(	O
TLC	O
)	O
is	O
a	O
type	O
of	O
NAND	O
flash	B-Device
memory	I-Device
that	O
stores	O
3bits	O
of	O
information	O
per	O
cell	O
.	O
</s>
<s>
Samsung	B-Application
announced	O
a	O
type	O
of	O
NAND	O
flash	O
that	O
stores	O
3bits	O
of	O
information	O
per	O
cell	O
,	O
with	O
8total	O
voltage	O
states	O
(	O
values	O
or	O
levels	O
)	O
,	O
coining	O
the	O
term	O
"	O
triple-level	O
cell	O
"	O
(	O
"	O
TLC	O
"	O
)	O
.	O
</s>
<s>
Samsung	B-Application
Electronics	O
began	O
mass-producing	O
it	O
in	O
2010	O
,	O
and	O
it	O
was	O
first	O
seen	O
in	O
Samsung	B-Application
's	O
840	O
Series	O
SSDs	B-Device
.	O
</s>
<s>
Samsung	B-Application
refers	O
to	O
this	O
technology	O
as	O
3-bit	O
MLC	O
.	O
</s>
<s>
In	O
2013	O
,	O
Samsung	B-Application
introduced	O
V-NAND	O
(	O
Vertical	O
NAND	O
,	O
also	O
known	O
as	O
3D	O
NAND	O
)	O
with	O
triple-level	O
cells	O
,	O
which	O
had	O
a	O
memory	O
capacity	O
of	O
128Gbit	O
.	O
</s>
<s>
In	O
2009	O
,	O
Toshiba	O
and	O
SanDisk	O
introduced	O
NAND	O
flash	B-Device
memory	I-Device
chips	O
with	O
quad-level	O
cells	O
,	O
storing	O
4bits	O
per	O
cell	O
and	O
holding	O
a	O
capacity	O
of	O
64Gbit	O
.	O
</s>
<s>
SanDisk	O
X4	O
flash	B-Device
memory	I-Device
cards	I-Device
,	O
introduced	O
in	O
2009	O
,	O
was	O
one	O
of	O
the	O
first	O
products	O
based	O
on	O
NAND	B-Device
memory	I-Device
that	O
stores	O
4bits	O
per	O
cell	O
,	O
commonly	O
referred	O
to	O
as	O
quad-level-cell	O
(	O
QLC	O
)	O
,	O
using	O
16	O
discrete	O
charge	O
levels	O
(	O
states	O
)	O
in	O
each	O
individual	O
transistor	O
.	O
</s>
<s>
The	O
QLC	O
chips	O
used	O
in	O
these	O
memory	B-Device
cards	I-Device
were	O
manufactured	O
by	O
Toshiba	O
,	O
SanDisk	O
and	O
SK	O
Hynix	O
.	O
</s>
<s>
In	O
2018	O
,	O
ADATA	O
,	O
Intel	O
,	O
Micron	O
and	O
Samsung	B-Application
have	O
launched	O
some	O
SSD	B-Device
products	O
using	O
QLC	O
NAND	B-Device
memory	I-Device
.	O
</s>
<s>
In	O
2020	O
,	O
Samsung	B-Application
released	O
a	O
QLC	O
SSD	B-Device
with	O
storage	O
space	O
up	O
to	O
8TB	O
for	O
customers	O
.	O
</s>
<s>
It	O
is	O
the	O
SATA	O
SSD	B-Device
with	O
the	O
largest	O
storage	O
capacity	O
for	O
end	O
customers	O
as	O
of	O
2020	O
.	O
</s>
