<s>
The	O
Motorola	B-Device
68020	I-Device
(	O
"	O
sixty-eight-oh-twenty	O
"	O
,	O
"	O
sixty-eight-oh-two-oh	O
"	O
or	O
"	O
six-eight-oh-two-oh	O
"	O
)	O
is	O
a	O
32-bit	O
microprocessor	B-Architecture
from	O
Motorola	O
,	O
released	O
in	O
1984	O
.	O
</s>
<s>
A	O
lower-cost	O
version	O
was	O
also	O
made	O
available	O
,	O
known	O
as	O
the	O
68EC020	B-Device
.	O
</s>
<s>
In	O
keeping	O
with	O
naming	O
practices	O
common	O
to	O
Motorola	O
designs	O
,	O
the	O
68020	B-Device
is	O
usually	O
referred	O
to	O
as	O
the	O
"	O
020	O
"	O
,	O
pronounced	O
"	O
oh-two-oh	O
"	O
or	O
"	O
oh-twenty	O
"	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68030	I-Device
was	O
announced	O
in	O
September	O
1986	O
and	O
began	O
deliveries	O
in	O
the	O
summer	O
of	O
1987	O
.	O
</s>
<s>
At	O
the	O
time	O
the	O
Motorola	B-Device
68000	I-Device
was	O
designed	O
,	O
Motorola	O
's	O
design	O
and	O
fabrication	O
services	O
were	O
outdated	O
.	O
</s>
<s>
Although	O
even	O
small	O
companies	O
like	O
MOS	B-Architecture
Technologies	I-Architecture
and	O
Zilog	O
had	O
moved	O
on	O
to	O
silicon	O
gate	O
depletion	B-Algorithm
mode	I-Algorithm
NMOS	B-Algorithm
logic	I-Algorithm
on	O
ever-larger	O
wafers	B-Architecture
,	O
Motorola	O
was	O
still	O
using	O
metal	O
gates	O
and	O
enhancement	B-Algorithm
mode	I-Algorithm
and	O
their	O
largest	O
fab	O
worked	O
on	O
4-inch	O
wafers	B-Architecture
long	O
after	O
most	O
lines	O
had	O
moved	O
to	O
5-inch	O
.	O
</s>
<s>
Although	O
the	O
68000	B-Device
met	O
the	O
goal	O
of	O
being	O
the	O
fastest	O
CPU	B-General_Concept
available	O
when	O
it	O
was	O
introduced	O
,	O
it	O
was	O
not	O
nearly	O
as	O
powerful	O
as	O
it	O
could	O
be	O
if	O
it	O
had	O
been	O
designed	O
with	O
more	O
modern	O
techniques	O
.	O
</s>
<s>
During	O
the	O
period	O
of	O
the	O
68000	B-Device
design	O
,	O
the	O
company	O
was	O
working	O
with	O
Hitachi	O
on	O
their	O
process	O
technology	O
and	O
as	O
part	O
of	O
this	O
they	O
opened	O
a	O
new	O
fab	O
,	O
MOS-8	O
,	O
using	O
5-inch	O
wafers	B-Architecture
and	O
the	O
latest	O
HMOS	O
process	O
licensed	O
from	O
Intel	O
.	O
</s>
<s>
This	O
line	O
was	O
capable	O
of	O
building	O
all	O
of	O
the	O
new	O
techniques	O
,	O
but	O
the	O
68000	B-Device
went	O
ahead	O
with	O
the	O
older	O
design	O
as	O
they	O
were	O
sure	O
it	O
would	O
work	O
.	O
</s>
<s>
The	O
conversion	O
to	O
the	O
new	O
design	O
techniques	O
took	O
place	O
during	O
the	O
Motorola	B-Device
68010	I-Device
effort	O
,	O
a	O
relatively	O
minor	O
upgrade	O
to	O
the	O
original	O
design	O
that	O
added	O
basic	O
virtual	B-Architecture
memory	I-Architecture
support	O
for	O
the	O
emerging	O
Unix	B-Device
workstation	I-Device
market	O
.	O
</s>
<s>
Those	O
using	O
the	O
68k	B-Device
in	O
Unix	O
systems	O
also	O
stated	O
they	O
would	O
purchase	O
a	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
for	O
every	O
one	O
of	O
the	O
machines	O
if	O
one	O
was	O
available	O
.	O
</s>
<s>
The	O
original	O
68000	B-Device
had	O
been	O
designed	O
as	O
a	O
hybrid	O
16/32	O
-bit	O
system	O
largely	O
because	O
the	O
maximum	O
number	O
of	O
pins	O
available	O
on	O
dual	B-Algorithm
inline	I-Algorithm
packages	I-Algorithm
(	O
DIPs	B-Algorithm
)	O
was	O
64	O
,	O
and	O
even	O
at	O
that	O
size	O
,	O
packaging	O
of	O
this	O
size	O
was	O
highly	O
problematic	O
.	O
</s>
<s>
By	O
reducing	O
the	O
number	O
of	O
address	B-Architecture
pins	I-Architecture
to	O
24	O
,	O
and	O
the	O
data	B-General_Concept
pins	I-General_Concept
to	O
only	O
16	O
,	O
there	O
were	O
enough	O
free	O
pins	O
to	O
implement	O
all	O
the	O
other	O
needed	O
lines	O
,	O
like	O
interrupts	O
and	O
power	O
supplies	O
.	O
</s>
<s>
The	O
24-pin	O
address	B-Architecture
bus	I-Architecture
meant	O
that	O
the	O
memory	O
could	O
only	O
be	O
16MB	O
in	O
total	O
,	O
which	O
was	O
at	O
this	O
point	O
becoming	O
a	O
limitation	O
.	O
</s>
<s>
The	O
16-bit	O
data	B-General_Concept
bus	I-General_Concept
meant	O
reading	O
a	O
32-bit	O
word	O
from	O
that	O
memory	O
required	O
two	O
clock	O
cycles	O
.	O
</s>
<s>
Moving	O
to	O
32bit	O
addressing	O
would	O
also	O
make	O
the	O
implementation	O
of	O
virtual	B-Architecture
memory	I-Architecture
easier	O
,	O
and	O
allow	O
for	O
more	O
than	O
16MB	O
of	O
random	B-Architecture
access	I-Architecture
memory	I-Architecture
.	O
</s>
<s>
By	O
the	O
early	O
1980s	O
,	O
similar	O
limitations	O
on	O
all	O
modern	O
CPU	B-General_Concept
designs	O
led	O
to	O
the	O
introduction	O
of	O
the	O
pin	B-Algorithm
grid	I-Algorithm
array	I-Algorithm
that	O
replaced	O
the	O
DIP	B-Algorithm
.	O
</s>
<s>
Technically	O
,	O
the	O
020	O
was	O
moving	O
from	O
the	O
long-established	O
NMOS	B-Algorithm
logic	I-Algorithm
design	O
to	O
a	O
CMOS	B-Device
layout	O
,	O
which	O
requires	O
two	O
transistors	O
per	O
gate	O
.	O
</s>
<s>
Common	O
knowledge	O
of	O
the	O
era	O
suggested	O
that	O
CMOS	B-Device
cost	O
four	O
times	O
as	O
much	O
as	O
NMOS	O
,	O
and	O
there	O
was	O
a	O
significant	O
amount	O
of	O
the	O
market	O
that	O
believed	O
"	O
CMOS	B-Device
equals	O
bad.	O
"	O
</s>
<s>
The	O
launch	O
price	O
was	O
quoted	O
at	O
$487	O
each	O
,	O
about	O
the	O
same	O
as	O
the	O
68000	B-Device
when	O
it	O
was	O
launched	O
in	O
1980	O
,	O
but	O
the	O
68000	B-Device
was	O
now	O
available	O
for	O
about	O
$15	O
.	O
</s>
<s>
The	O
design	O
had	O
been	O
laid	O
out	O
to	O
be	O
built	O
in	O
the	O
same	O
MOS-8	O
factory	O
as	O
the	O
68000	B-Device
,	O
although	O
several	O
new	O
pieces	O
of	O
equipment	O
were	O
introduced	O
to	O
support	O
it	O
.	O
</s>
<s>
That	O
is	O
,	O
for	O
every	O
wafer	B-Architecture
sent	O
through	O
the	O
multi-step	O
process	O
,	O
zero	O
working	O
chips	O
would	O
be	O
produced	O
.	O
</s>
<s>
By	O
this	O
point	O
,	O
their	O
workstation	B-Device
customers	O
had	O
already	O
developed	O
complete	O
systems	O
ready	O
to	O
use	O
the	O
020	O
and	O
the	O
new	O
floating	B-General_Concept
point	I-General_Concept
unit	I-General_Concept
,	O
the	O
Motorola	B-General_Concept
68881	I-General_Concept
.	O
</s>
<s>
This	O
gave	O
them	O
considerably	O
more	O
room	O
to	O
work	O
with	O
,	O
allowing	O
the	O
addition	O
of	O
larger	O
processor	B-General_Concept
caches	I-General_Concept
,	O
a	O
built-in	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
and	O
other	O
features	O
.	O
</s>
<s>
The	O
Motorola	B-Device
68030	I-Device
was	O
announced	O
in	O
September	O
1986	O
,	O
with	O
deliveries	O
to	O
begin	O
the	O
next	O
summer	O
.	O
</s>
<s>
There	O
were	O
significant	O
differences	O
between	O
the	O
68000	B-Device
and	O
020	O
,	O
especially	O
due	O
to	O
the	O
32-bit	O
memory	O
interface	O
.	O
</s>
<s>
The	O
first	O
Macintosh	B-Device
with	O
the	O
020	O
was	O
the	O
Macintosh	B-Device
II	I-Device
,	O
released	O
in	O
March	O
1987	O
,	O
two	O
years	O
after	O
the	O
020	O
had	O
become	O
widely	O
available	O
.	O
</s>
<s>
Only	O
eighteen	O
months	O
later	O
,	O
the	O
Macintosh	B-Device
IIx	I-Device
replaced	O
it	O
,	O
using	O
the	O
030	O
.	O
</s>
<s>
The	O
68020	B-Device
has	O
32-bit	O
internal	O
and	O
external	O
data	O
and	O
address	O
buses	O
,	O
compared	O
to	O
the	O
early	O
680x0	B-Device
models	O
with	O
16-bit	O
data	O
and	O
24-bit	O
address	O
buses	O
.	O
</s>
<s>
The	O
68020	B-Device
's	O
ALU	B-General_Concept
is	O
also	O
natively	O
32-bit	O
,	O
so	O
can	O
perform	O
32-bit	O
operations	O
in	O
one	O
clock	O
cycle	O
,	O
whereas	O
the	O
68000	B-Device
took	O
a	O
minimum	O
of	O
two	O
clock	O
cycles	O
due	O
to	O
its	O
16-bit	O
ALU	B-General_Concept
.	O
</s>
<s>
Newer	O
packaging	O
methods	O
allowed	O
the	O
'	O
020	O
to	O
feature	O
more	O
external	O
pins	O
without	O
the	O
large	O
size	O
that	O
the	O
earlier	O
dual	B-Algorithm
in-line	I-Algorithm
package	I-Algorithm
method	O
required	O
.	O
</s>
<s>
The	O
68EC020	B-Device
lowered	O
cost	O
through	O
a	O
24-bit	O
address	B-Architecture
bus	I-Architecture
.	O
</s>
<s>
The	O
68020	B-Device
was	O
produced	O
at	O
speeds	O
ranging	O
from	O
12MHz	O
to	O
33MHz	O
.	O
</s>
<s>
The	O
68020	B-Device
has	O
a	O
32-bit	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	B-General_Concept
)	O
,	O
32-bit	O
external	O
data	O
and	O
address	O
buses	O
.	O
</s>
<s>
The	O
68020	B-Device
(	O
and	O
68030	B-Device
)	O
has	O
a	O
proper	O
three-stage	O
pipeline	O
.	O
</s>
<s>
Though	O
the	O
68010	B-Device
had	O
a	O
"	O
loop	O
mode	O
"	O
,	O
which	O
sped	O
loops	O
through	O
what	O
was	O
effectively	O
a	O
tiny	O
instruction	O
cache	O
,	O
it	O
held	O
only	O
two	O
short	O
instructions	O
and	O
was	O
thus	O
little	O
used	O
.	O
</s>
<s>
The	O
68020	B-Device
replaced	O
this	O
with	O
a	O
proper	O
instruction	O
cache	O
of	O
256	O
bytes	O
,	O
the	O
first	O
68k	B-Device
series	O
processor	O
to	O
feature	O
true	O
on-chip	B-General_Concept
cache	I-General_Concept
memory	O
.	O
</s>
<s>
The	O
previous	O
68000	B-Device
and	O
68010	B-Device
processors	O
could	O
only	O
access	O
word	O
(	O
16-bit	O
)	O
and	O
long	O
word	O
(	O
32-bit	O
)	O
data	O
in	O
memory	O
if	O
it	O
were	O
word-aligned	O
(	O
located	O
at	O
an	O
even	O
address	O
)	O
.	O
</s>
<s>
The	O
68020	B-Device
has	O
no	O
alignment	O
restrictions	O
on	O
data	O
access	O
.	O
</s>
<s>
The	O
68020	B-Device
has	O
a	O
small	O
256-byte	O
direct-mapped	O
instruction	O
cache	O
,	O
arranged	O
as	O
64	O
four-byte	O
entries	O
.	O
</s>
<s>
The	O
resulting	O
decrease	O
in	O
bus	O
traffic	O
was	O
particularly	O
important	O
in	O
systems	O
relying	O
heavily	O
on	O
DMA	B-General_Concept
.	O
</s>
<s>
The	O
68020	B-Device
has	O
a	O
coprocessor	B-General_Concept
interface	O
supporting	O
up	O
to	O
eight	O
coprocessors	B-General_Concept
.	O
</s>
<s>
The	O
main	O
CPU	B-General_Concept
recognizes	O
"	O
F-line	O
"	O
instructions	O
(	O
with	O
the	O
four	O
most	O
significant	O
opcode	O
bits	O
all	O
one	O
)	O
,	O
and	O
uses	O
special	O
bus	O
cycles	O
to	O
interact	O
with	O
a	O
coprocessor	B-General_Concept
to	O
execute	O
these	O
instructions	O
.	O
</s>
<s>
Two	O
types	O
of	O
coprocessors	B-General_Concept
were	O
defined	O
:	O
floating	B-General_Concept
point	I-General_Concept
units	I-General_Concept
(	O
MC68881	B-General_Concept
or	I-General_Concept
MC68882	I-General_Concept
FPUs	B-General_Concept
)	O
and	O
the	O
paged	B-General_Concept
memory	I-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MC68851	B-General_Concept
PMMU	B-General_Concept
)	O
.	O
</s>
<s>
Only	O
one	O
PMMU	B-General_Concept
can	O
be	O
used	O
with	O
a	O
CPU	B-General_Concept
.	O
</s>
<s>
In	O
principle	O
,	O
multiple	O
FPUs	B-General_Concept
could	O
be	O
used	O
with	O
a	O
CPU	B-General_Concept
,	O
but	O
it	O
was	O
not	O
commonly	O
done	O
.	O
</s>
<s>
The	O
coprocessor	B-General_Concept
interface	O
is	O
asynchronous	O
,	O
so	O
it	O
is	O
possible	O
to	O
run	O
the	O
coprocessors	B-General_Concept
at	O
a	O
different	O
clock	O
rate	O
than	O
the	O
CPU	B-General_Concept
.	O
</s>
<s>
Multiprocessing	O
support	O
is	O
implemented	O
externally	O
by	O
the	O
use	O
of	O
an	O
RMC	O
pin	O
to	O
indicate	O
an	O
indivisible	O
read-modify-write	B-Operating_System
cycle	O
in	O
progress	O
.	O
</s>
<s>
Software	O
support	O
for	O
multiprocessing	O
includes	O
the	O
TAS	B-Operating_System
,	O
CAS	B-Operating_System
and	O
CAS2	B-Operating_System
instructions	O
.	O
</s>
<s>
In	O
a	O
multiprocessor	O
system	O
,	O
coprocessors	B-General_Concept
could	O
not	O
be	O
shared	O
between	O
CPUs	O
.	O
</s>
<s>
To	O
avoid	O
problems	O
with	O
returns	O
from	O
coprocessor	B-General_Concept
,	O
bus	O
error	O
,	O
and	O
address	O
error	O
exceptions	O
,	O
it	O
was	O
generally	O
necessary	O
in	O
a	O
multiprocessor	O
system	O
for	O
all	O
CPUs	O
to	O
be	O
the	O
same	O
model	O
,	O
and	O
for	O
all	O
FPUs	B-General_Concept
to	O
be	O
the	O
same	O
model	O
as	O
well	O
.	O
</s>
<s>
The	O
new	O
instructions	O
include	O
some	O
minor	O
improvements	O
and	O
extensions	O
to	O
the	O
supervisor	O
state	O
,	O
several	O
instructions	O
for	O
software	O
management	O
of	O
a	O
multiprocessing	O
system	O
(	O
which	O
were	O
removed	O
in	O
the	O
68060	O
)	O
,	O
some	O
support	O
for	O
high-level	O
languages	O
which	O
did	O
not	O
get	O
used	O
much	O
(	O
and	O
was	O
removed	O
from	O
future	O
680x0	B-Device
processors	O
)	O
,	O
bigger	O
multiply	O
(	O
32×32	O
→	O
64	O
bits	O
)	O
and	O
divide	O
(	O
64÷32	O
→	O
32	O
bits	O
quotient	O
and	O
32	O
bits	O
remainder	O
)	O
instructions	O
,	O
and	O
bit	O
field	O
manipulations	O
.	O
</s>
<s>
Some	O
programs	O
used	O
the	O
high	O
8	O
bits	O
(	O
bits	O
24-31	O
)	O
of	O
addresses	O
to	O
contain	O
various	O
flag	O
bits	O
,	O
with	O
the	O
understanding	O
that	O
the	O
earlier	O
680x0	B-Device
CPUs	O
would	O
safely	O
ignore	O
these	O
high	O
bits	O
.	O
</s>
<s>
Such	O
software	O
had	O
to	O
be	O
rewritten	O
to	O
adjust	O
to	O
the	O
larger	O
physical	O
address	O
space	O
available	O
to	O
the	O
68020	B-Device
and	O
later	O
CPUs	O
.	O
</s>
<s>
The	O
68020	B-Device
was	O
used	O
in	O
the	O
Apple	B-Device
Macintosh	I-Device
II	I-Device
and	O
Macintosh	B-Device
LC	I-Device
personal	B-Device
computers	I-Device
,	O
Sun-3	B-Device
workstations	I-Device
,	O
Amiga	B-Application
1200	I-Application
(	O
68EC020	B-Device
variant	O
)	O
,	O
the	O
Hewlett-Packard	O
8711	O
Series	O
Network	O
Analyzers	O
,	O
HP	O
9000/320	O
,	O
HP	O
9000/330	O
,	O
Apollo	O
Computer	O
's	O
DN3000	B-Device
and	I-Device
DN4000	I-Device
workstations	B-Device
,	O
and	O
the	O
Alpha	O
Microsystems	O
AM-2000	O
.	O
</s>
<s>
The	O
68020	B-Device
was	O
an	O
alternative	O
upgrade	O
to	O
the	O
Sinclair	B-Device
QL	I-Device
's	O
68008	B-Device
in	O
the	O
Super	O
Gold	O
Card	O
interface	O
by	O
Miracle	O
Systems	O
.	O
</s>
<s>
The	O
Amiga	B-Device
2500	I-Device
and	O
A2500UX	O
optionally	O
shipped	O
with	O
the	O
A2620	O
Accelerator	O
using	O
a	O
68020	B-Device
,	O
68881	B-General_Concept
FPU	O
and	O
68851	B-General_Concept
MMU	O
.	O
</s>
<s>
The	O
2500UX	O
shipped	O
with	O
Amiga	B-Operating_System
Unix	I-Operating_System
,	O
requiring	O
an	O
'	O
020	O
or	O
'	O
030	O
processor	O
.	O
</s>
<s>
A	O
number	O
of	O
digital	O
oscilloscopes	O
from	O
the	O
mid-80s	O
to	O
the	O
late-90s	O
used	O
the	O
68020	B-Device
,	O
including	O
the	O
LeCroy	O
9300	O
Series	O
(	O
higher	O
end	O
models	O
including	O
"	O
C	B-Algorithm
"	O
suffix	O
models	O
used	O
the	O
more	O
powerful	O
68EC030	B-Device
;	O
the	O
9300	O
models	O
with	O
a	O
68020	B-Device
processor	O
can	O
be	O
upgraded	O
to	O
the	O
68EC030	B-Device
with	O
a	O
change	O
of	O
the	O
CPU	B-General_Concept
board	O
)	O
and	O
the	O
earlier	O
LeCroy	O
9400	O
series	O
(	O
all	O
models	O
excluding	O
the	O
9400/9400A	O
which	O
used	O
the	O
68000	B-Device
)	O
,	O
along	O
with	O
certain	O
Tektronix	O
TDS	O
Series	O
models	O
.	O
</s>
<s>
The	O
HP	O
54520	O
,	O
54522	O
,	O
54540	O
and	O
54542	O
also	O
use	O
the	O
68020	B-Device
,	O
together	O
with	O
a	O
68882	B-General_Concept
FPU	O
.	O
</s>
<s>
It	O
is	O
used	O
in	O
the	O
flight	O
control	O
and	O
radar	O
systems	O
of	O
the	O
Eurofighter	B-Application
Typhoon	I-Application
combat	O
aircraft	O
.	O
</s>
<s>
The	O
Nortel	O
Networks	O
DMS-100	B-Protocol
telephone	O
central	O
office	O
switch	O
also	O
used	O
the	O
68020	B-Device
as	O
the	O
first	O
microprocessor	B-Architecture
of	O
the	O
SuperNode	O
computing	O
core	O
.	O
</s>
<s>
The	O
68EC020	B-Device
is	O
a	O
lower	O
cost	O
version	O
of	O
the	O
Motorola	B-Device
68020	I-Device
.	O
</s>
<s>
The	O
main	O
difference	O
is	O
that	O
the	O
68EC020	B-Device
only	O
has	O
a	O
24-bit	O
address	B-Architecture
bus	I-Architecture
,	O
rather	O
than	O
the	O
32-bit	O
address	B-Architecture
bus	I-Architecture
of	O
the	O
full	O
68020	B-Device
,	O
and	O
thus	O
is	O
only	O
able	O
to	O
address	O
16MB	O
of	O
memory	O
.	O
</s>
<s>
The	O
Amiga	B-Application
1200	I-Application
computer	O
and	O
the	O
Amiga	B-Device
CD32	I-Device
game	O
console	O
use	O
the	O
cost-reduced	O
68EC020	B-Device
;	O
the	O
Namco	B-Application
System	I-Application
22	I-Application
,	O
Taito	B-Application
F3	I-Application
and	O
Konami	B-Application
GX	I-Application
arcade	O
boards	O
also	O
used	O
this	O
processor	O
.	O
</s>
<s>
The	O
Atari	B-Device
Jaguar	I-Device
II	O
prototype	O
featured	O
this	O
to	O
replace	O
the	O
68000	B-Device
of	O
the	O
original	O
Atari	B-Device
Jaguar	I-Device
console	O
.	O
</s>
<s>
In	O
2014	O
,	O
Rochester	O
Electronics	O
re-established	O
manufacturing	O
capability	O
for	O
the	O
68020	B-Device
microprocessor	I-Device
and	O
it	O
is	O
still	O
available	O
today	O
.	O
</s>
