<s>
It	O
featured	O
three	O
sets	O
of	O
processor	O
registers	O
,	O
allowing	O
it	O
to	O
switch	O
to	O
an	O
interrupt	B-Application
handler	O
in	O
a	O
single	O
cycle	O
,	O
and	O
a	O
wait-for-data	O
mode	O
that	O
aided	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
.	O
</s>
<s>
The	O
Fairchild	B-General_Concept
F8	I-General_Concept
was	O
introduced	O
at	O
about	O
the	O
same	O
time	O
,	O
aimed	O
at	O
the	O
same	O
markets	O
.	O
</s>
<s>
The	O
5065	O
began	O
as	O
a	O
custom	O
PMOS	B-Algorithm
CPU	O
design	O
by	O
Motorola	O
for	O
a	O
desktop	O
calculator	O
being	O
built	O
by	O
Olivetti	O
.	O
</s>
<s>
Soon	O
after	O
,	O
the	O
two	O
formed	O
the	O
core	O
of	O
the	O
development	O
team	O
for	O
the	O
Motorola	B-Device
6800	I-Device
.	O
</s>
<s>
In	O
September	O
1974	O
,	O
Fairchild	O
Semiconductor	O
launched	O
the	O
Fairchild	B-General_Concept
F8	I-General_Concept
with	O
sample	O
shipments	O
starting	O
the	O
next	O
April	O
and	O
full	O
production	O
later	O
that	O
year	O
.	O
</s>
<s>
The	O
F8	O
had	O
a	O
number	O
of	O
design	O
features	O
that	O
made	O
it	O
very	O
easy	O
to	O
implement	O
,	O
with	O
typical	O
designs	O
requiring	O
only	O
two	O
chips	O
to	O
provide	O
all	O
the	O
needed	O
ROM	O
,	O
RAM	O
,	O
clock	O
and	O
I/O	B-General_Concept
.	O
</s>
<s>
It	O
also	O
improved	O
on	O
the	O
5056	O
in	O
that	O
it	O
was	O
an	O
NMOS-based	O
chip	O
,	O
allowing	O
it	O
to	O
be	O
fabricated	O
at	O
a	O
smaller	O
feature	O
size	O
which	O
lowered	O
its	O
cost	O
and	O
allowed	O
it	O
to	O
run	O
much	O
faster	O
.	O
</s>
<s>
In	O
June	O
1975	O
,	O
Mostek	O
licensed	O
the	O
F8	O
design	O
from	O
Fairchild	O
and	O
brought	O
it	O
up	O
on	O
their	O
new	O
NMOS	B-Algorithm
line	O
.	O
</s>
<s>
In	O
the	O
early	O
1970s	O
the	O
idea	O
of	O
a	O
microprocessor	O
being	O
used	O
as	O
the	O
basis	O
for	O
a	O
standalone	O
computer	O
was	O
still	O
not	O
common	O
,	O
and	O
designs	O
of	O
the	O
era	O
generally	O
included	O
features	O
intended	O
to	O
make	O
them	O
easy	O
to	O
use	O
in	O
what	O
today	O
would	O
be	O
known	O
as	O
the	O
microcontroller	B-Architecture
area	O
,	O
processors	O
that	O
are	O
used	O
to	O
control	O
a	O
device	O
like	O
a	O
cash	O
register	O
or	O
gas	O
pump	O
.	O
</s>
<s>
These	O
systems	O
have	O
to	O
respond	O
quickly	O
to	O
different	O
inputs	O
,	O
which	O
is	O
normally	O
accomplished	O
via	O
interrupts	B-Application
.	O
</s>
<s>
As	O
this	O
is	O
a	O
common	O
operation	O
in	O
these	O
settings	O
,	O
many	O
designs	O
focused	O
on	O
ways	O
to	O
improve	O
interrupt	B-Application
performance	O
or	O
implementation	O
.	O
</s>
<s>
In	O
the	O
case	O
of	O
the	O
5065	O
,	O
this	O
was	O
accomplished	O
by	O
providing	O
three	O
separate	O
sets	O
of	O
registers	O
for	O
the	O
accumulator	B-General_Concept
,	O
program	B-General_Concept
counter	I-General_Concept
and	O
the	O
internal	O
"	O
main	O
link	O
"	O
register	O
,	O
along	O
with	O
the	O
carry	B-Algorithm
flag	I-Algorithm
.	O
</s>
<s>
On	O
the	O
receipt	O
of	O
an	O
interrupt	B-Application
,	O
the	O
processor	O
completed	O
the	O
current	B-General_Concept
instruction	I-General_Concept
and	O
then	O
pointed	O
to	O
the	O
selected	O
set	O
of	O
these	O
registers	O
,	O
or	O
as	O
they	O
called	O
them	O
,	O
"	O
levels	O
"	O
.	O
</s>
<s>
This	O
allowed	O
the	O
system	O
to	O
track	O
three	O
separate	O
sections	O
of	O
code	O
,	O
corresponding	O
to	O
normal	O
operation	O
and	O
two	O
interrupt	B-Application
levels	O
.	O
</s>
<s>
External	O
devices	O
could	O
raise	O
an	O
interrupt	B-Application
on	O
two	O
pins	O
,	O
and	O
,	O
both	O
of	O
which	O
could	O
be	O
turned	O
on	O
or	O
off	O
in	O
software	O
.	O
</s>
<s>
So	O
for	O
instance	O
,	O
if	O
was	O
enabled	O
and	O
triggered	O
,	O
the	O
processor	O
responded	O
by	O
completing	O
the	O
current	B-General_Concept
instruction	I-General_Concept
,	O
switching	O
to	O
the	O
level	O
2	O
registers	O
,	O
and	O
continuing	O
.	O
</s>
<s>
Normal	O
operation	O
was	O
level	O
3	O
,	O
which	O
it	O
returned	O
to	O
when	O
a	O
return-from-interrupt	O
instruction	O
was	O
called	O
.	O
</s>
<s>
This	O
makes	O
interrupt	B-Application
servicing	O
very	O
rapid	O
because	O
the	O
state	O
information	O
is	O
being	O
stored	O
automatically	O
in	O
a	O
single	O
cycle	O
,	O
whereas	O
many	O
designs	O
require	O
this	O
information	O
to	O
be	O
stored	O
out	O
using	O
user-written	O
code	O
that	O
may	O
take	O
multiple	O
cycles	O
to	O
complete	O
.	O
</s>
<s>
As	O
the	O
processor	O
state	O
was	O
saved	O
separately	O
,	O
only	O
the	O
return	B-Language
address	I-Language
had	O
to	O
be	O
explicitly	O
written	O
out	O
in	O
code	O
.	O
</s>
<s>
In	O
this	O
case	O
,	O
the	O
first	O
256	O
locations	O
in	O
memory	O
,	O
the	O
zero	B-General_Concept
page	I-General_Concept
,	O
was	O
used	O
as	O
a	O
call	B-General_Concept
stack	I-General_Concept
.	O
</s>
<s>
To	O
aid	O
direct	B-General_Concept
memory	I-General_Concept
access	I-General_Concept
(	O
DMA	O
)	O
implementations	O
,	O
the	O
system	O
included	O
a	O
pin	O
that	O
was	O
raised	O
by	O
an	O
external	O
device	O
that	O
wanted	O
access	O
to	O
memory	O
.	O
</s>
<s>
When	O
this	O
signal	O
was	O
received	O
,	O
the	O
processor	O
would	O
continue	O
with	O
the	O
current	B-General_Concept
instruction	I-General_Concept
,	O
including	O
any	O
required	O
reading	O
and	O
writing	O
from	O
memory	O
.	O
</s>
<s>
There	O
were	O
a	O
total	O
of	O
51	O
instructions	O
,	O
and	O
81	O
opcodes	B-Language
.	O
</s>
<s>
The	O
instructions	O
come	O
in	O
many	O
formats	O
,	O
but	O
most	O
of	O
them	O
in	O
two-byte	O
opcode-operand	O
pairs	O
.	O
</s>
<s>
A	O
small	O
number	O
of	O
one-byte	O
instructions	O
were	O
used	O
for	O
things	O
like	O
return-from-subroutine	B-Language
or	O
shift-left	O
,	O
which	O
do	O
not	O
need	O
any	O
additional	O
information	O
.	O
</s>
<s>
Those	O
instructions	O
that	O
used	O
memory	O
(	O
as	O
opposed	O
to	O
registers	O
)	O
used	O
a	O
two-byte	O
format	O
with	O
the	O
opcode	B-Language
in	O
the	O
upper	O
6	O
bits	O
of	O
the	O
first	O
byte	O
.	O
</s>
<s>
The	O
second	O
(	O
bit	O
0	O
)	O
controlled	O
whether	O
the	O
8-bit	O
value	O
was	O
offset	O
from	O
the	O
current	O
memory	B-General_Concept
page	I-General_Concept
defined	O
by	O
the	O
program	B-General_Concept
counter	I-General_Concept
,	O
or	O
in	O
the	O
zero	B-General_Concept
page	I-General_Concept
.	O
</s>
<s>
This	O
means	O
that	O
when	O
using	O
direct	O
addressing	O
,	O
the	O
data	O
has	O
to	O
lie	O
within	O
256	O
bytes	O
of	O
the	O
current	B-General_Concept
instruction	I-General_Concept
,	O
or	O
within	O
the	O
first	O
256	O
bytes	O
of	O
memory	O
.	O
</s>
<s>
This	O
pattern	O
was	O
commonly	O
seen	O
on	O
minicomputers	B-Architecture
of	O
the	O
era	O
,	O
as	O
it	O
made	O
certain	O
forms	O
of	O
looping	O
over	O
data	O
easy	O
to	O
implement	O
.	O
</s>
<s>
This	O
style	O
of	O
chained	O
access	O
was	O
also	O
seen	O
on	O
minicomputer	B-Architecture
systems	O
like	O
the	O
IBM	B-Device
1620	I-Device
,	O
HP	B-Device
2100	I-Device
and	O
Data	B-Device
General	I-Device
Nova	I-Device
,	O
but	O
was	O
uncommon	O
for	O
microprocessors	O
.	O
</s>
<s>
For	O
branches	O
,	O
subroutine	O
calls	O
and	O
jumps	O
,	O
a	O
second	O
format	O
was	O
used	O
where	O
the	O
opcode	B-Language
used	O
the	O
upper	O
4	O
bits	O
,	O
and	O
the	O
lower	O
4	O
bits	O
along	O
with	O
the	O
8-bit	O
operand	O
form	O
a	O
12-bit	O
address	O
.	O
</s>
<s>
Input/output	B-General_Concept
was	O
handled	O
through	O
special	O
instructions	O
and	O
was	O
not	O
memory	B-Architecture
mapped	I-Architecture
.	O
</s>
<s>
The	O
upper	O
4	O
bits	O
of	O
the	O
opcode	B-Language
held	O
the	O
I/O	B-General_Concept
instruction	O
(	O
input	O
,	O
output	O
,	O
status	O
,	O
etc	O
.	O
</s>
<s>
In	O
the	O
first	O
cycle	O
the	O
lower	O
6	O
bits	O
of	O
the	O
instruction	O
,	O
including	O
the	O
4	O
bit	O
free	O
field	O
,	O
were	O
put	O
on	O
the	O
H	O
bus	O
while	O
the	O
value	O
of	O
the	O
accumulator	B-General_Concept
was	O
put	O
on	O
the	O
L	O
bus	O
.	O
</s>
<s>
The	O
fourth	O
indicated	O
the	O
end	O
of	O
the	O
I/O	B-General_Concept
cycle	O
.	O
</s>
<s>
Built	O
on	O
the	O
PMOS	B-Algorithm
process	O
that	O
was	O
common	O
in	O
the	O
early	O
1970s	O
,	O
the	O
5065	O
required	O
three	O
voltage	O
supply	O
levels	O
,	O
-12V	O
(	O
VGG	O
)	O
,	O
+	O
5V(VSS )	O
,	O
-5V	O
(	O
VDD	O
)	O
and	O
ground	O
.	O
</s>
<s>
It	O
was	O
packaged	O
in	O
a	O
40-pin	O
DIP	B-Algorithm
,	O
as	O
was	O
common	O
for	O
most	O
processors	O
of	O
the	O
era	O
.	O
</s>
<s>
As	O
was	O
the	O
case	O
for	O
most	O
PMOS	B-Algorithm
designs	O
,	O
an	O
external	O
clock	O
chip	O
was	O
required	O
,	O
in	O
this	O
case	O
the	O
MK5009	O
.	O
</s>
<s>
This	O
included	O
the	O
clock	O
driver	O
,	O
512	O
bytes	O
of	O
ROM	O
,	O
1	O
to	O
12	O
kB	O
of	O
RAM	O
,	O
and	O
a	O
UART	O
for	O
use	O
with	O
a	O
computer	B-General_Concept
terminal	I-General_Concept
.	O
</s>
<s>
A	O
cross	B-Language
assembler	I-Language
was	O
also	O
available	O
for	O
an	O
unspecified	O
"	O
16-bit	O
minicomputer	B-Architecture
"	O
.	O
</s>
