<s>
Minimal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
computer	I-General_Concept
(	O
MISC	O
)	O
is	O
a	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
architecture	O
,	O
usually	O
in	O
the	O
form	O
of	O
a	O
microprocessor	B-Architecture
,	O
with	O
a	O
very	O
small	O
number	O
of	O
basic	O
operations	O
and	O
corresponding	O
opcodes	B-Language
,	O
together	O
forming	O
an	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
Such	O
sets	O
are	O
commonly	O
stack-based	B-Application
rather	O
than	O
register-based	B-General_Concept
to	O
reduce	O
the	O
size	O
of	O
operand	O
specifiers	O
.	O
</s>
<s>
Such	O
a	O
stack	B-Application
machine	I-Application
architecture	O
is	O
inherently	O
simpler	O
since	O
all	O
instructions	O
operate	O
on	O
the	O
top-most	O
stack	B-Application
entries	O
.	O
</s>
<s>
One	O
result	O
of	O
the	O
stack	B-Application
architecture	I-Application
is	O
an	O
overall	O
smaller	O
instruction	B-General_Concept
set	I-General_Concept
,	O
allowing	O
a	O
smaller	O
and	O
faster	O
instruction	O
decode	O
unit	O
with	O
overall	O
faster	O
operation	O
of	O
individual	O
instructions	O
.	O
</s>
<s>
Separate	O
from	O
the	O
stack	B-Application
definition	O
of	O
a	O
MISC	O
architecture	O
,	O
is	O
the	O
MISC	O
architecture	O
being	O
defined	O
by	O
the	O
number	O
of	O
instructions	O
supported	O
.	O
</s>
<s>
Typically	O
a	O
minimal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
computer	I-General_Concept
is	O
viewed	O
as	O
having	O
32	O
or	O
fewer	O
instructions	O
,	O
where	O
NOP	O
,	O
RESET	O
,	O
and	O
CPUID	B-Architecture
type	O
instructions	O
are	O
usually	O
not	O
counted	O
by	O
consensus	O
due	O
to	O
their	O
fundamental	O
nature	O
.	O
</s>
<s>
A	O
MISC	O
CPU	O
cannot	O
have	O
zero	O
instructions	O
as	O
that	O
is	O
a	O
zero	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
computer	I-General_Concept
.	O
</s>
<s>
A	O
MISC	O
CPU	O
cannot	O
have	O
one	O
instruction	O
as	O
that	O
is	O
a	O
one	B-Application
instruction	I-Application
set	I-Application
computer	I-Application
.	O
</s>
<s>
If	O
a	O
CPU	O
has	O
an	O
NX	B-General_Concept
bit	I-General_Concept
,	O
it	O
is	O
more	O
likely	O
to	O
be	O
viewed	O
as	O
being	O
a	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
CISC	O
)	O
or	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
.	O
</s>
<s>
If	O
a	O
CPU	O
has	O
a	O
microcode	B-Device
subsystem	O
,	O
that	O
excludes	O
it	O
from	O
being	O
a	O
MISC	O
.	O
</s>
<s>
The	O
only	O
addressing	B-Language
mode	I-Language
considered	O
acceptable	O
for	O
a	O
MISC	O
CPU	O
to	O
have	O
is	O
load/store	B-Architecture
,	O
the	O
same	O
as	O
for	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
CPUs	O
.	O
</s>
<s>
Also	O
,	O
the	O
instruction	B-General_Concept
pipelines	I-General_Concept
of	O
MISC	O
as	O
a	O
rule	O
tend	O
to	O
be	O
very	O
simple	O
.	O
</s>
<s>
Instruction	B-General_Concept
pipelines	I-General_Concept
,	O
branch	B-General_Concept
prediction	I-General_Concept
,	O
out-of-order	B-General_Concept
execution	I-General_Concept
,	O
register	B-Architecture
renaming	I-Architecture
,	O
and	O
speculative	B-General_Concept
execution	I-General_Concept
broadly	O
exclude	O
a	O
CPU	O
from	O
being	O
classified	O
as	O
a	O
MISC	O
architecture	O
.	O
</s>
<s>
While	O
1-bit	O
CPUs	O
are	O
otherwise	O
obsolete	O
(	O
and	O
were	O
not	O
MISCs	O
nor	O
OISCs	O
)	O
,	O
the	O
first	O
carbon	O
nanotube	O
computer	O
is	O
a	O
1-bit	O
one-instruction	B-Application
set	I-Application
computer	I-Application
,	O
and	O
has	O
only	O
178	O
transistors	O
,	O
and	O
thus	O
likely	O
the	O
lowest-complexity	O
(	O
or	O
next-lowest	O
)	O
CPU	O
produced	O
so	O
far	O
(	O
by	O
transistor	O
count	O
)	O
.	O
</s>
<s>
Some	O
of	O
the	O
first	O
digital	O
computers	O
implemented	O
with	O
instruction	B-General_Concept
sets	I-General_Concept
were	O
by	O
modern	O
definition	O
minimal	B-General_Concept
instruction	I-General_Concept
set	I-General_Concept
computers	I-General_Concept
.	O
</s>
<s>
Among	O
these	O
various	O
computers	O
,	O
only	O
ILLIAC	B-Device
and	O
ORDVAC	B-Device
had	O
compatible	O
instruction	B-General_Concept
sets	I-General_Concept
.	O
</s>
<s>
Manchester	B-Device
Baby	I-Device
(	O
University	O
of	O
Manchester	O
,	O
England	O
)	O
made	O
its	O
first	O
successful	O
run	O
of	O
a	O
stored	O
program	O
on	O
June	O
21	O
,	O
1948	O
.	O
</s>
<s>
The	O
IBM	B-Device
SSEC	I-Device
had	O
the	O
ability	O
to	O
treat	O
instructions	O
as	O
data	O
,	O
and	O
was	O
publicly	O
demonstrated	O
on	O
January	O
27	O
,	O
1948	O
.	O
</s>
<s>
The	O
Manchester	B-Device
Baby	I-Device
,	O
by	O
the	O
Victoria	O
University	O
of	O
Manchester	O
,	O
was	O
the	O
first	O
fully	O
electronic	O
computer	O
to	O
run	O
a	O
stored	O
program	O
.	O
</s>
<s>
The	O
Electronic	B-Device
Numerical	I-Device
Integrator	I-Device
and	I-Device
Computer	I-Device
(	O
ENIAC	B-Device
)	O
was	O
modified	O
to	O
run	O
as	O
a	O
primitive	O
read-only	O
stored-program	O
computer	O
(	O
using	O
the	O
Function	O
Tables	O
for	O
program	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
and	O
was	O
demonstrated	O
as	O
such	O
on	O
September	O
16	O
,	O
1948	O
,	O
running	O
a	O
program	O
by	O
Adele	O
Goldstine	O
for	O
von	O
Neumann	O
.	O
</s>
<s>
The	O
Binary	B-Device
Automatic	I-Device
Computer	I-Device
(	O
BINAC	B-Device
)	O
ran	O
some	O
test	O
programs	O
in	O
February	O
,	O
March	O
,	O
and	O
April	O
1949	O
,	O
although	O
was	O
not	O
completed	O
until	O
September	O
1949	O
.	O
</s>
<s>
The	O
Manchester	B-Device
Mark	I-Device
1	I-Device
developed	O
from	O
the	O
Baby	O
project	O
.	O
</s>
<s>
The	O
Electronic	B-Device
Delay	I-Device
Storage	I-Device
Automatic	I-Device
Calculator	I-Device
(	O
EDSAC	B-Device
)	O
ran	O
its	O
first	O
program	O
on	O
May	O
6	O
,	O
1949	O
.	O
</s>
<s>
The	O
Electronic	B-Device
Discrete	I-Device
Variable	I-Device
Automatic	I-Device
Computer	I-Device
(	O
EDVAC	B-Device
)	O
was	O
delivered	O
in	O
August	O
1949	O
,	O
but	O
it	O
had	O
problems	O
that	O
kept	O
it	O
from	O
being	O
put	O
into	O
regular	O
operation	O
until	O
1951	O
.	O
</s>
<s>
The	O
Commonwealth	O
Scientific	O
and	O
Industrial	O
Research	O
Automatic	O
Computer	O
(	O
CSIRAC	B-Device
,	O
formerly	O
CSIR	B-Device
Mk	I-Device
I	I-Device
)	O
ran	O
its	O
first	O
program	O
in	O
November	O
1949	O
.	O
</s>
<s>
The	O
Standards	B-Device
Eastern	I-Device
Automatic	I-Device
Computer	I-Device
(	O
SEAC	B-Device
)	O
was	O
demonstrated	O
in	O
April	O
1950	O
.	O
</s>
<s>
The	O
Pilot	B-Device
ACE	I-Device
ran	O
its	O
first	O
program	O
on	O
May	O
10	O
,	O
1950	O
and	O
was	O
demonstrated	O
in	O
December	O
1950	O
.	O
</s>
<s>
The	O
Standards	B-Device
Western	I-Device
Automatic	I-Device
Computer	I-Device
(	O
SWAC	B-Device
)	O
was	O
completed	O
in	O
July	O
1950	O
.	O
</s>
<s>
The	O
Whirlwind	B-Device
was	O
completed	O
in	O
December	O
1950	O
and	O
was	O
in	O
actual	O
use	O
in	O
April	O
1951	O
.	O
</s>
<s>
The	O
first	O
ERA	B-Device
Atlas	I-Device
(	O
later	O
the	O
commercial	O
ERA	O
1101/UNIVAC	O
1101	O
)	O
was	O
installed	O
in	O
December	O
1950	O
.	O
</s>
<s>
The	O
disadvantage	O
of	O
a	O
MISC	O
is	O
that	O
instructions	O
tend	O
to	O
have	O
more	O
sequential	O
dependencies	O
,	O
reducing	O
overall	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
MISC	O
architectures	O
have	O
much	O
in	O
common	O
with	O
some	O
features	O
of	O
some	O
programming	O
languages	O
such	O
as	O
Forth	B-Application
's	O
use	O
of	O
the	O
stack	B-Application
,	O
and	O
the	O
Java	B-Language
virtual	I-Language
machine	I-Language
.	O
</s>
<s>
Both	O
are	O
weak	O
in	O
providing	O
full	O
instruction-level	B-Operating_System
parallelism	I-Operating_System
.	O
</s>
<s>
Probably	O
the	O
most	O
commercially	O
successful	O
MISC	O
was	O
the	O
original	O
INMOS	B-General_Concept
transputer	I-General_Concept
architecture	O
that	O
had	O
no	O
floating-point	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
However	O
,	O
many	O
8-bit	O
microcontrollers	B-Architecture
,	O
for	O
embedded	O
computer	O
applications	O
,	O
qualify	O
as	O
MISC	O
.	O
</s>
