<s>
In	O
computer	B-General_Concept
architecture	I-General_Concept
and	O
engineering	O
,	O
a	O
sequencer	O
or	O
microsequencer	B-General_Concept
generates	O
the	O
addresses	O
used	O
to	O
step	O
through	O
the	O
microprogram	B-Device
of	O
a	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
It	O
is	O
used	O
as	O
a	O
part	O
of	O
the	O
control	B-General_Concept
unit	I-General_Concept
of	O
a	O
CPU	B-General_Concept
or	O
as	O
a	O
stand-alone	O
generator	O
for	O
address	O
ranges	O
.	O
</s>
<s>
Usually	O
the	O
addresses	O
are	O
generated	O
by	O
some	O
combination	O
of	O
a	O
counter	O
,	O
a	O
field	O
from	O
a	O
microinstruction	B-Device
,	O
and	O
some	O
subset	O
of	O
the	O
instruction	B-General_Concept
register	I-General_Concept
.	O
</s>
<s>
A	O
counter	O
is	O
used	O
for	O
the	O
typical	O
case	O
,	O
that	O
the	O
next	O
microinstruction	B-Device
is	O
the	O
one	O
to	O
execute	O
.	O
</s>
<s>
A	O
field	O
from	O
the	O
microinstruction	B-Device
is	O
used	O
for	O
jumps	O
,	O
or	O
other	O
logic	O
.	O
</s>
<s>
Since	O
CPUs	O
implement	O
an	O
instruction	O
set	O
,	O
it	O
's	O
very	O
useful	O
to	O
be	O
able	O
to	O
decode	O
the	O
instruction	O
's	O
bits	O
directly	O
into	O
the	O
sequencer	O
,	O
to	O
select	O
a	O
set	O
of	O
microinstructions	B-Device
to	O
perform	O
a	O
CPU	B-General_Concept
's	O
instructions	O
.	O
</s>
<s>
Most	O
modern	O
CISC	O
processors	O
use	O
a	O
combination	O
of	O
pipelined	O
logic	O
to	O
process	O
lower	O
complexity	O
opcodes	O
which	O
can	O
be	O
completed	O
in	O
one	O
clock	O
cycle	O
,	O
and	O
microcode	B-Device
to	O
implement	O
ones	O
that	O
take	O
multiple	O
clock	O
cycles	O
to	O
complete	O
.	O
</s>
<s>
One	O
of	O
the	O
first	O
integrated	O
microcoded	B-Device
processors	O
was	O
the	O
IBM	B-Device
PALM	I-Device
Processor	I-Device
,	O
which	O
emulated	O
all	O
of	O
the	O
processor	O
's	O
instruction	O
in	O
microcode	B-Device
and	O
was	O
used	O
on	O
the	O
IBM	B-Device
5100	I-Device
,	O
one	O
of	O
the	O
first	O
personal	O
computers	O
.	O
</s>
<s>
Recent	O
examples	O
of	O
similar	O
open-sourced	O
microsequencer-based	O
processors	O
are	O
the	O
MicroCore	O
Labs	O
,	O
,	O
and	O
cores	O
which	O
emulate	O
the	O
Intel	O
8086/8088	O
,	O
8051	O
and	O
MOS	O
6502	O
instruction	O
sets	O
entirely	O
in	O
microcode	B-Device
.	O
</s>
<s>
A	O
branch	B-General_Concept
microinstruction	B-Device
specifies	O
the	O
address	O
of	O
the	O
next	O
instruction	O
,	O
either	O
conditionally	O
or	O
unconditionally	O
.	O
</s>
<s>
The	O
logical	O
index	O
(	O
IX	O
)	O
option	O
causes	O
the	O
16-bit	O
Link	O
register	O
to	O
be	O
logical	O
ORed	O
into	O
the	O
branch	B-General_Concept
address	O
,	O
thus	O
providing	O
a	O
simple	O
indexed	O
branch	B-General_Concept
capability	O
.	O
</s>
<s>
All	O
the	O
arithmetic/logical	O
instructions	O
allow	O
the	O
jump	O
(	O
J	O
)	O
modifier	O
,	O
which	O
redirects	O
execution	O
to	O
the	O
microinstruction	B-Device
addressed	O
by	O
the	O
Link	O
register	O
.	O
</s>
<s>
If	O
it	O
is	O
then	O
not	O
zero	O
,	O
a	O
branch	B-General_Concept
is	O
taken	O
to	O
the	O
contents	O
of	O
the	O
Link	O
register	O
.	O
</s>
<s>
One	O
more	O
sequencing	O
option	O
allowed	O
on	O
a	O
branch	B-General_Concept
instruction	I-General_Concept
is	O
the	O
execute	O
(	O
XQ	O
)	O
option	O
.	O
</s>
<s>
When	O
specified	O
,	O
the	O
single	O
instruction	O
at	O
the	O
branch	B-General_Concept
address	O
is	O
executed	O
,	O
but	O
then	O
execution	O
continues	O
after	O
the	O
original	O
branch	B-General_Concept
instruction	I-General_Concept
.	O
</s>
<s>
The	O
IBM	B-Application
System/360	I-Application
was	O
a	O
series	O
of	O
compatible	O
computers	O
introduced	O
in	O
1964	O
,	O
many	O
of	O
which	O
were	O
microprogrammed	O
.	O
</s>
<s>
The	O
System/360	B-Device
Model	I-Device
40	I-Device
is	O
a	O
good	O
example	O
of	O
a	O
microprogrammed	O
machine	O
with	O
complex	O
microsequencing	O
.	O
</s>
<s>
a	O
horizontal	O
microprogramming	B-Device
style	O
.	O
</s>
<s>
When	O
the	O
CB	O
field	O
contains	O
15	O
,	O
a	O
functional	O
branch	B-General_Concept
occurs	O
.	O
</s>
<s>
The	O
model	O
40	O
can	O
run	O
in	O
CPU	B-General_Concept
mode	O
or	O
channel	O
mode	O
.	O
</s>
<s>
The	O
description	O
addresses	O
only	O
CPU	B-General_Concept
mode	O
.	O
</s>
<s>
If	O
the	O
microinstruction	B-Device
is	O
not	O
in	O
functional	O
branch	B-General_Concept
format	O
and	O
the	O
CD	O
field	O
is	O
1	O
or	O
3	O
,	O
bit	O
1	O
of	O
the	O
next	O
address	O
is	O
always	O
0	O
.	O
</s>
