<s>
A	O
microprocessor	B-Architecture
is	O
a	O
computer	O
processor	O
where	O
the	O
data	O
processing	O
logic	O
and	O
control	O
is	O
included	O
on	O
a	O
single	O
integrated	O
circuit	O
(	O
IC	O
)	O
,	O
or	O
a	O
small	O
number	O
of	O
ICs	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
contains	O
the	O
arithmetic	O
,	O
logic	O
,	O
and	O
control	O
circuitry	O
required	O
to	O
perform	O
the	O
functions	O
of	O
a	O
computer	O
's	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	B-General_Concept
)	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
is	O
a	O
multipurpose	O
,	O
clock-driven	O
,	O
register-based	O
,	O
digital	O
integrated	O
circuit	O
that	O
accepts	O
binary	O
data	O
as	O
input	O
,	O
processes	O
it	O
according	O
to	O
instructions	O
stored	O
in	O
its	O
memory	B-General_Concept
,	O
and	O
provides	O
results	O
(	O
also	O
in	O
binary	O
form	O
)	O
as	O
output	O
.	O
</s>
<s>
Microprocessors	B-Architecture
contain	O
both	O
combinational	O
logic	O
and	O
sequential	O
digital	O
logic	O
,	O
and	O
operate	O
on	O
numbers	O
and	O
symbols	O
represented	O
in	O
the	O
binary	O
number	O
system	O
.	O
</s>
<s>
The	O
integration	O
of	O
a	O
whole	O
CPU	B-General_Concept
onto	O
a	O
single	O
or	O
a	O
few	O
integrated	O
circuits	O
using	O
Very-Large-Scale	O
Integration	O
(	O
VLSI	O
)	O
greatly	O
reduced	O
the	O
cost	O
of	O
processing	O
power	B-Architecture
.	O
</s>
<s>
Integrated	O
circuit	O
processors	O
are	O
produced	O
in	O
large	O
numbers	O
by	O
highly	O
automated	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
(	O
MOS	B-Architecture
)	O
fabrication	B-Architecture
processes	I-Architecture
,	O
resulting	O
in	O
a	O
relatively	O
low	O
unit	O
price	O
.	O
</s>
<s>
As	O
microprocessor	B-General_Concept
designs	I-General_Concept
improve	O
,	O
the	O
cost	O
of	O
manufacturing	O
a	O
chip	O
(	O
with	O
smaller	O
components	O
built	O
on	O
a	O
semiconductor	O
chip	O
the	O
same	O
size	O
)	O
generally	O
stays	O
the	O
same	O
according	O
to	O
Rock	O
's	O
law	O
.	O
</s>
<s>
Before	O
microprocessors	B-Architecture
,	O
small	O
computers	O
had	O
been	O
built	O
using	O
racks	O
of	O
circuit	O
boards	O
with	O
many	O
medium	O
-	O
and	O
small-scale	O
integrated	O
circuits	O
,	O
typically	O
of	O
TTL	B-General_Concept
type	O
.	O
</s>
<s>
Microprocessors	B-Architecture
combined	O
this	O
into	O
one	O
or	O
a	O
few	O
large-scale	O
ICs	O
.	O
</s>
<s>
While	O
there	O
is	O
disagreement	O
over	O
who	O
deserves	O
credit	O
for	O
the	O
invention	O
of	O
the	O
microprocessor	B-Architecture
,	O
the	O
first	O
commercially	O
available	O
microprocessor	B-Architecture
was	O
the	O
Intel	B-General_Concept
4004	I-General_Concept
,	O
designed	O
by	O
Federico	O
Faggin	O
and	O
introduced	O
in	O
1971	O
.	O
</s>
<s>
Continued	O
increases	O
in	O
microprocessor	B-Architecture
capacity	O
have	O
since	O
rendered	O
other	O
forms	O
of	O
computers	O
almost	O
completely	O
obsolete	O
(	O
see	O
history	B-Architecture
of	I-Architecture
computing	I-Architecture
hardware	I-Architecture
)	O
,	O
with	O
one	O
or	O
more	O
microprocessors	B-Architecture
used	O
in	O
everything	O
from	O
the	O
smallest	O
embedded	B-Architecture
systems	I-Architecture
and	O
handheld	B-Application
devices	I-Application
to	O
the	O
largest	O
mainframes	B-Architecture
and	O
supercomputers	B-Architecture
.	O
</s>
<s>
Microprocessors	B-Architecture
are	O
related	O
but	O
distinct	O
from	O
a	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
,	O
microcontrollers	B-Architecture
,	O
and	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
.	O
</s>
<s>
The	O
complexity	O
of	O
an	O
integrated	O
circuit	O
is	O
bounded	O
by	O
physical	O
limitations	O
on	O
the	O
number	O
of	O
transistors	B-Application
that	O
can	O
be	O
put	O
onto	O
one	O
chip	O
,	O
the	O
number	O
of	O
package	O
terminations	O
that	O
can	O
connect	O
the	O
processor	O
to	O
other	O
parts	O
of	O
the	O
system	O
,	O
the	O
number	O
of	O
interconnections	O
it	O
is	O
possible	O
to	O
make	O
on	O
the	O
chip	O
,	O
and	O
the	O
heat	O
that	O
the	O
chip	O
can	O
dissipate	O
.	O
</s>
<s>
A	O
minimal	O
hypothetical	O
microprocessor	B-Architecture
might	O
include	O
only	O
an	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	O
)	O
,	O
and	O
a	O
control	B-General_Concept
logic	I-General_Concept
section	O
.	O
</s>
<s>
Each	O
operation	O
of	O
the	O
ALU	O
sets	O
one	O
or	O
more	O
flags	O
in	O
a	O
status	B-General_Concept
register	I-General_Concept
,	O
which	O
indicate	O
the	O
results	O
of	O
the	O
last	O
operation	O
(	O
zero	O
value	O
,	O
negative	O
number	O
,	O
overflow	B-Error_Name
,	O
or	O
others	O
)	O
.	O
</s>
<s>
The	O
control	B-General_Concept
logic	I-General_Concept
retrieves	O
instruction	B-Language
codes	I-Language
from	O
memory	B-General_Concept
and	O
initiates	O
the	O
sequence	O
of	O
operations	O
required	O
for	O
the	O
ALU	O
to	O
carry	O
out	O
the	O
instruction	B-General_Concept
.	O
</s>
<s>
A	O
single	O
operation	B-Language
code	I-Language
might	O
affect	O
many	O
individual	O
data	O
paths	O
,	O
registers	O
,	O
and	O
other	O
elements	O
of	O
the	O
processor	O
.	O
</s>
<s>
The	O
size	O
of	O
data	O
objects	O
became	O
larger	O
;	O
allowing	O
more	O
transistors	B-Application
on	O
a	O
chip	O
allowed	O
word	O
sizes	O
to	O
increase	O
from	O
4	O
-	O
and	O
8-bit	O
words	O
up	O
to	O
today	O
's	O
64-bit	B-Device
words	O
.	O
</s>
<s>
Floating-point	B-Algorithm
arithmetic	I-Algorithm
,	O
for	O
example	O
,	O
was	O
often	O
not	O
available	O
on	O
8-bit	O
microprocessors	B-Architecture
,	O
but	O
had	O
to	O
be	O
carried	O
out	O
in	O
software	O
.	O
</s>
<s>
Integration	O
of	O
the	O
floating-point	B-General_Concept
unit	I-General_Concept
,	O
first	O
as	O
a	O
separate	O
integrated	O
circuit	O
and	O
then	O
as	O
part	O
of	O
the	O
same	O
microprocessor	B-Architecture
chip	O
,	O
sped	O
up	O
floating-point	B-Algorithm
calculations	O
.	O
</s>
<s>
Occasionally	O
,	O
physical	O
limitations	O
of	O
integrated	O
circuits	O
made	O
such	O
practices	O
as	O
a	O
bit	B-General_Concept
slice	I-General_Concept
approach	O
necessary	O
.	O
</s>
<s>
Instead	O
of	O
processing	O
all	O
of	O
a	O
long	O
word	O
on	O
one	O
integrated	O
circuit	O
,	O
multiple	O
circuits	O
in	B-Operating_System
parallel	I-Operating_System
processed	O
subsets	O
of	O
each	O
word	O
.	O
</s>
<s>
While	O
this	O
required	O
extra	O
logic	O
to	O
handle	O
,	O
for	O
example	O
,	O
carry	O
and	O
overflow	B-Error_Name
within	O
each	O
slice	O
,	O
the	O
result	O
was	O
a	O
system	O
that	O
could	O
handle	O
,	O
for	O
example	O
,	O
32-bit	O
words	O
using	O
integrated	O
circuits	O
with	O
a	O
capacity	O
for	O
only	O
fourbits	O
each	O
.	O
</s>
<s>
The	O
ability	O
to	O
put	O
large	O
numbers	O
of	O
transistors	B-Application
on	O
one	O
chip	O
makes	O
it	O
feasible	O
to	O
integrate	O
memory	B-General_Concept
on	O
the	O
same	O
die	O
as	O
the	O
processor	O
.	O
</s>
<s>
This	O
CPU	B-General_Concept
cache	I-General_Concept
has	O
the	O
advantage	O
of	O
faster	O
access	O
than	O
off-chip	O
memory	B-General_Concept
and	O
increases	O
the	O
processing	O
speed	O
of	O
the	O
system	O
for	O
many	O
applications	O
.	O
</s>
<s>
Processor	O
clock	O
frequency	O
has	O
increased	O
more	O
rapidly	O
than	O
external	O
memory	B-General_Concept
speed	O
,	O
so	O
cache	B-General_Concept
memory	I-General_Concept
is	O
necessary	O
if	O
the	O
processor	O
is	O
not	O
to	O
be	O
delayed	O
by	O
slower	O
external	O
memory	B-General_Concept
.	O
</s>
<s>
A	O
microprocessor	B-Architecture
is	O
a	O
general	O
-	O
purpose	O
entity	O
.	O
</s>
<s>
A	O
digital	B-Architecture
signal	I-Architecture
processor	I-Architecture
(	O
DSP	B-Architecture
)	O
is	O
specialized	O
for	O
signal	O
processing	O
.	O
</s>
<s>
Graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
(	O
GPUs	B-Architecture
)	O
are	O
processors	O
designed	O
primarily	O
for	O
realtime	B-General_Concept
rendering	I-General_Concept
of	O
images	O
.	O
</s>
<s>
Other	O
specialized	O
units	O
exist	O
for	O
video	O
processing	O
and	O
machine	B-General_Concept
vision	I-General_Concept
.	O
</s>
<s>
(	O
See	O
:	O
Hardware	B-General_Concept
acceleration	I-General_Concept
.	O
)	O
</s>
<s>
Microcontrollers	B-Architecture
in	O
embedded	B-Architecture
systems	I-Architecture
and	O
peripheral	O
devices	O
.	O
</s>
<s>
Systems	B-Architecture
on	I-Architecture
chip	I-Architecture
(	O
SoCs	O
)	O
often	O
integrate	O
one	O
or	O
more	O
microprocessor	B-Architecture
and	O
microcontroller	B-Architecture
cores	O
with	O
other	O
components	O
such	O
as	O
radio	O
modems	O
,	O
and	O
are	O
used	O
in	O
smartphones	O
and	O
tablet	O
computers	O
.	O
</s>
<s>
Microprocessors	B-Architecture
can	O
be	O
selected	O
for	O
differing	O
applications	O
based	O
on	O
their	O
word	O
size	O
,	O
which	O
is	O
a	O
measure	O
of	O
their	O
complexity	O
.	O
</s>
<s>
Longer	O
word	O
sizes	O
allow	O
each	O
clock	O
cycle	O
of	O
a	O
processor	O
to	O
carry	O
out	O
more	O
computation	O
,	O
but	O
correspond	O
to	O
physically	O
larger	O
integrated	O
circuit	O
dies	O
with	O
higher	O
standby	O
and	O
operating	O
power	B-Architecture
consumption	O
.	O
</s>
<s>
4-	O
,	O
8	O
-	O
or	O
12-bit	B-Device
processors	O
are	O
widely	O
integrated	O
into	O
microcontrollers	B-Architecture
operating	O
embedded	B-Architecture
systems	I-Architecture
.	O
</s>
<s>
Where	O
a	O
system	O
is	O
expected	O
to	O
handle	O
larger	O
volumes	O
of	O
data	O
or	O
require	O
a	O
more	O
flexible	O
user	B-Application
interface	I-Application
,	O
16-	O
,	O
32	O
-	O
or	O
64-bit	B-Device
processors	I-Device
are	O
used	O
.	O
</s>
<s>
An	O
8	O
-	O
or	O
16-bit	B-Device
processor	I-Device
may	O
be	O
selected	O
over	O
a	O
32-bit	O
processor	O
for	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
or	O
microcontroller	B-Architecture
applications	O
that	O
require	O
extremely	O
low-power	O
electronics	O
,	O
or	O
are	O
part	O
of	O
a	O
mixed-signal	O
integrated	O
circuit	O
with	O
noise-sensitive	O
on-chip	O
analog	O
electronics	O
such	O
as	O
high-resolution	O
analog	O
to	O
digital	O
converters	O
,	O
or	O
both	O
.	O
</s>
<s>
Some	O
people	O
say	O
that	O
running	O
32-bit	O
arithmetic	O
on	O
an	O
8-bit	O
chip	O
could	O
end	O
up	O
using	O
more	O
power	B-Architecture
,	O
as	O
the	O
chip	O
must	O
execute	O
software	O
with	O
multiple	O
instructions	O
.	O
</s>
<s>
However	O
,	O
others	O
say	O
that	O
modern	O
8-bit	O
chips	O
are	O
always	O
more	O
power-efficient	O
than	O
32-bit	O
chips	O
when	O
running	O
equivalent	O
software	O
routines	O
.	O
</s>
<s>
Thousands	O
of	O
items	O
that	O
were	O
traditionally	O
not	O
computer-related	O
include	O
microprocessors	B-Architecture
.	O
</s>
<s>
These	O
include	O
household	O
appliances	O
,	O
vehicles	O
(	O
and	O
their	O
accessories	O
)	O
,	O
tools	O
and	O
test	O
instruments	O
,	O
toys	O
,	O
light	O
switches/dimmers	O
and	O
electrical	O
circuit	O
breakers	O
,	O
smoke	O
alarms	O
,	O
battery	O
packs	O
,	O
and	O
hi-fi	O
audio/visual	O
components	O
(	O
from	O
DVD	B-Device
players	I-Device
to	O
phonograph	O
turntables	O
)	O
.	O
</s>
<s>
Such	O
products	O
as	O
cellular	O
telephones	O
,	O
DVD	O
video	O
system	O
and	O
HDTV	B-Device
broadcast	O
systems	O
fundamentally	O
require	O
consumer	O
devices	O
with	O
powerful	O
,	O
low-cost	O
,	O
microprocessors	B-Architecture
.	O
</s>
<s>
Increasingly	O
stringent	O
pollution	O
control	O
standards	O
effectively	O
require	O
automobile	O
manufacturers	O
to	O
use	O
microprocessor	B-Architecture
engine	O
management	O
systems	O
to	O
allow	O
optimal	O
control	O
of	O
emissions	O
over	O
the	O
widely	O
varying	O
operating	O
conditions	O
of	O
an	O
automobile	O
.	O
</s>
<s>
Non-programmable	O
controls	O
would	O
require	O
bulky	O
,	O
or	O
costly	O
implementation	O
to	O
achieve	O
the	O
results	O
possible	O
with	O
a	O
microprocessor	B-Architecture
.	O
</s>
<s>
A	O
microprocessor	B-Architecture
control	I-Architecture
program	O
(	O
embedded	B-Application
software	I-Application
)	O
can	O
be	O
tailored	O
to	O
fit	O
the	O
needs	O
of	O
a	O
product	O
line	O
,	O
allowing	O
upgrades	O
in	O
performance	O
with	O
minimal	O
redesign	O
of	O
the	O
product	O
.	O
</s>
<s>
Microprocessor	B-Architecture
control	I-Architecture
of	O
a	O
system	O
can	O
provide	O
control	O
strategies	O
that	O
would	O
be	O
impractical	O
to	O
implement	O
using	O
electromechanical	O
controls	O
or	O
purpose-built	O
electronic	O
controls	O
.	O
</s>
<s>
General-purpose	O
microprocessors	B-Architecture
in	O
personal	B-Device
computers	I-Device
are	O
used	O
for	O
computation	O
,	O
text	O
editing	O
,	O
multimedia	O
display	O
,	O
and	O
communication	O
over	O
the	O
Internet	O
.	O
</s>
<s>
Many	O
more	O
microprocessors	B-Architecture
are	O
part	O
of	O
embedded	B-Architecture
systems	I-Architecture
,	O
providing	O
digital	O
control	O
over	O
myriad	O
objects	O
from	O
appliances	O
to	O
automobiles	O
to	O
cellular	O
phones	O
and	O
industrial	O
process	O
control	O
.	O
</s>
<s>
Microprocessors	B-Architecture
perform	O
binary	O
operations	O
based	O
on	O
boolean	O
logic	O
,	O
named	O
after	O
George	O
Boole	O
.	O
</s>
<s>
Following	O
the	O
development	O
of	O
MOS	B-Architecture
integrated	O
circuit	O
chips	O
in	O
the	O
early	O
1960s	O
,	O
MOS	B-Architecture
chips	O
reached	O
higher	O
transistor	B-Application
density	O
and	O
lower	O
manufacturing	O
costs	O
than	O
bipolar	O
integrated	O
circuits	O
by	O
1964	O
.	O
</s>
<s>
MOS	B-Architecture
chips	O
further	O
increased	O
in	O
complexity	O
at	O
a	O
rate	O
predicted	O
by	O
Moore	O
's	O
law	O
,	O
leading	O
to	O
large-scale	O
integration	O
(	O
LSI	O
)	O
with	O
hundreds	O
of	O
transistors	B-Application
on	O
a	O
single	O
MOS	B-Architecture
chip	O
by	O
the	O
late	O
1960s	O
.	O
</s>
<s>
The	O
application	O
of	O
MOS	B-Architecture
LSI	O
chips	O
to	O
computing	O
was	O
the	O
basis	O
for	O
the	O
first	O
microprocessors	B-Architecture
,	O
as	O
engineers	O
began	O
recognizing	O
that	O
a	O
complete	O
computer	O
processor	O
could	O
be	O
contained	O
on	O
several	O
MOS	B-Architecture
LSI	O
chips	O
.	O
</s>
<s>
Designers	O
in	O
the	O
late	O
1960s	O
were	O
striving	O
to	O
integrate	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	B-General_Concept
)	O
functions	O
of	O
a	O
computer	O
onto	O
a	O
handful	O
of	O
MOS	B-Architecture
LSI	O
chips	O
,	O
called	O
microprocessor	B-Architecture
unit	I-Architecture
(	O
MPU	O
)	O
chipsets	O
.	O
</s>
<s>
While	O
there	O
is	O
disagreement	O
over	O
who	O
invented	O
the	O
microprocessor	B-Architecture
,	O
the	O
first	O
commercially	O
produced	O
microprocessor	B-Architecture
was	O
the	O
Intel	B-General_Concept
4004	I-General_Concept
,	O
released	O
as	O
a	O
single	O
MOS	B-Architecture
LSI	O
chip	O
in	O
1971	O
.	O
</s>
<s>
The	O
single-chip	O
microprocessor	B-Architecture
was	O
made	O
possible	O
with	O
the	O
development	O
of	O
MOS	B-Architecture
silicon-gate	O
technology	O
(	O
SGT	O
)	O
.	O
</s>
<s>
The	O
earliest	O
MOS	B-Architecture
transistors	I-Architecture
had	O
aluminium	O
metal	B-Algorithm
gates	I-Algorithm
,	O
which	O
Italian	O
physicist	O
Federico	O
Faggin	O
replaced	O
with	O
silicon	O
self-aligned	O
gates	O
to	O
develop	O
the	O
first	O
silicon-gate	O
MOS	B-Architecture
chip	O
at	O
Fairchild	O
Semiconductor	O
in	O
1968	O
.	O
</s>
<s>
Faggin	O
later	O
joined	O
Intel	O
and	O
used	O
his	O
silicon-gate	O
MOS	B-Architecture
technology	I-Architecture
to	O
develop	O
the	O
4004	B-General_Concept
,	O
along	O
with	O
Marcian	O
Hoff	O
,	O
Stanley	O
Mazor	O
and	O
Masatoshi	O
Shima	O
in	O
1971	O
.	O
</s>
<s>
The	O
4004	B-General_Concept
was	O
designed	O
for	O
Busicom	O
,	O
which	O
had	O
earlier	O
proposed	O
a	O
multi-chip	O
design	O
in	O
1969	O
,	O
before	O
Faggin	O
's	O
team	O
at	O
Intel	O
changed	O
it	O
into	O
a	O
new	O
single-chip	O
design	O
.	O
</s>
<s>
Intel	O
introduced	O
the	O
first	O
commercial	O
microprocessor	B-Architecture
,	O
the	O
4-bit	O
Intel	B-General_Concept
4004	I-General_Concept
,	O
in	O
1971	O
.	O
</s>
<s>
It	O
was	O
soon	O
followed	O
by	O
the	O
8-bit	O
microprocessor	B-Architecture
Intel	B-General_Concept
8008	I-General_Concept
in	O
1972	O
.	O
</s>
<s>
Other	O
embedded	B-Architecture
uses	O
of	O
4-bit	O
and	O
8-bit	O
microprocessors	B-Architecture
,	O
such	O
as	O
terminals	O
,	O
printers	O
,	O
various	O
kinds	O
of	O
automation	B-Application
etc.	O
,	O
followed	O
soon	O
after	O
.	O
</s>
<s>
Affordable	O
8-bit	O
microprocessors	B-Architecture
with	O
16-bit	B-Device
addressing	O
also	O
led	O
to	O
the	O
first	O
general-purpose	O
microcomputers	B-Architecture
from	O
the	O
mid-1970s	O
on	O
.	O
</s>
<s>
The	O
first	O
use	O
of	O
the	O
term	O
"	O
microprocessor	B-Architecture
"	O
is	O
attributed	O
to	O
Viatron	O
Computer	O
Systems	O
describing	O
the	O
custom	O
integrated	O
circuit	O
used	O
in	O
their	O
System	O
21	O
small	O
computer	O
system	O
announced	O
in	O
1968	O
.	O
</s>
<s>
Since	O
the	O
early	O
1970s	O
,	O
the	O
increase	O
in	O
capacity	O
of	O
microprocessors	B-Architecture
has	O
followed	O
Moore	O
's	O
law	O
;	O
this	O
originally	O
suggested	O
that	O
the	O
number	O
of	O
components	O
that	O
can	O
be	O
fitted	O
onto	O
a	O
chip	O
doubles	O
every	O
year	O
.	O
</s>
<s>
These	O
projects	O
delivered	O
a	O
microprocessor	B-Architecture
at	O
about	O
the	O
same	O
time	O
:	O
Garrett	O
AiResearch	O
's	O
Central	O
Air	O
Data	O
Computer	O
(	O
CADC	O
)	O
(	O
1970	O
)	O
,	O
Texas	O
Instruments	O
 '	O
TMS	O
1802NC	O
(	O
September	O
1971	O
)	O
and	O
Intel	O
's	O
4004	B-General_Concept
(	O
November	O
1971	O
,	O
based	O
on	O
an	O
earlier	O
1969	O
Busicom	O
design	O
)	O
.	O
</s>
<s>
Arguably	O
,	O
Four-Phase	O
Systems	O
AL1	O
microprocessor	B-Architecture
was	O
also	O
delivered	O
in	O
1969	O
.	O
</s>
<s>
The	O
Four-Phase	O
Systems	O
AL1	O
was	O
an	O
8-bit	O
bit	B-General_Concept
slice	I-General_Concept
chip	O
containing	O
eight	O
registers	O
and	O
an	O
ALU	O
.	O
</s>
<s>
At	O
the	O
time	O
,	O
it	O
formed	O
part	O
of	O
a	O
nine-chip	O
,	O
24-bit	O
CPU	B-General_Concept
with	O
three	O
AL1s	O
.	O
</s>
<s>
It	O
was	O
later	O
called	O
a	O
microprocessor	B-Architecture
when	O
,	O
in	O
response	O
to	O
1990s	O
litigation	O
by	O
Texas	O
Instruments	O
,	O
Boysel	O
constructed	O
a	O
demonstration	O
system	O
where	O
a	O
single	O
AL1	O
formed	O
part	O
of	O
a	O
courtroom	O
demonstration	O
computer	O
system	O
,	O
together	O
with	O
RAM	B-Architecture
,	O
ROM	B-Device
,	O
and	O
an	O
input-output	B-General_Concept
device	I-General_Concept
.	O
</s>
<s>
In	O
1968	O
,	O
Garrett	O
AiResearch	O
(	O
who	O
employed	O
designers	O
Ray	O
Holt	O
and	O
Steve	O
Geller	O
)	O
was	O
invited	O
to	O
produce	O
a	O
digital	O
computer	O
to	O
compete	O
with	O
electromechanical	O
systems	O
then	O
under	O
development	O
for	O
the	O
main	O
flight	O
control	O
computer	O
in	O
the	O
US	O
Navy	O
's	O
new	O
F-14	B-Device
Tomcat	I-Device
fighter	O
.	O
</s>
<s>
The	O
design	O
was	O
complete	O
by	O
1970	O
,	O
and	O
used	O
a	O
MOS-based	O
chipset	O
as	O
the	O
core	O
CPU	B-General_Concept
.	O
</s>
<s>
This	O
system	O
contained	O
"	O
a	O
20-bit	O
,	O
pipelined	B-General_Concept
,	O
parallel	B-Operating_System
multi-microprocessor	B-Operating_System
"	O
.	O
</s>
<s>
Released	O
in	O
1998	O
,	O
the	O
documentation	O
on	O
the	O
CADC	O
,	O
and	O
the	O
MP944	B-Device
chipset	O
,	O
are	O
well	O
known	O
.	O
</s>
<s>
Ray	O
Holt	O
graduated	O
from	O
California	O
Polytechnic	O
University	O
in	O
1968	O
,	O
and	O
began	O
his	O
computer	B-General_Concept
design	I-General_Concept
career	O
with	O
the	O
CADC	O
.	O
</s>
<s>
Holt	O
has	O
claimed	O
that	O
no	O
one	O
has	O
compared	O
this	O
microprocessor	B-Architecture
with	O
those	O
that	O
came	O
later	O
.	O
</s>
<s>
(	O
2007	O
)	O
,	O
This	O
convergence	O
of	O
DSP	B-Architecture
and	O
microcontroller	B-Architecture
architectures	O
is	O
known	O
as	O
a	O
digital	B-General_Concept
signal	I-General_Concept
controller	I-General_Concept
.	O
</s>
<s>
4	O
,	O
942	O
,	O
516	O
,	O
which	O
was	O
based	O
on	O
a	O
16-bit	B-Device
serial	O
computer	O
he	O
built	O
at	O
his	O
Northridge	O
,	O
California	O
home	O
in	O
1969	O
from	O
boards	O
of	O
bipolar	O
chips	O
after	O
quitting	O
his	O
job	O
at	O
Teledyne	O
in	O
1968	O
;	O
though	O
the	O
patent	O
had	O
been	O
submitted	O
in	O
December	O
1970	O
and	O
prior	O
to	O
Texas	O
Instruments	O
 '	O
filings	O
for	O
the	O
TMX	O
1795	O
and	O
TMS	O
0100	O
,	O
Hyatt	O
's	O
invention	O
was	O
never	O
manufactured	O
.	O
</s>
<s>
This	O
nonetheless	O
led	O
to	O
claims	O
that	O
Hyatt	O
was	O
the	O
inventor	O
of	O
the	O
microprocessor	B-Architecture
and	O
the	O
payment	O
of	O
substantial	O
royalties	O
through	O
a	O
Philips	O
N.V.	O
subsidiary	O
,	O
until	O
Texas	O
Instruments	O
prevailed	O
in	O
a	O
complex	O
legal	O
battle	O
in	O
1996	O
,	O
when	O
the	O
U.S.	O
Patent	O
Office	O
overturned	O
key	O
parts	O
of	O
the	O
patent	O
,	O
while	O
allowing	O
Hyatt	O
to	O
keep	O
it	O
.	O
</s>
<s>
Reid	O
was	O
quoted	O
as	O
saying	O
that	O
historians	O
may	O
ultimately	O
place	O
Hyatt	O
as	O
a	O
co-inventor	O
of	O
the	O
microprocessor	B-Architecture
,	O
in	O
the	O
way	O
that	O
Intel	O
's	O
Noyce	O
and	O
TI	O
's	O
Kilby	O
share	O
credit	O
for	O
the	O
invention	O
of	O
the	O
chip	O
in	O
1958	O
:	O
"	O
Kilby	O
got	O
the	O
idea	O
first	O
,	O
but	O
Noyce	O
made	O
it	O
practical	O
.	O
</s>
<s>
Along	O
with	O
Intel	O
(	O
who	O
developed	O
the	O
8008	B-General_Concept
)	O
,	O
Texas	O
Instruments	O
developed	O
in	O
19701971	O
a	O
one-chip	O
CPU	B-General_Concept
replacement	O
for	O
the	O
Datapoint	B-Device
2200	I-Device
terminal	B-General_Concept
,	O
the	O
TMX	O
1795	O
(	O
later	O
TMC	O
1795	O
.	O
)	O
</s>
<s>
Like	O
the	O
8008	B-General_Concept
,	O
it	O
was	O
rejected	O
by	O
customer	O
Datapoint	O
.	O
</s>
<s>
Since	O
it	O
was	O
built	O
to	O
the	O
same	O
specification	O
,	O
its	O
instruction	B-General_Concept
set	I-General_Concept
was	O
very	O
similar	O
to	O
the	O
Intel	B-General_Concept
8008	I-General_Concept
.	O
</s>
<s>
The	O
TMS1802NC	O
,	O
despite	O
its	O
designation	O
,	O
was	O
not	O
part	O
of	O
the	O
TMS	B-Device
1000	I-Device
series	O
;	O
it	O
was	O
later	O
redesignated	O
as	O
part	O
of	O
the	O
TMS	O
0100	O
series	O
,	O
which	O
was	O
used	O
in	O
the	O
TI	O
Datamath	O
calculator	O
.	O
</s>
<s>
Although	O
marketed	O
as	O
a	O
calculator-on-a-chip	O
,	O
the	O
TMS1802NC	O
was	O
fully	O
programmable	O
,	O
including	O
on	O
the	O
chip	O
a	O
CPU	B-General_Concept
with	O
an	O
11-bit	O
instruction	B-Language
word	I-Language
,	O
3520	O
bits	O
(	O
320	O
instructions	O
)	O
of	O
ROM	B-Device
and	O
182	O
bits	O
of	O
RAM	B-Architecture
.	O
</s>
<s>
This	O
chip	O
could	O
also	O
arguably	O
lay	O
claim	O
to	O
be	O
one	O
of	O
the	O
first	O
microprocessors	B-Architecture
or	O
microcontrollers	B-Architecture
having	O
ROM	B-Device
,	O
RAM	B-Architecture
and	O
a	O
RISC	B-Architecture
instruction	I-Architecture
set	I-Architecture
on-chip	O
.	O
</s>
<s>
The	O
layout	O
for	O
the	O
four	O
layers	O
of	O
the	O
PMOS	B-Algorithm
process	O
was	O
hand	O
drawn	O
at	O
x500	O
scale	O
on	O
mylar	O
film	O
,	O
a	O
significant	O
task	O
at	O
the	O
time	O
given	O
the	O
complexity	O
of	O
the	O
chip	O
.	O
</s>
<s>
The	O
key	O
team	O
members	O
had	O
originally	O
been	O
tasked	O
by	O
Elliott	O
Automation	B-Application
to	O
create	O
an	O
8-bit	O
computer	O
in	O
MOS	B-Architecture
and	O
had	O
helped	O
establish	O
a	O
MOS	B-Architecture
Research	O
Laboratory	O
in	O
Glenrothes	O
,	O
Scotland	O
in	O
1967	O
.	O
</s>
<s>
GI	O
continued	O
to	O
innovate	O
in	O
microprocessors	B-Architecture
and	O
microcontrollers	B-Architecture
with	O
products	O
including	O
the	O
CP1600	O
,	O
IOB1680	O
and	O
PIC1650	O
.	O
</s>
<s>
In	O
1987	O
,	O
the	O
GI	O
Microelectronics	O
business	O
was	O
spun	O
out	O
into	O
the	O
Microchip	B-Architecture
PIC	I-Architecture
microcontroller	B-Architecture
business	O
.	O
</s>
<s>
The	O
Intel	B-General_Concept
4004	I-General_Concept
is	O
often	O
(	O
falsely	O
)	O
regarded	O
as	O
the	O
first	O
true	O
microprocessor	B-Architecture
built	O
on	O
a	O
single	O
chip	O
,	O
priced	O
at	O
.	O
</s>
<s>
The	O
claim	O
of	O
being	O
the	O
first	O
is	O
definitely	O
false	O
,	O
as	O
the	O
earlier	O
TMS1802NC	O
was	O
also	O
a	O
true	O
microprocessor	B-Architecture
built	O
on	O
a	O
single	O
chip	O
.	O
</s>
<s>
The	O
first	O
known	O
advertisement	O
for	O
the	O
4004	B-General_Concept
is	O
dated	O
November	O
15	O
,	O
1971	O
and	O
appeared	O
in	O
Electronic	O
News	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
was	O
designed	O
by	O
a	O
team	O
consisting	O
of	O
Italian	O
engineer	O
Federico	O
Faggin	O
,	O
American	O
engineers	O
Marcian	O
Hoff	O
and	O
Stanley	O
Mazor	O
,	O
and	O
Japanese	O
engineer	O
Masatoshi	O
Shima	O
.	O
</s>
<s>
The	O
project	O
that	O
produced	O
the	O
4004	B-General_Concept
originated	O
in	O
1969	O
,	O
when	O
Busicom	O
,	O
a	O
Japanese	O
calculator	O
manufacturer	O
,	O
asked	O
Intel	O
to	O
build	O
a	O
chipset	O
for	O
high-performance	O
desktop	B-Device
calculators	O
.	O
</s>
<s>
Three	O
of	O
the	O
chips	O
were	O
to	O
make	O
a	O
special-purpose	O
CPU	B-General_Concept
with	O
its	O
program	O
stored	O
in	O
ROM	B-Device
and	O
its	O
data	O
stored	O
in	O
shift	O
register	B-General_Concept
read-write	O
memory	B-General_Concept
.	O
</s>
<s>
Ted	O
Hoff	O
,	O
the	O
Intel	O
engineer	O
assigned	O
to	O
evaluate	O
the	O
project	O
,	O
believed	O
the	O
Busicom	O
design	O
could	O
be	O
simplified	O
by	O
using	O
dynamic	O
RAM	B-Architecture
storage	O
for	O
data	O
,	O
rather	O
than	O
shift	O
register	B-General_Concept
memory	B-General_Concept
,	O
and	O
a	O
more	O
traditional	O
general-purpose	O
CPU	B-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
Hoff	O
came	O
up	O
with	O
a	O
four-chip	O
architectural	O
proposal	O
:	O
a	O
ROM	B-Device
chip	I-Device
for	O
storing	O
the	O
programs	O
,	O
a	O
dynamic	O
RAM	B-Architecture
chip	I-Architecture
for	O
storing	O
data	O
,	O
a	O
simple	O
I/O	B-General_Concept
device	I-General_Concept
,	O
and	O
a	O
4-bit	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	B-General_Concept
)	O
.	O
</s>
<s>
Although	O
not	O
a	O
chip	O
designer	O
,	O
he	O
felt	O
the	O
CPU	B-General_Concept
could	O
be	O
integrated	O
into	O
a	O
single	O
chip	O
,	O
but	O
as	O
he	O
lacked	O
the	O
technical	O
know-how	O
the	O
idea	O
remained	O
just	O
a	O
wish	O
for	O
the	O
time	O
being	O
.	O
</s>
<s>
While	O
the	O
architecture	O
and	O
specifications	O
of	O
the	O
MCS-4	B-General_Concept
came	O
from	O
the	O
interaction	O
of	O
Hoff	O
with	O
Stanley	O
Mazor	O
,	O
a	O
software	O
engineer	O
reporting	O
to	O
him	O
,	O
and	O
with	O
Busicom	O
engineer	O
Masatoshi	O
Shima	O
,	O
during	O
1969	O
,	O
Mazor	O
and	O
Hoff	O
moved	O
on	O
to	O
other	O
projects	O
.	O
</s>
<s>
In	O
April	O
1970	O
,	O
Intel	O
hired	O
Italian	O
engineer	O
Federico	O
Faggin	O
as	O
project	O
leader	O
,	O
a	O
move	O
that	O
ultimately	O
made	O
the	O
single-chip	O
CPU	B-General_Concept
final	O
design	O
a	O
reality	O
(	O
Shima	O
meanwhile	O
designed	O
the	O
Busicom	O
calculator	O
firmware	O
and	O
assisted	O
Faggin	O
during	O
the	O
first	O
six	O
months	O
of	O
the	O
implementation	O
)	O
.	O
</s>
<s>
Faggin	O
,	O
who	O
originally	O
developed	O
the	O
silicon	O
gate	O
technology	O
(	O
SGT	O
)	O
in	O
1968	O
at	O
Fairchild	O
Semiconductor	O
and	O
designed	O
the	O
world	O
's	O
first	O
commercial	O
integrated	O
circuit	O
using	O
SGT	O
,	O
the	O
Fairchild	O
3708	O
,	O
had	O
the	O
correct	O
background	O
to	O
lead	O
the	O
project	O
into	O
what	O
would	O
become	O
the	O
first	O
commercial	O
general	O
purpose	O
microprocessor	B-Architecture
.	O
</s>
<s>
Since	O
SGT	O
was	O
his	O
very	O
own	O
invention	O
,	O
Faggin	O
also	O
used	O
it	O
to	O
create	O
his	O
new	O
methodology	O
for	O
random	B-General_Concept
logic	I-General_Concept
design	O
that	O
made	O
it	O
possible	O
to	O
implement	O
a	O
single-chip	O
CPU	B-General_Concept
with	O
the	O
proper	O
speed	O
,	O
power	B-Architecture
dissipation	O
and	O
cost	O
.	O
</s>
<s>
The	O
manager	O
of	O
Intel	O
's	O
MOS	B-Architecture
Design	O
Department	O
was	O
Leslie	O
L	O
.	O
Vadász	O
at	O
the	O
time	O
of	O
the	O
MCS-4	B-General_Concept
development	O
but	O
Vadász	O
's	O
attention	O
was	O
completely	O
focused	O
on	O
the	O
mainstream	O
business	O
of	O
semiconductor	O
memories	O
so	O
he	O
left	O
the	O
leadership	O
and	O
the	O
management	O
of	O
the	O
MCS-4	B-General_Concept
project	O
to	O
Faggin	O
,	O
who	O
was	O
ultimately	O
responsible	O
for	O
leading	O
the	O
4004	B-General_Concept
project	O
to	O
its	O
realization	O
.	O
</s>
<s>
Production	O
units	O
of	O
the	O
4004	B-General_Concept
were	O
first	O
delivered	O
to	O
Busicom	O
in	O
March	O
1971	O
and	O
shipped	O
to	O
other	O
customers	O
in	O
late	O
1971	O
.	O
</s>
<s>
The	O
Intel	B-General_Concept
4004	I-General_Concept
was	O
followed	O
in	O
1972	O
by	O
the	O
Intel	B-General_Concept
8008	I-General_Concept
,	O
the	O
world	O
's	O
first	O
8-bit	O
microprocessor	B-Architecture
.	O
</s>
<s>
The	O
8008	B-General_Concept
was	O
not	O
,	O
however	O
,	O
an	O
extension	O
of	O
the	O
4004	B-General_Concept
design	O
,	O
but	O
instead	O
the	O
culmination	O
of	O
a	O
separate	O
design	O
project	O
at	O
Intel	O
,	O
arising	O
from	O
a	O
contract	O
with	O
Computer	B-General_Concept
Terminals	I-General_Concept
Corporation	O
,	O
of	O
San	O
Antonio	O
TX	O
,	O
for	O
a	O
chip	O
for	O
a	O
terminal	B-General_Concept
they	O
were	O
designing	O
,	O
the	O
Datapoint	B-Device
2200	I-Device
—	O
fundamental	O
aspects	O
of	O
the	O
design	O
came	O
not	O
from	O
Intel	O
but	O
from	O
CTC	O
.	O
</s>
<s>
In	O
1968	O
,	O
CTC	O
's	O
Vic	O
Poor	O
and	O
Harry	O
Pyle	O
developed	O
the	O
original	O
design	O
for	O
the	O
instruction	B-General_Concept
set	I-General_Concept
and	O
operation	O
of	O
the	O
processor	O
.	O
</s>
<s>
In	O
1969	O
,	O
CTC	O
contracted	O
two	O
companies	O
,	O
Intel	O
and	O
Texas	O
Instruments	O
,	O
to	O
make	O
a	O
single-chip	O
implementation	O
,	O
known	O
as	O
the	O
CTC	O
1201	B-General_Concept
.	O
</s>
<s>
In	O
1970	O
,	O
with	O
Intel	O
yet	O
to	O
deliver	O
the	O
part	O
,	O
CTC	O
opted	O
to	O
use	O
their	O
own	O
implementation	O
in	O
the	O
Datapoint	B-Device
2200	I-Device
,	O
using	O
traditional	O
TTL	B-General_Concept
logic	I-General_Concept
instead	O
(	O
thus	O
the	O
first	O
machine	O
to	O
run	O
"	O
8008	B-General_Concept
code	O
"	O
was	O
not	O
in	O
fact	O
a	O
microprocessor	B-Architecture
at	O
all	O
and	O
was	O
delivered	O
a	O
year	O
earlier	O
)	O
.	O
</s>
<s>
Intel	O
's	O
version	O
of	O
the	O
1201	B-General_Concept
microprocessor	B-Architecture
arrived	O
in	O
late	O
1971	O
,	O
but	O
was	O
too	O
late	O
,	O
slow	O
,	O
and	O
required	O
a	O
number	O
of	O
additional	O
support	O
chips	O
.	O
</s>
<s>
Intel	O
marketed	O
it	O
as	O
the	O
8008	B-General_Concept
in	O
April	O
,	O
1972	O
,	O
as	O
the	O
world	O
's	O
first	O
8-bit	O
microprocessor	B-Architecture
.	O
</s>
<s>
It	O
was	O
the	O
basis	O
for	O
the	O
famous	O
"	O
Mark-8	B-Device
"	O
computer	O
kit	O
advertised	O
in	O
the	O
magazine	O
Radio-Electronics	O
in	O
1974	O
.	O
</s>
<s>
This	O
processor	O
had	O
an	O
8-bit	O
data	B-General_Concept
bus	I-General_Concept
and	O
a	O
14-bit	O
address	B-General_Concept
bus	O
.	O
</s>
<s>
The	O
8008	B-General_Concept
was	O
the	O
precursor	O
to	O
the	O
successful	O
Intel	B-General_Concept
8080	I-General_Concept
(	O
1974	O
)	O
,	O
which	O
offered	O
improved	O
performance	O
over	O
the	O
8008	B-General_Concept
and	O
required	O
fewer	O
support	O
chips	O
.	O
</s>
<s>
Federico	O
Faggin	O
conceived	O
and	O
designed	O
it	O
using	O
high	O
voltage	O
N	O
channel	O
MOS	B-Architecture
.	O
</s>
<s>
The	O
Zilog	B-General_Concept
Z80	I-General_Concept
(	O
1976	O
)	O
was	O
also	O
a	O
Faggin	O
design	O
,	O
using	O
low	O
voltage	O
N	O
channel	O
with	O
depletion	O
load	O
and	O
derivative	O
Intel	O
8-bit	O
processors	O
:	O
all	O
designed	O
with	O
the	O
methodology	O
Faggin	O
created	O
for	O
the	O
4004	B-General_Concept
.	O
</s>
<s>
Motorola	O
released	O
the	O
competing	O
6800	B-Device
in	O
August	O
1974	O
,	O
and	O
the	O
similar	O
MOS	B-General_Concept
Technology	I-General_Concept
6502	I-General_Concept
was	O
released	O
in	O
1975	O
(	O
both	O
designed	O
largely	O
by	O
the	O
same	O
people	O
)	O
.	O
</s>
<s>
The	O
6502	B-General_Concept
family	O
rivaled	O
the	O
Z80	B-General_Concept
in	O
popularity	O
during	O
the	O
1980s	O
.	O
</s>
<s>
A	O
low	O
overall	O
cost	O
,	O
little	O
packaging	O
,	O
simple	O
computer	B-General_Concept
bus	I-General_Concept
requirements	O
,	O
and	O
sometimes	O
the	O
integration	O
of	O
extra	O
circuitry	O
(	O
e.g.	O
</s>
<s>
the	O
Z80	B-General_Concept
's	O
built-in	O
memory	B-General_Concept
refresh	I-General_Concept
circuitry	O
)	O
allowed	O
the	O
home	O
computer	O
"	O
revolution	O
"	O
to	O
accelerate	O
sharply	O
in	O
the	O
early	O
1980s	O
.	O
</s>
<s>
A	O
variation	O
of	O
the	O
6502	B-General_Concept
,	O
the	O
MOS	B-General_Concept
Technology	I-General_Concept
6510	I-General_Concept
was	O
used	O
in	O
the	O
Commodore	O
64	O
and	O
yet	O
another	O
variant	O
,	O
the	O
8502	O
,	O
powered	O
the	O
Commodore	B-Device
128	I-Device
.	O
</s>
<s>
The	O
Western	O
Design	O
Center	O
,	O
Inc	O
(	O
WDC	O
)	O
introduced	O
the	O
CMOS	B-Device
WDC	B-General_Concept
65C02	I-General_Concept
in	O
1982	O
and	O
licensed	O
the	O
design	O
to	O
several	O
firms	O
.	O
</s>
<s>
It	O
was	O
used	O
as	O
the	O
CPU	B-General_Concept
in	O
the	O
Apple	B-Device
IIe	I-Device
and	O
IIc	O
personal	B-Device
computers	I-Device
as	O
well	O
as	O
in	O
medical	O
implantable	O
grade	O
pacemakers	B-Device
and	O
defibrillators	O
,	O
automotive	O
,	O
industrial	O
and	O
consumer	O
devices	O
.	O
</s>
<s>
WDC	O
pioneered	O
the	O
licensing	O
of	O
microprocessor	B-General_Concept
designs	I-General_Concept
,	O
later	O
followed	O
by	O
ARM	B-Architecture
(	O
32-bit	O
)	O
and	O
other	O
microprocessor	B-Architecture
intellectual	O
property	O
(	O
IP	O
)	O
providers	O
in	O
the	O
1990s	O
.	O
</s>
<s>
Motorola	O
introduced	O
the	O
MC6809	B-Device
in	O
1978	O
.	O
</s>
<s>
It	O
was	O
an	O
ambitious	O
and	O
well	O
thought-through	O
8-bit	O
design	O
that	O
was	O
source	B-General_Concept
compatible	I-General_Concept
with	O
the	O
6800	B-Device
,	O
and	O
implemented	O
using	O
purely	O
hard-wired	O
logic	O
(	O
subsequent	O
16-bit	B-Device
microprocessors	B-Architecture
typically	O
used	O
microcode	B-Device
to	O
some	O
extent	O
,	O
as	O
CISC	B-Architecture
design	O
requirements	O
were	O
becoming	O
too	O
complex	O
for	O
pure	O
hard-wired	O
logic	O
)	O
.	O
</s>
<s>
Another	O
early	O
8-bit	O
microprocessor	B-Architecture
was	O
the	O
Signetics	B-General_Concept
2650	I-General_Concept
,	O
which	O
enjoyed	O
a	O
brief	O
surge	O
of	O
interest	O
due	O
to	O
its	O
innovative	O
and	O
powerful	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
A	O
seminal	O
microprocessor	B-Architecture
in	O
the	O
world	O
of	O
spaceflight	O
was	O
RCA	O
's	O
RCA	B-General_Concept
1802	I-General_Concept
(	O
aka	O
CDP1802	B-General_Concept
,	O
RCA	B-General_Concept
COSMAC	I-General_Concept
)	O
(	O
introduced	O
in	O
1976	O
)	O
,	O
which	O
was	O
used	O
on	O
board	O
the	O
Galileo	O
probe	O
to	O
Jupiter	O
(	O
launched	O
1989	O
,	O
arrived	O
1995	O
)	O
.	O
</s>
<s>
RCA	B-General_Concept
COSMAC	I-General_Concept
was	O
the	O
first	O
to	O
implement	O
CMOS	B-Device
technology	O
.	O
</s>
<s>
The	O
CDP1802	B-General_Concept
was	O
used	O
because	O
it	O
could	O
be	O
run	O
at	O
very	O
low	O
power	B-Architecture
,	O
and	O
because	O
a	O
variant	O
was	O
available	O
fabricated	O
using	O
a	O
special	O
production	O
process	O
,	O
silicon	B-Algorithm
on	I-Algorithm
sapphire	I-Algorithm
(	O
SOS	O
)	O
,	O
which	O
provided	O
much	O
better	O
protection	O
against	O
cosmic	O
radiation	O
and	O
electrostatic	O
discharge	O
than	O
that	O
of	O
any	O
other	O
processor	O
of	O
the	O
era	O
.	O
</s>
<s>
Thus	O
,	O
the	O
SOS	O
version	O
of	O
the	O
1802	O
was	O
said	O
to	O
be	O
the	O
first	O
radiation-hardened	O
microprocessor	B-Architecture
.	O
</s>
<s>
The	O
RCA	B-General_Concept
1802	I-General_Concept
had	O
a	O
static	B-General_Concept
design	I-General_Concept
,	O
meaning	O
that	O
the	O
clock	O
frequency	O
could	O
be	O
made	O
arbitrarily	O
low	O
,	O
or	O
even	O
stopped	O
.	O
</s>
<s>
This	O
let	O
the	O
Galileo	O
spacecraft	O
use	O
minimum	O
electric	O
power	B-Architecture
for	O
long	O
uneventful	O
stretches	O
of	O
a	O
voyage	O
.	O
</s>
<s>
Current	O
versions	O
of	O
the	O
Western	B-General_Concept
Design	I-General_Concept
Center	I-General_Concept
65C02	I-General_Concept
and	O
65C816	B-General_Concept
also	O
have	O
static	B-General_Concept
cores	I-General_Concept
,	O
and	O
thus	O
retain	O
data	O
even	O
when	O
the	O
clock	O
is	O
completely	O
halted	O
.	O
</s>
<s>
The	O
Intersil	B-General_Concept
6100	I-General_Concept
family	I-General_Concept
consisted	O
of	O
a	O
12-bit	B-Device
microprocessor	B-Architecture
(	O
the	O
6100	B-General_Concept
)	O
and	O
a	O
range	O
of	O
peripheral	O
support	O
and	O
memory	B-General_Concept
ICs	O
.	O
</s>
<s>
The	O
microprocessor	B-Architecture
recognised	O
the	O
DEC	B-Device
PDP-8	I-Device
minicomputer	B-Architecture
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
As	O
such	O
it	O
was	O
sometimes	O
referred	O
to	O
as	O
the	O
CMOS-PDP8	O
.	O
</s>
<s>
Since	O
it	O
was	O
also	O
produced	O
by	O
Harris	O
Corporation	O
,	O
it	O
was	O
also	O
known	O
as	O
the	O
Harris	O
HM-6100	O
.	O
</s>
<s>
By	O
virtue	O
of	O
its	O
CMOS	B-Device
technology	O
and	O
associated	O
benefits	O
,	O
the	O
6100	B-General_Concept
was	O
being	O
incorporated	O
into	O
some	O
military	O
designs	O
until	O
the	O
early	O
1980s	O
.	O
</s>
<s>
The	O
first	O
multi-chip	O
16-bit	B-Device
microprocessor	B-Architecture
was	O
the	O
National	B-Device
Semiconductor	I-Device
IMP-16	I-Device
,	O
introduced	O
in	O
early	O
1973	O
.	O
</s>
<s>
Other	O
early	O
multi-chip	O
16-bit	B-Device
microprocessors	B-Architecture
include	O
the	O
MCP-1600	B-General_Concept
that	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
used	O
in	O
the	O
LSI-11	O
OEM	O
board	O
set	O
and	O
the	O
packaged	O
PDP-11/03	B-Device
minicomputer	B-Architecture
—	O
and	O
the	O
Fairchild	O
Semiconductor	O
MicroFlame	O
9440	O
,	O
both	O
introduced	O
in	O
1975	O
–	O
76	O
.	O
</s>
<s>
In	O
late	O
1974	O
,	O
National	O
introduced	O
the	O
first	O
16-bit	B-Device
single-chip	O
microprocessor	B-Architecture
,	O
the	O
National	B-Device
Semiconductor	I-Device
PACE	I-Device
,	O
which	O
was	O
later	O
followed	O
by	O
an	O
NMOS	B-Algorithm
version	O
,	O
the	O
INS8900	B-General_Concept
.	O
</s>
<s>
Next	O
in	O
list	O
is	O
the	O
General	O
Instrument	O
CP1600	O
,	O
released	O
in	O
February	O
1975	O
,	O
which	O
was	O
used	O
mainly	O
in	O
the	O
Intellivision	B-Operating_System
console	O
.	O
</s>
<s>
Another	O
early	O
single-chip	O
16-bit	B-Device
microprocessor	B-Architecture
was	O
TI	O
's	O
TMS	B-General_Concept
9900	I-General_Concept
,	O
which	O
was	O
also	O
compatible	O
with	O
their	O
TI-990	B-Device
line	O
of	O
minicomputers	B-Architecture
.	O
</s>
<s>
The	O
9900	O
was	O
used	O
in	O
the	O
TI	O
990/4	O
minicomputer	B-Architecture
,	O
the	O
TI-99/4A	B-Device
home	O
computer	O
,	O
and	O
the	O
TM990	O
line	O
of	O
OEM	O
microcomputer	B-Architecture
boards	O
.	O
</s>
<s>
The	O
chip	O
was	O
packaged	O
in	O
a	O
large	O
ceramic	O
64-pin	O
DIP	B-Algorithm
package	I-Algorithm
,	O
while	O
most	O
8-bit	O
microprocessors	B-Architecture
such	O
as	O
the	O
Intel	B-General_Concept
8080	I-General_Concept
used	O
the	O
more	O
common	O
,	O
smaller	O
,	O
and	O
less	O
expensive	O
plastic	O
40-pin	O
DIP	B-Algorithm
.	O
</s>
<s>
A	O
follow-on	O
chip	O
,	O
the	O
TMS	O
9980	O
,	O
was	O
designed	O
to	O
compete	O
with	O
the	O
Intel	B-General_Concept
8080	I-General_Concept
,	O
had	O
the	O
full	O
TI	O
990	O
16-bit	B-Device
instruction	B-General_Concept
set	I-General_Concept
,	O
used	O
a	O
plastic	O
40-pin	O
package	O
,	O
moved	O
data	O
8bits	O
at	O
a	O
time	O
,	O
but	O
could	O
only	O
address	B-General_Concept
16KB	O
.	O
</s>
<s>
The	O
Western	O
Design	O
Center	O
(	O
WDC	O
)	O
introduced	O
the	O
CMOS	B-Device
65816	B-General_Concept
16-bit	B-Device
upgrade	O
of	O
the	O
WDC	O
CMOS	B-Device
65C02	B-General_Concept
in	O
1984	O
.	O
</s>
<s>
The	O
65816	B-General_Concept
16-bit	B-Device
microprocessor	B-Architecture
was	O
the	O
core	O
of	O
the	O
Apple	B-Device
IIGS	I-Device
and	O
later	O
the	O
Super	B-Application
Nintendo	I-Application
Entertainment	I-Application
System	I-Application
,	O
making	O
it	O
one	O
of	O
the	O
most	O
popular	O
16-bit	B-Device
designs	O
of	O
all	O
time	O
.	O
</s>
<s>
Intel	O
"	O
upsized	O
"	O
their	O
8080	B-General_Concept
design	O
into	O
the	O
16-bit	B-Device
Intel	B-General_Concept
8086	I-General_Concept
,	O
the	O
first	O
member	O
of	O
the	O
x86	B-Operating_System
family	O
,	O
which	O
powers	O
most	O
modern	O
PC	O
type	O
computers	O
.	O
</s>
<s>
Intel	O
introduced	O
the	O
8086	B-General_Concept
as	O
a	O
cost-effective	O
way	O
of	O
porting	O
software	O
from	O
the	O
8080	B-General_Concept
lines	O
,	O
and	O
succeeded	O
in	O
winning	O
much	O
business	O
on	O
that	O
premise	O
.	O
</s>
<s>
The	O
8088	B-Device
,	O
a	O
version	O
of	O
the	O
8086	B-General_Concept
that	O
used	O
an	O
8-bit	O
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
,	O
was	O
the	O
microprocessor	B-Architecture
in	O
the	O
first	O
IBM	B-Device
PC	I-Device
.	O
</s>
<s>
Intel	O
then	O
released	O
the	O
80186	B-Device
and	O
80188	B-Device
,	O
the	O
80286	B-General_Concept
and	O
,	O
in	O
1985	O
,	O
the	O
32-bit	O
80386	B-General_Concept
,	O
cementing	O
their	O
PC	O
market	O
dominance	O
with	O
the	O
processor	O
family	O
's	O
backwards	O
compatibility	O
.	O
</s>
<s>
The	O
80186	B-Device
and	O
80188	B-Device
were	O
essentially	O
versions	O
of	O
the	O
8086	B-General_Concept
and	O
8088	B-Device
,	O
enhanced	O
with	O
some	O
onboard	O
peripherals	O
and	O
a	O
few	O
new	O
instructions	O
.	O
</s>
<s>
Although	O
Intel	O
's	O
80186	B-Device
and	O
80188	B-Device
were	O
not	O
used	O
in	O
IBM	B-Device
PC	I-Device
type	O
designs	O
,	O
second	O
source	O
versions	O
from	O
NEC	O
,	O
the	O
V20	B-Device
and	O
V30	O
frequently	O
were	O
.	O
</s>
<s>
The	O
8086	B-General_Concept
and	O
successors	O
had	O
an	O
innovative	O
but	O
limited	O
method	O
of	O
memory	B-General_Concept
segmentation	I-General_Concept
,	O
while	O
the	O
80286	B-General_Concept
introduced	O
a	O
full-featured	O
segmented	B-General_Concept
memory	I-General_Concept
management	O
unit	O
(	O
MMU	O
)	O
.	O
</s>
<s>
The	O
80386	B-General_Concept
introduced	O
a	O
flat	O
32-bit	O
memory	B-General_Concept
model	O
with	O
paged	B-General_Concept
memory	I-General_Concept
management	I-General_Concept
.	O
</s>
<s>
The	O
16-bit	B-Device
Intel	B-Operating_System
x86	I-Operating_System
processors	O
up	O
to	O
and	O
including	O
the	O
80386	B-General_Concept
do	O
not	O
include	O
floating-point	B-General_Concept
units	I-General_Concept
(	O
FPUs	O
)	O
.	O
</s>
<s>
Intel	O
introduced	O
the	O
8087	B-Device
,	O
80187	O
,	O
80287	O
and	O
80387	O
math	B-General_Concept
coprocessors	I-General_Concept
to	O
add	O
hardware	O
floating-point	B-Algorithm
and	O
transcendental	O
function	O
capabilities	O
to	O
the	O
8086	B-General_Concept
through	O
80386	B-General_Concept
CPUs	O
.	O
</s>
<s>
The	O
8087	B-Device
works	O
with	O
the	O
8086/8088	O
and	O
80186/80188	B-Device
,	O
the	O
80187	O
works	O
with	O
the	O
80186	B-Device
but	O
not	O
the	O
80188	B-Device
,	O
the	O
80287	O
works	O
with	O
the	O
80286	B-General_Concept
and	O
the	O
80387	O
works	O
with	O
the	O
80386	B-General_Concept
.	O
</s>
<s>
The	O
combination	O
of	O
an	O
x86	B-Operating_System
CPU	B-General_Concept
and	O
an	O
x87	O
coprocessor	O
forms	O
a	O
single	O
multi-chip	O
microprocessor	B-Architecture
;	O
the	O
two	O
chips	O
are	O
programmed	O
as	O
a	O
unit	O
using	O
a	O
single	O
integrated	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
The	O
8087	B-Device
and	O
80187	O
coprocessors	O
are	O
connected	O
in	B-Operating_System
parallel	I-Operating_System
with	O
the	O
data	O
and	O
address	B-General_Concept
buses	O
of	O
their	O
parent	O
processor	O
and	O
directly	O
execute	O
instructions	O
intended	O
for	O
them	O
.	O
</s>
<s>
The	O
80287	O
and	O
80387	O
coprocessors	O
are	O
interfaced	O
to	O
the	O
CPU	B-General_Concept
through	O
I/O	B-General_Concept
ports	O
in	O
the	O
CPU	B-General_Concept
's	O
address	B-General_Concept
space	O
,	O
this	O
is	O
transparent	O
to	O
the	O
program	O
,	O
which	O
does	O
not	O
need	O
to	O
know	O
about	O
or	O
access	O
these	O
I/O	B-General_Concept
ports	O
directly	O
;	O
the	O
program	O
accesses	O
the	O
coprocessor	O
and	O
its	O
registers	O
through	O
normal	O
instruction	B-Language
opcodes	I-Language
.	O
</s>
<s>
16-bit	B-Device
designs	O
had	O
only	O
been	O
on	O
the	O
market	O
briefly	O
when	O
32-bit	O
implementations	O
started	O
to	O
appear	O
.	O
</s>
<s>
The	O
most	O
significant	O
of	O
the	O
32-bit	O
designs	O
is	O
the	O
Motorola	B-Device
MC68000	I-Device
,	O
introduced	O
in	O
1979	O
.	O
</s>
<s>
The	O
68k	O
,	O
as	O
it	O
was	O
widely	O
known	O
,	O
had	O
32-bit	O
registers	O
in	O
its	O
programming	O
model	O
but	O
used	O
16-bit	B-Device
internal	O
data	O
paths	O
,	O
three	O
16-bit	B-Device
Arithmetic	B-General_Concept
Logic	I-General_Concept
Units	I-General_Concept
,	O
and	O
a	O
16-bit	B-Device
external	B-General_Concept
data	I-General_Concept
bus	I-General_Concept
(	O
to	O
reduce	O
pin	O
count	O
)	O
,	O
and	O
externally	O
supported	O
only	O
24-bit	O
addresses	O
(	O
internally	O
it	O
worked	O
with	O
full	O
32bit	O
addresses	O
)	O
.	O
</s>
<s>
In	O
PC-based	B-Operating_System
IBM-compatible	I-Operating_System
mainframes	I-Operating_System
the	O
MC68000	B-Device
internal	O
microcode	B-Device
was	O
modified	O
to	O
emulate	O
the	O
32-bit	O
System/370	O
IBM	O
mainframe	B-Architecture
.	O
</s>
<s>
Motorola	O
generally	O
described	O
it	O
as	O
a	O
16-bit	B-Device
processor	I-Device
.	O
</s>
<s>
The	O
combination	O
of	O
high	O
performance	O
,	O
large	O
(	O
16megabytes	O
or	O
224bytes	O
)	O
memory	B-General_Concept
space	O
and	O
fairly	O
low	O
cost	O
made	O
it	O
the	O
most	O
popular	O
CPU	B-General_Concept
design	I-General_Concept
of	O
its	O
class	O
.	O
</s>
<s>
The	O
Apple	B-Device
Lisa	I-Device
and	O
Macintosh	B-Device
designs	O
made	O
use	O
of	O
the	O
68000	B-Device
,	O
as	O
did	O
other	O
designs	O
in	O
the	O
mid-1980s	O
,	O
including	O
the	O
Atari	B-Device
ST	I-Device
and	O
Amiga	B-Device
.	O
</s>
<s>
The	O
world	O
's	O
first	O
single-chip	O
fully	O
32-bit	O
microprocessor	B-Architecture
,	O
with	O
32-bit	O
data	O
paths	O
,	O
32-bit	O
buses	O
,	O
and	O
32-bit	O
addresses	O
,	O
was	O
the	O
AT&T	O
Bell	O
Labs	O
BELLMAC-32A	B-General_Concept
,	O
with	O
first	O
samples	O
in	O
1980	O
,	O
and	O
general	O
production	O
in	O
1982	O
.	O
</s>
<s>
After	O
the	O
divestiture	O
of	O
AT&T	O
in	O
1984	O
,	O
it	O
was	O
renamed	O
the	O
WE	B-General_Concept
32000	I-General_Concept
(	O
WE	O
for	O
Western	O
Electric	O
)	O
,	O
and	O
had	O
two	O
follow-on	O
generations	O
,	O
the	O
WE	B-General_Concept
32100	I-General_Concept
and	O
WE	O
32200	O
.	O
</s>
<s>
These	O
microprocessors	B-Architecture
were	O
used	O
in	O
the	O
AT&T	O
3B5	O
and	O
3B15	O
minicomputers	B-Architecture
;	O
in	O
the	O
3B2	O
,	O
the	O
world	O
's	O
first	O
desktop	B-Device
super	O
microcomputer	B-Architecture
;	O
in	O
the	O
"	O
Companion	O
"	O
,	O
the	O
world	O
's	O
first	O
32-bit	O
laptop	B-Device
computer	I-Device
;	O
and	O
in	O
"	O
Alexander	O
"	O
,	O
the	O
world	O
's	O
first	O
book-sized	O
super	O
microcomputer	B-Architecture
,	O
featuring	O
ROM-pack	O
memory	B-General_Concept
cartridges	O
similar	O
to	O
today	O
's	O
gaming	O
consoles	O
.	O
</s>
<s>
All	O
these	O
systems	O
ran	O
the	O
UNIX	B-Operating_System
System	I-Operating_System
V	I-Operating_System
operating	O
system	O
.	O
</s>
<s>
The	O
first	O
commercial	O
,	O
single	O
chip	O
,	O
fully	O
32-bit	O
microprocessor	B-Architecture
available	O
on	O
the	O
market	O
was	O
the	O
HP	B-Application
FOCUS	I-Application
.	O
</s>
<s>
Intel	O
's	O
first	O
32-bit	O
microprocessor	B-Architecture
was	O
the	O
iAPX	B-Device
432	I-Device
,	O
which	O
was	O
introduced	O
in	O
1981	O
,	O
but	O
was	O
not	O
a	O
commercial	O
success	O
.	O
</s>
<s>
It	O
had	O
an	O
advanced	O
capability-based	O
object-oriented	O
architecture	O
,	O
but	O
poor	O
performance	O
compared	O
to	O
contemporary	O
architectures	O
such	O
as	O
Intel	O
's	O
own	O
80286	B-General_Concept
(	O
introduced	O
1982	O
)	O
,	O
which	O
was	O
almost	O
four	O
times	O
as	O
fast	O
on	O
typical	O
benchmark	O
tests	O
.	O
</s>
<s>
However	O
,	O
the	O
results	O
for	O
the	O
iAPX432	B-Device
was	O
partly	O
due	O
to	O
a	O
rushed	O
and	O
therefore	O
suboptimal	O
Ada	B-Language
compiler	B-Language
.	O
</s>
<s>
Motorola	O
's	O
success	O
with	O
the	O
68000	B-Device
led	O
to	O
the	O
MC68010	B-Device
,	O
which	O
added	O
virtual	B-Architecture
memory	I-Architecture
support	O
.	O
</s>
<s>
The	O
MC68020	B-Device
,	O
introduced	O
in	O
1984	O
added	O
full	O
32-bit	O
data	O
and	O
address	B-General_Concept
buses	O
.	O
</s>
<s>
The	O
68020	B-Device
became	O
hugely	O
popular	O
in	O
the	O
Unix	B-Application
supermicrocomputer	O
market	O
,	O
and	O
many	O
small	O
companies	O
(	O
e.g.	O
,	O
Altos	O
,	O
Charles	B-Architecture
River	I-Architecture
Data	I-Architecture
Systems	I-Architecture
,	O
Cromemco	O
)	O
produced	O
desktop-size	O
systems	O
.	O
</s>
<s>
The	O
MC68030	B-Device
was	O
introduced	O
next	O
,	O
improving	O
upon	O
the	O
previous	O
design	O
by	O
integrating	O
the	O
MMU	O
into	O
the	O
chip	O
.	O
</s>
<s>
The	O
continued	O
success	O
led	O
to	O
the	O
MC68040	B-Device
,	O
which	O
included	O
an	O
FPU	B-General_Concept
for	O
better	O
math	O
performance	O
.	O
</s>
<s>
The	O
68050	O
failed	O
to	O
achieve	O
its	O
performance	O
goals	O
and	O
was	O
not	O
released	O
,	O
and	O
the	O
follow-up	O
MC68060	B-General_Concept
was	O
released	O
into	O
a	O
market	O
saturated	O
by	O
much	O
faster	O
RISC	B-Architecture
designs	O
.	O
</s>
<s>
Other	O
large	O
companies	O
designed	O
the	O
68020	B-Device
and	O
follow-ons	O
into	O
embedded	B-Architecture
equipment	O
.	O
</s>
<s>
At	O
one	O
point	O
,	O
there	O
were	O
more	O
68020s	B-Device
in	O
embedded	B-Architecture
equipment	O
than	O
there	O
were	O
Intel	O
Pentiums	O
in	O
PCs	B-Device
.	O
</s>
<s>
The	O
ColdFire	B-Device
processor	O
cores	O
are	O
derivatives	O
of	O
the	O
68020	B-Device
.	O
</s>
<s>
During	O
this	O
time	O
(	O
early	O
to	O
mid-1980s	O
)	O
,	O
National	O
Semiconductor	O
introduced	O
a	O
very	O
similar	O
16-bit	B-Device
pinout	O
,	O
32-bit	O
internal	O
microprocessor	B-Architecture
called	O
the	O
NS	O
16032	B-Device
(	O
later	O
renamed	O
32016	B-Device
)	O
,	O
the	O
full	O
32-bit	O
version	O
named	O
the	O
NS	B-Device
32032	I-Device
.	O
</s>
<s>
Later	O
,	O
National	O
Semiconductor	O
produced	O
the	O
NS	B-Device
32132	I-Device
,	O
which	O
allowed	O
two	O
CPUs	O
to	O
reside	O
on	O
the	O
same	O
memory	B-General_Concept
bus	O
with	O
built	O
in	O
arbitration	O
.	O
</s>
<s>
The	O
NS32016/32	O
outperformed	O
the	O
MC68000/10	O
,	O
but	O
the	O
NS32332	O
—	O
which	O
arrived	O
at	O
approximately	O
the	O
same	O
time	O
as	O
the	O
MC68020	B-Device
—	O
did	O
not	O
have	O
enough	O
performance	O
.	O
</s>
<s>
It	O
had	O
about	O
double	O
the	O
performance	O
of	O
the	O
MC68030	B-Device
,	O
which	O
was	O
released	O
around	O
the	O
same	O
time	O
.	O
</s>
<s>
The	O
appearance	O
of	O
RISC	B-Architecture
processors	I-Architecture
like	O
the	O
AM29000	B-General_Concept
and	O
MC88000	B-Architecture
(	O
now	O
both	O
dead	O
)	O
influenced	O
the	O
architecture	O
of	O
the	O
final	O
core	O
,	O
the	O
NS32764	O
.	O
</s>
<s>
Technically	O
advanced	O
—	O
with	O
a	O
superscalar	O
RISC	B-Architecture
core	O
,	O
64-bit	B-Device
bus	O
,	O
and	O
internally	O
overclocked	O
—	O
it	O
could	O
still	O
execute	O
Series	O
32000	O
instructions	O
through	O
real-time	O
translation	O
.	O
</s>
<s>
When	O
National	O
Semiconductor	O
decided	O
to	O
leave	O
the	O
Unix	B-Application
market	O
,	O
the	O
chip	O
was	O
redesigned	O
into	O
the	O
Swordfish	O
Embedded	B-Architecture
processor	I-Architecture
with	O
a	O
set	O
of	O
on-chip	O
peripherals	O
.	O
</s>
<s>
The	O
big	O
success	O
of	O
the	O
Series	O
32000	O
was	O
in	O
the	O
laser	O
printer	O
market	O
,	O
where	O
the	O
NS32CG16	O
with	O
microcoded	B-Device
BitBlt	O
instructions	O
had	O
very	O
good	O
price/performance	O
and	O
was	O
adopted	O
by	O
large	O
companies	O
like	O
Canon	O
.	O
</s>
<s>
By	O
the	O
mid-1980s	O
,	O
Sequent	O
introduced	O
the	O
first	O
SMP	O
server-class	O
computer	O
using	O
the	O
NS	B-Device
32032	I-Device
.	O
</s>
<s>
The	O
MIPS	B-Device
R2000	I-Device
(	O
1984	O
)	O
and	O
R3000	B-Device
(	O
1989	O
)	O
were	O
highly	O
successful	O
32-bit	O
RISC	B-Architecture
microprocessors	B-Architecture
.	O
</s>
<s>
They	O
were	O
used	O
in	O
high-end	O
workstations	B-Device
and	O
servers	O
by	O
SGI	O
,	O
among	O
others	O
.	O
</s>
<s>
Other	O
designs	O
included	O
the	O
Zilog	B-Device
Z80000	I-Device
,	O
which	O
arrived	O
too	O
late	O
to	O
market	O
to	O
stand	O
a	O
chance	O
and	O
disappeared	O
quickly	O
.	O
</s>
<s>
The	O
ARM	B-Architecture
first	O
appeared	O
in	O
1985	O
.	O
</s>
<s>
This	O
is	O
a	O
RISC	B-Architecture
processor	I-Architecture
design	O
,	O
which	O
has	O
since	O
come	O
to	O
dominate	O
the	O
32-bit	O
embedded	B-Architecture
systems	I-Architecture
processor	O
space	O
due	O
in	O
large	O
part	O
to	O
its	O
power	B-Architecture
efficiency	O
,	O
its	O
licensing	O
model	O
,	O
and	O
its	O
wide	O
selection	O
of	O
system	O
development	O
tools	O
.	O
</s>
<s>
Semiconductor	O
manufacturers	O
generally	O
license	O
cores	O
and	O
integrate	O
them	O
into	O
their	O
own	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
products	O
;	O
only	O
a	O
few	O
such	O
vendors	O
such	O
as	O
Apple	O
are	O
licensed	O
to	O
modify	O
the	O
ARM	B-Architecture
cores	O
or	O
create	O
their	O
own	O
.	O
</s>
<s>
Most	O
cell	O
phones	O
include	O
an	O
ARM	B-Architecture
processor	I-Architecture
,	O
as	O
do	O
a	O
wide	O
variety	O
of	O
other	O
products	O
.	O
</s>
<s>
There	O
are	O
microcontroller-oriented	O
ARM	B-Architecture
cores	O
without	O
virtual	B-Architecture
memory	I-Architecture
support	O
,	O
as	O
well	O
as	O
symmetric	B-Operating_System
multiprocessor	I-Operating_System
(	O
SMP	O
)	O
applications	O
processors	O
with	O
virtual	B-Architecture
memory	I-Architecture
.	O
</s>
<s>
From	O
1993	O
to	O
2003	O
,	O
the	O
32-bit	O
x86	B-Operating_System
architectures	I-Operating_System
became	O
increasingly	O
dominant	O
in	O
desktop	B-Device
,	O
laptop	B-Device
,	O
and	O
server	O
markets	O
,	O
and	O
these	O
microprocessors	B-Architecture
became	O
faster	O
and	O
more	O
capable	O
.	O
</s>
<s>
Intel	O
had	O
licensed	O
early	O
versions	O
of	O
the	O
architecture	O
to	O
other	O
companies	O
,	O
but	O
declined	O
to	O
license	O
the	O
Pentium	O
,	O
so	O
AMD	B-Device
and	O
Cyrix	O
built	O
later	O
versions	O
of	O
the	O
architecture	O
based	O
on	O
their	O
own	O
designs	O
.	O
</s>
<s>
During	O
this	O
span	O
,	O
these	O
processors	O
increased	O
in	O
complexity	O
(	O
transistor	B-Application
count	O
)	O
and	O
capability	O
(	O
instructions/second	O
)	O
by	O
at	O
least	O
three	O
orders	O
of	O
magnitude	O
.	O
</s>
<s>
While	O
64-bit	B-Device
microprocessor	B-General_Concept
designs	I-General_Concept
have	O
been	O
in	O
use	O
in	O
several	O
markets	O
since	O
the	O
early	O
1990s	O
(	O
including	O
the	O
Nintendo	B-Operating_System
64	I-Operating_System
gaming	O
console	O
in	O
1996	O
)	O
,	O
the	O
early	O
2000s	O
saw	O
the	O
introduction	O
of	O
64-bit	B-Device
microprocessors	B-Architecture
targeted	O
at	O
the	O
PC	O
market	O
.	O
</s>
<s>
With	O
AMD	B-Device
's	O
introduction	O
of	O
a	O
64-bit	B-Device
architecture	I-Device
backwards-compatible	O
with	O
x86	B-Operating_System
,	O
x86-64	B-Device
(	O
also	O
called	O
AMD64	B-Device
)	O
,	O
in	O
September	O
2003	O
,	O
followed	O
by	O
Intel	O
's	O
near	O
fully	O
compatible	O
64-bit	B-Device
extensions	O
(	O
first	O
called	O
IA-32e	B-Device
or	O
EM64T	B-Device
,	O
later	O
renamed	O
Intel	O
64	O
)	O
,	O
the	O
64-bit	B-Device
desktop	B-Device
era	O
began	O
.	O
</s>
<s>
Both	O
versions	O
can	O
run	O
32-bit	O
legacy	O
applications	O
without	O
any	O
performance	O
penalty	O
as	O
well	O
as	O
new	O
64-bit	B-Device
software	O
.	O
</s>
<s>
With	O
operating	O
systems	O
Windows	B-Operating_System
XP	I-Operating_System
x64	I-Operating_System
,	O
Windows	B-Application
Vista	I-Application
x64	B-Device
,	O
Windows	B-Device
7	I-Device
x64	B-Device
,	O
Linux	B-Application
,	O
BSD	B-Operating_System
,	O
and	O
macOS	B-Application
that	O
run	O
64-bit	B-Device
natively	O
,	O
the	O
software	O
is	O
also	O
geared	O
to	O
fully	O
utilize	O
the	O
capabilities	O
of	O
such	O
processors	O
.	O
</s>
<s>
The	O
move	O
to	O
64bits	B-Device
is	O
more	O
than	O
just	O
an	O
increase	O
in	O
register	B-General_Concept
size	O
from	O
the	O
IA-32	O
as	O
it	O
also	O
doubles	O
the	O
number	O
of	O
general-purpose	O
registers	O
.	O
</s>
<s>
The	O
move	O
to	O
64bits	B-Device
by	O
PowerPC	B-Architecture
had	O
been	O
intended	O
since	O
the	O
architecture	O
's	O
design	O
in	O
the	O
early	O
90s	O
and	O
was	O
not	O
a	O
major	O
cause	O
of	O
incompatibility	O
.	O
</s>
<s>
Existing	O
integer	O
registers	O
are	O
extended	O
as	O
are	O
all	O
related	O
data	O
pathways	O
,	O
but	O
,	O
as	O
was	O
the	O
case	O
with	O
IA-32	O
,	O
both	O
floating-point	B-Algorithm
and	O
vector	O
units	O
had	O
been	O
operating	O
at	O
or	O
above	O
64bits	B-Device
for	O
several	O
years	O
.	O
</s>
<s>
Unlike	O
what	O
happened	O
when	O
IA-32	O
was	O
extended	O
to	O
x86-64	B-Device
,	O
no	O
new	O
general	O
purpose	O
registers	O
were	O
added	O
in	O
64-bit	B-Device
PowerPC	B-Architecture
,	O
so	O
any	O
performance	O
gained	O
when	O
using	O
the	O
64-bit	B-Device
mode	O
for	O
applications	O
making	O
no	O
use	O
of	O
the	O
larger	O
address	B-General_Concept
space	O
is	O
minimal	O
.	O
</s>
<s>
In	O
2011	O
,	O
ARM	B-Architecture
introduced	O
the	O
new	O
64-bit	B-Device
ARM	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
In	O
the	O
mid-1980s	O
to	O
early	O
1990s	O
,	O
a	O
crop	O
of	O
new	O
high-performance	O
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
microprocessors	B-Architecture
appeared	O
,	O
influenced	O
by	O
discrete	O
RISC-like	O
CPU	B-General_Concept
designs	I-General_Concept
such	O
as	O
the	O
IBM	B-Device
801	I-Device
and	O
others	O
.	O
</s>
<s>
RISC	B-Architecture
microprocessors	B-Architecture
were	O
initially	O
used	O
in	O
special-purpose	O
machines	O
and	O
Unix	B-Device
workstations	I-Device
,	O
but	O
then	O
gained	O
wide	O
acceptance	O
in	O
other	O
roles	O
.	O
</s>
<s>
The	O
first	O
commercial	O
RISC	B-Architecture
microprocessor	B-General_Concept
design	I-General_Concept
was	O
released	O
in	O
1984	O
,	O
by	O
MIPS	B-Device
Computer	O
Systems	O
,	O
the	O
32-bit	O
R2000	B-Device
(	O
the	O
R1000	O
was	O
not	O
released	O
)	O
.	O
</s>
<s>
In	O
1986	O
,	O
HP	O
released	O
its	O
first	O
system	O
with	O
a	O
PA-RISC	B-Device
CPU	B-General_Concept
.	O
</s>
<s>
In	O
1987	O
,	O
in	O
the	O
non-Unix	O
Acorn	O
computers	O
 '	O
32-bit	O
,	O
then	O
cache-less	O
,	O
ARM2-based	O
Acorn	B-Device
Archimedes	I-Device
became	O
the	O
first	O
commercial	O
success	O
using	O
the	O
ARM	B-Architecture
architecture	I-Architecture
,	O
then	O
known	O
as	O
Acorn	B-Architecture
RISC	I-Architecture
Machine	I-Architecture
(	O
ARM	B-Architecture
)	O
;	O
first	O
silicon	O
ARM1	O
in	O
1985	O
.	O
</s>
<s>
The	O
R3000	B-Device
made	O
the	O
design	O
truly	O
practical	O
,	O
and	O
the	O
R4000	B-General_Concept
introduced	O
the	O
world	O
's	O
first	O
commercially	O
available	O
64-bit	B-Device
RISC	B-Architecture
microprocessor	B-Architecture
.	O
</s>
<s>
Competing	O
projects	O
would	O
result	O
in	O
the	O
IBM	O
POWER	B-Architecture
and	O
Sun	B-Architecture
SPARC	I-Architecture
architectures	O
.	O
</s>
<s>
Soon	O
every	O
major	O
vendor	O
was	O
releasing	O
a	O
RISC	B-Architecture
design	O
,	O
including	O
the	O
AT&T	B-Application
CRISP	I-Application
,	O
AMD	B-General_Concept
29000	I-General_Concept
,	O
Intel	B-General_Concept
i860	I-General_Concept
and	O
Intel	B-General_Concept
i960	I-General_Concept
,	O
Motorola	B-Architecture
88000	I-Architecture
,	O
DEC	B-Device
Alpha	I-Device
.	O
</s>
<s>
In	O
the	O
late	O
1990s	O
,	O
only	O
two	O
64-bit	B-Device
RISC	B-Architecture
architectures	I-Architecture
were	O
still	O
produced	O
in	O
volume	O
for	O
non-embedded	O
applications	O
:	O
SPARC	B-Architecture
and	O
Power	B-Architecture
ISA	I-Architecture
,	O
but	O
as	O
ARM	B-Architecture
has	O
become	O
increasingly	O
powerful	O
,	O
in	O
the	O
early	O
2010s	O
,	O
it	O
became	O
the	O
third	O
RISC	B-Architecture
architecture	O
in	O
the	O
general	O
computing	O
segment	O
.	O
</s>
<s>
SMP	O
symmetric	B-Operating_System
multiprocessing	I-Operating_System
is	O
a	O
configuration	O
of	O
two	O
,	O
four	O
,	O
or	O
more	O
CPU	B-General_Concept
's	O
(	O
in	O
pairs	O
)	O
that	O
are	O
typically	O
used	O
in	O
servers	O
,	O
certain	O
workstations	B-Device
and	O
in	O
desktop	B-Device
personal	I-Device
computers	I-Device
,	O
since	O
the	O
1990s	O
.	O
</s>
<s>
A	O
multi-core	B-Architecture
processor	I-Architecture
is	O
a	O
single	O
CPU	B-General_Concept
that	O
contains	O
more	O
than	O
one	O
microprocessor	B-Architecture
core	I-Architecture
.	O
</s>
<s>
This	O
popular	O
two-socket	O
motherboard	O
from	O
Abit	B-Operating_System
was	O
released	O
in	O
1999	O
as	O
the	O
first	O
SMP	O
enabled	O
PC	O
motherboard	O
,	O
the	O
Intel	B-Device
Pentium	I-Device
Pro	I-Device
was	O
the	O
first	O
commercial	O
CPU	B-General_Concept
offered	O
to	O
system	O
builders	O
and	O
enthusiasts	O
.	O
</s>
<s>
The	O
Abit	B-Operating_System
BP9	O
supports	O
two	O
Intel	B-Device
Celeron	I-Device
CPU	B-General_Concept
's	O
and	O
when	O
used	O
with	O
a	O
SMP	O
enabled	O
operating	O
system	O
(	O
Windows	O
NT/2000/Linux	O
)	O
many	O
applications	O
obtain	O
much	O
higher	O
performance	O
than	O
a	O
single	O
CPU	B-General_Concept
.	O
</s>
<s>
The	O
early	O
Celerons	B-Device
are	O
easily	O
overclockable	O
and	O
hobbyists	O
used	O
these	O
relatively	O
inexpensive	O
CPU	B-General_Concept
's	O
clocked	O
as	O
high	O
as	O
533Mhz	O
-	O
far	O
beyond	O
Intel	O
's	O
specification	O
.	O
</s>
<s>
After	O
discovering	O
the	O
capacity	O
of	O
these	O
motherboards	O
Intel	O
removed	O
access	O
to	O
the	O
multiplier	O
in	O
later	O
CPU	B-General_Concept
's	O
.	O
</s>
<s>
In	O
2001IBM	O
released	O
the	O
POWER4	B-Device
CPU	B-General_Concept
,	O
it	O
was	O
a	O
processor	O
that	O
was	O
developed	O
over	O
five	O
years	O
of	O
research	O
,	O
began	O
in	O
1996	O
using	O
a	O
team	O
of	O
250	O
researchers	O
.	O
</s>
<s>
The	O
teams	O
work	O
achieved	O
success	O
with	O
the	O
new	O
microprocessor	B-Architecture
,	O
Power4	B-Device
.	O
</s>
<s>
It	O
is	O
a	O
two-in-one	O
CPU	B-General_Concept
that	O
more	O
than	O
doubled	O
performance	O
at	O
half	O
the	O
price	O
of	O
the	O
competition	O
,	O
and	O
a	O
major	O
advance	O
in	O
computing	O
.	O
</s>
<s>
The	O
business	O
magazine	O
eWeek	O
wrote	O
:	O
“	O
The	O
newly	O
designed	O
1GHz	O
Power4	B-Device
represents	O
a	O
tremendous	O
leap	O
over	O
its	O
predecessor	O
”	O
.	O
</s>
<s>
The	O
Power4	B-Device
won	O
"	O
Analysts’	O
Choice	O
Award	O
for	O
Best	O
Workstation/Server	O
Processor	O
of	O
2001	O
"	O
,	O
and	O
it	O
broke	O
notable	O
records	O
,	O
including	O
winning	O
a	O
contest	O
against	O
the	O
best	O
players	O
on	O
the	O
Jeopardy	O
!	O
</s>
<s>
Intel	O
's	O
codename	B-Device
Yonah	I-Device
CPU	B-General_Concept
's	O
launched	O
on	O
Jan	O
6	O
,	O
2006	O
and	O
were	O
manufactured	O
with	O
two	O
dies	O
packaged	O
on	O
a	O
multi-chip	B-Algorithm
module	I-Algorithm
.	O
</s>
<s>
In	O
a	O
hotly-contested	O
marketplace	O
AMD	B-Device
and	O
others	O
released	O
new	O
versions	O
of	O
multi-core	B-Architecture
CPU	I-Architecture
's	O
,	O
AMD	B-Device
's	O
SMP	O
enabled	O
Athlon	B-Architecture
MP	I-Architecture
CPU	B-General_Concept
's	O
from	O
the	O
AthlonXP	O
line	O
in	O
2001	O
,	O
Sun	O
released	O
the	O
Niagara	B-General_Concept
and	O
Niagara	B-Device
2	I-Device
with	O
eight-cores	O
,	O
AMD	B-Device
's	O
Athlon	B-Architecture
X2	O
was	O
released	O
in	O
June	O
2007	O
.	O
</s>
<s>
The	O
companies	O
were	O
engaged	O
in	O
a	O
never-ending	O
race	O
for	O
speed	O
,	O
indeed	O
more	O
demanding	O
software	O
mandated	O
more	O
processing	O
power	B-Architecture
and	O
faster	O
CPU	B-General_Concept
speeds	O
.	O
</s>
<s>
By	O
2012	O
dual	O
and	O
quad-core	B-Architecture
processors	I-Architecture
became	O
widely	O
used	O
in	O
PCs	B-Device
and	O
laptops	B-Device
,	O
newer	O
processors	O
-	O
similar	O
to	O
the	O
higher	O
cost	O
professional	O
level	O
Intel	O
Xeon	O
's	O
-	O
with	O
additional	O
cores	O
that	O
execute	O
instructions	O
in	B-Operating_System
parallel	I-Operating_System
so	O
software	O
performance	O
typically	O
increases	O
,	O
provided	O
the	O
software	O
is	O
designed	O
to	O
utilize	O
advanced	O
hardware	O
.	O
</s>
<s>
Operating	O
systems	O
provided	O
support	O
for	O
multiple-cores	O
and	O
SMD	O
CPU	B-General_Concept
's	O
,	O
many	O
software	O
applications	O
including	O
large	O
workload	O
and	O
resource	O
intensive	O
applications	O
-	O
such	O
as	O
3-D	O
games	O
-	O
are	O
programmed	O
to	O
take	O
advantage	O
of	O
multiple	O
core	O
and	O
multi-CPU	O
systems	O
.	O
</s>
<s>
Apple	O
,	O
Intel	O
,	O
and	O
AMD	B-Device
currently	O
lead	O
the	O
market	O
with	O
multiple	O
core	O
desktop	B-Device
and	O
workstation	B-Device
CPU	B-General_Concept
's	O
.	O
</s>
<s>
Intel	O
retains	O
higher	O
frequencies	O
and	O
thus	O
has	O
the	O
fastest	O
single	O
core	O
performance	O
,	O
while	O
AMD	B-Device
is	O
often	O
the	O
leader	O
in	O
multi-threaded	O
routines	O
due	O
to	O
a	O
more	O
advanced	O
ISA	O
and	O
the	O
process	O
node	O
the	O
CPU	B-General_Concept
's	O
are	O
fabricated	O
on	O
.	O
</s>
<s>
Multiprocessing	B-Operating_System
concepts	O
for	O
multi-core/multi	O
-cpu	O
configurations	O
are	O
related	O
to	O
Amdahl	B-Operating_System
's	I-Operating_System
law	I-Operating_System
.	O
</s>
<s>
In	O
1997	O
,	O
about	O
55%	O
of	O
all	O
CPUs	O
sold	O
in	O
the	O
world	O
were	O
8-bit	O
microcontrollers	B-Architecture
,	O
of	O
which	O
over	O
2billion	O
were	O
sold	O
.	O
</s>
<s>
Of	O
all	O
the	O
32-bit	O
CPUs	O
sold	O
,	O
about	O
2%	O
are	O
used	O
in	O
desktop	B-Device
or	O
laptop	B-Device
personal	B-Device
computers	I-Device
.	O
</s>
<s>
Most	O
microprocessors	B-Architecture
are	O
used	O
in	O
embedded	B-Architecture
control	I-Architecture
applications	O
such	O
as	O
household	O
appliances	O
,	O
automobiles	O
,	O
and	O
computer	O
peripherals	O
.	O
</s>
<s>
Taken	O
as	O
a	O
whole	O
,	O
the	O
average	O
price	O
for	O
a	O
microprocessor	B-Architecture
,	O
microcontroller	B-Architecture
,	O
or	O
DSP	B-Architecture
is	O
just	O
over	O
.	O
</s>
<s>
In	O
2003	O
,	O
about	O
$44billion	O
(	O
equivalent	O
to	O
about	O
$	O
billion	O
in	O
)	O
worth	O
of	O
microprocessors	B-Architecture
were	O
manufactured	O
and	O
sold	O
.	O
</s>
<s>
Although	O
about	O
half	O
of	O
that	O
money	O
was	O
spent	O
on	O
CPUs	O
used	O
in	O
desktop	B-Device
or	O
laptop	B-Device
personal	B-Device
computers	I-Device
,	O
those	O
count	O
for	O
only	O
about	O
2%	O
of	O
all	O
CPUs	O
sold	O
.	O
</s>
<s>
The	O
quality-adjusted	O
price	O
of	O
laptop	B-Device
microprocessors	B-Architecture
improved	O
25%	O
to	O
35%	O
per	O
year	O
in	O
2004	O
–	O
2010	O
,	O
and	O
the	O
rate	O
of	O
improvement	O
slowed	O
to	O
15%	O
to	O
25%	O
per	O
year	O
in	O
2010	O
–	O
2013	O
.	O
</s>
<s>
Most	O
new	O
CPUs	O
produced	O
each	O
year	O
are	O
embedded	B-Architecture
.	O
</s>
