<s>
In	O
processor	B-General_Concept
design	I-General_Concept
,	O
microcode	B-Device
is	O
a	O
technique	O
that	O
interposes	O
an	O
intermediate	O
layer	O
between	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
hardware	O
and	O
the	O
programmer-visible	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
of	O
a	O
computer	O
.	O
</s>
<s>
Microcode	B-Device
is	O
a	O
layer	O
of	O
hardware-level	O
instructions	O
that	O
implement	O
higher-level	O
machine	B-Language
code	I-Language
instructions	O
or	O
internal	O
finite-state	B-Architecture
machine	I-Architecture
sequencing	O
in	O
many	O
digital	B-General_Concept
processing	I-General_Concept
elements	O
.	O
</s>
<s>
Microcode	B-Device
is	O
used	O
in	O
general-purpose	O
central	B-General_Concept
processing	I-General_Concept
units	I-General_Concept
,	O
although	O
in	O
current	O
desktop	O
CPUs	B-General_Concept
,	O
it	O
can	O
be	O
a	O
fallback	O
path	O
for	O
cases	O
that	O
the	O
faster	O
hardwired	O
control	B-General_Concept
unit	I-General_Concept
cannot	O
handle	O
.	O
</s>
<s>
Microcode	B-Device
typically	O
resides	O
in	O
special	O
high-speed	O
memory	O
and	O
translates	O
machine	B-Language
instructions	I-Language
,	O
state	B-Architecture
machine	I-Architecture
data	O
,	O
or	O
other	O
input	O
into	O
sequences	O
of	O
detailed	O
circuit-level	O
operations	O
.	O
</s>
<s>
It	O
separates	O
the	O
machine	B-Language
instructions	I-Language
from	O
the	O
underlying	O
electronics	O
so	O
that	O
instructions	O
can	O
be	O
designed	O
and	O
altered	O
more	O
freely	O
.	O
</s>
<s>
Writing	O
microcode	B-Device
is	O
often	O
called	O
microprogramming	B-Device
and	O
the	O
microcode	B-Device
in	O
a	O
particular	O
processor	O
implementation	O
is	O
sometimes	O
called	O
a	O
microprogram	B-Device
.	I-Device
</s>
<s>
More	O
extensive	O
microcoding	B-Device
allows	O
small	O
and	O
simple	O
microarchitectures	B-General_Concept
to	O
emulate	B-Application
more	O
powerful	O
architectures	O
with	O
wider	O
word	O
length	O
,	O
more	O
execution	B-General_Concept
units	I-General_Concept
and	O
so	O
on	O
,	O
which	O
is	O
a	O
relatively	O
simple	O
way	O
to	O
achieve	O
software	O
compatibility	O
between	O
different	O
products	O
in	O
a	O
processor	O
family	O
.	O
</s>
<s>
Some	O
hardware	O
vendors	O
,	O
especially	O
IBM/Lenovo	O
,	O
use	O
the	O
term	O
microcode	B-Device
as	O
a	O
synonym	O
for	O
firmware	B-Application
.	O
</s>
<s>
In	O
that	O
way	O
,	O
all	O
code	O
within	O
a	O
device	O
is	O
termed	O
microcode	B-Device
regardless	O
of	O
it	O
being	O
microcode	B-Device
or	O
machine	B-Language
code	I-Language
;	O
for	O
example	O
,	O
hard	B-Device
disk	I-Device
drives	I-Device
are	O
said	O
to	O
have	O
their	O
microcode	B-Device
updated	O
,	O
though	O
they	O
typically	O
contain	O
both	O
microcode	B-Device
and	O
firmware	B-Application
.	O
</s>
<s>
The	O
lowest	O
layer	O
in	O
a	O
computer	O
's	O
software	O
stack	O
is	O
traditionally	O
raw	O
machine	B-Language
code	I-Language
instructions	O
for	O
the	O
processor	O
.	O
</s>
<s>
In	O
microcoded	B-Device
processors	O
,	O
fetching	O
and	O
decoding	O
those	O
instructions	O
,	O
and	O
executing	O
them	O
,	O
may	O
be	O
done	O
by	O
microcode	B-Device
.	O
</s>
<s>
To	O
avoid	O
confusion	O
,	O
each	O
microprogram-related	O
element	O
is	O
differentiated	O
by	O
the	O
micro	O
prefix	O
:	O
microinstruction	B-Device
,	O
microassembler	B-Application
,	O
microprogrammer	O
,	O
microarchitecture	B-General_Concept
,	O
etc	O
.	O
</s>
<s>
Complex	O
digital	B-Architecture
processors	I-Architecture
may	O
also	O
employ	O
more	O
than	O
one	O
(	O
possibly	O
microcode-based	O
)	O
control	B-General_Concept
unit	I-General_Concept
in	O
order	O
to	O
delegate	O
sub-tasks	O
that	O
must	O
be	O
performed	O
essentially	O
asynchronously	O
in	O
parallel	O
.	O
</s>
<s>
For	O
example	O
,	O
the	O
VAX	B-Device
9000	I-Device
has	O
a	O
IBox	O
unit	O
to	O
fetch	O
and	O
decode	O
instructions	O
,	O
which	O
it	O
hands	O
to	O
a	O
microcoded	B-Device
EBox	O
unit	O
to	O
be	O
executed	O
,	O
and	O
the	O
VAX	B-Device
8800	I-Device
has	O
both	O
a	O
microcoded	B-Device
IBox	O
and	O
a	O
microcoded	B-Device
EBox	O
.	O
</s>
<s>
A	O
high-level	O
programmer	O
,	O
or	O
even	O
an	O
assembly	B-Language
language	I-Language
programmer	O
,	O
does	O
not	O
normally	O
see	O
or	O
change	O
microcode	B-Device
.	O
</s>
<s>
Unlike	O
machine	B-Language
code	I-Language
,	O
which	O
often	O
retains	O
some	O
backward	B-General_Concept
compatibility	I-General_Concept
among	O
different	O
processors	O
in	O
a	O
family	O
,	O
microcode	B-Device
only	O
runs	O
on	O
the	O
exact	O
electronic	O
circuitry	O
for	O
which	O
it	O
is	O
designed	O
,	O
as	O
it	O
constitutes	O
an	O
inherent	O
part	O
of	O
the	O
particular	O
processor	B-General_Concept
design	I-General_Concept
itself	O
.	O
</s>
<s>
Engineers	O
normally	O
write	O
the	O
microcode	B-Device
during	O
the	O
design	O
phase	O
of	O
a	O
processor	O
,	O
storing	O
it	O
in	O
a	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
or	O
programmable	O
logic	O
array	O
(	O
PLA	O
)	O
structure	O
,	O
or	O
in	O
a	O
combination	O
of	O
both	O
.	O
</s>
<s>
However	O
,	O
machines	O
also	O
exist	O
that	O
have	O
some	O
or	O
all	O
microcode	B-Device
stored	O
in	O
static	B-Architecture
random-access	I-Architecture
memory	I-Architecture
(	O
SRAM	O
)	O
or	O
flash	B-Device
memory	I-Device
.	O
</s>
<s>
This	O
is	O
traditionally	O
denoted	O
as	O
writeable	O
control	B-General_Concept
store	I-General_Concept
in	O
the	O
context	O
of	O
computers	O
,	O
which	O
can	O
be	O
either	O
read-only	O
or	O
read-write	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
In	O
the	O
latter	O
case	O
,	O
the	O
CPU	O
initialization	O
process	O
loads	O
microcode	B-Device
into	O
the	O
control	B-General_Concept
store	I-General_Concept
from	O
another	O
storage	O
medium	O
,	O
with	O
the	O
possibility	O
of	O
altering	O
the	O
microcode	B-Device
to	O
correct	O
bugs	B-Error_Name
in	O
the	O
instruction	B-General_Concept
set	I-General_Concept
,	O
or	O
to	O
implement	O
new	O
machine	B-Language
instructions	I-Language
.	O
</s>
<s>
Microprograms	B-Device
consist	O
of	O
series	O
of	O
microinstructions	B-Device
,	O
which	O
control	O
the	O
CPU	O
at	O
a	O
very	O
fundamental	O
level	O
of	O
hardware	O
circuitry	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
single	O
typical	O
horizontal	O
microinstruction	B-Device
might	O
specify	O
the	O
following	O
operations	O
:	O
</s>
<s>
To	O
simultaneously	O
control	O
all	O
processor	O
's	O
features	O
in	O
one	O
cycle	O
,	O
the	O
microinstruction	B-Device
is	O
often	O
wider	O
than	O
50	O
bits	O
;	O
e.g.	O
,	O
128	O
bits	O
on	O
a	O
360/85	B-Device
with	O
an	O
emulator	B-Application
feature	O
.	O
</s>
<s>
Microprograms	B-Device
are	O
carefully	O
designed	O
and	O
optimized	O
for	O
the	O
fastest	O
possible	O
execution	O
,	O
as	O
a	O
slow	O
microprogram	B-Device
would	O
result	O
in	O
a	O
slow	O
machine	B-Language
instruction	I-Language
and	O
degraded	O
performance	O
for	O
related	O
application	O
programs	O
that	O
use	O
such	O
instructions	O
.	O
</s>
<s>
Microcode	B-Device
was	O
originally	O
developed	O
as	O
a	O
simpler	O
method	O
of	O
developing	O
the	O
control	O
logic	O
for	O
a	O
computer	O
.	O
</s>
<s>
Initially	O
,	O
CPU	B-Language
instruction	I-Language
sets	O
were	O
hardwired	O
.	O
</s>
<s>
Each	O
step	O
needed	O
to	O
fetch	O
,	O
decode	O
,	O
and	O
execute	O
the	O
machine	B-Language
instructions	I-Language
(	O
including	O
any	O
operand	O
address	O
calculations	O
,	O
reads	O
,	O
and	O
writes	O
)	O
was	O
controlled	O
directly	O
by	O
combinational	O
logic	O
and	O
rather	O
minimal	O
sequential	O
state	B-Architecture
machine	I-Architecture
circuitry	O
.	O
</s>
<s>
While	O
such	O
hard-wired	O
processors	O
were	O
very	O
efficient	O
,	O
the	O
need	O
for	O
powerful	O
instruction	B-General_Concept
sets	I-General_Concept
with	O
multi-step	O
addressing	O
and	O
complex	O
operations	O
(	O
see	O
below	O
)	O
made	O
them	O
difficult	O
to	O
design	O
and	O
debug	O
;	O
highly	O
encoded	O
and	O
varied-length	O
instructions	O
can	O
contribute	O
to	O
this	O
as	O
well	O
,	O
especially	O
when	O
very	O
irregular	O
encodings	O
are	O
used	O
.	O
</s>
<s>
Microcode	B-Device
simplified	O
the	O
job	O
by	O
allowing	O
much	O
of	O
the	O
processor	O
's	O
behaviour	O
and	O
programming	O
model	O
to	O
be	O
defined	O
via	O
microprogram	B-Device
routines	O
rather	O
than	O
by	O
dedicated	O
circuitry	O
.	O
</s>
<s>
Even	O
late	O
in	O
the	O
design	O
process	O
,	O
microcode	B-Device
could	O
easily	O
be	O
changed	O
,	O
whereas	O
hard-wired	O
CPU	B-General_Concept
designs	I-General_Concept
were	O
very	O
cumbersome	O
to	O
change	O
.	O
</s>
<s>
Thus	O
,	O
this	O
greatly	O
facilitated	O
CPU	B-General_Concept
design	I-General_Concept
.	O
</s>
<s>
From	O
the	O
1940s	O
to	O
the	O
late	O
1970s	O
,	O
a	O
large	O
portion	O
of	O
programming	O
was	O
done	O
in	O
assembly	B-Language
language	I-Language
;	O
higher-level	O
instructions	O
mean	O
greater	O
programmer	O
productivity	O
,	O
so	O
an	O
important	O
advantage	O
of	O
microcode	B-Device
was	O
the	O
relative	O
ease	O
by	O
which	O
powerful	O
machine	B-Language
instructions	I-Language
can	O
be	O
defined	O
.	O
</s>
<s>
The	O
ultimate	O
extension	O
of	O
this	O
are	O
"	O
Directly	O
Executable	O
High	O
Level	O
Language	O
"	O
designs	O
,	O
in	O
which	O
each	O
statement	O
of	O
a	O
high-level	O
language	O
such	O
as	O
PL/I	B-Language
is	O
entirely	O
and	O
directly	O
executed	O
by	O
microcode	B-Device
,	O
without	O
compilation	O
.	O
</s>
<s>
The	O
IBM	B-Device
Future	I-Device
Systems	I-Device
project	I-Device
and	O
Data	O
General	O
Fountainhead	O
Processor	O
are	O
examples	O
of	O
this	O
.	O
</s>
<s>
During	O
the	O
1970s	O
,	O
CPU	O
speeds	O
grew	O
more	O
quickly	O
than	O
memory	O
speeds	O
and	O
numerous	O
techniques	O
such	O
as	O
memory	B-General_Concept
block	I-General_Concept
transfer	I-General_Concept
,	O
memory	B-General_Concept
pre-fetch	I-General_Concept
and	O
multi-level	O
caches	O
were	O
used	O
to	O
alleviate	O
this	O
.	O
</s>
<s>
High-level	O
machine	B-Language
instructions	I-Language
,	O
made	O
possible	O
by	O
microcode	B-Device
,	O
helped	O
further	O
,	O
as	O
fewer	O
more	O
complex	O
machine	B-Language
instructions	I-Language
require	O
less	O
memory	O
bandwidth	O
.	O
</s>
<s>
For	O
example	O
,	O
an	O
operation	O
on	O
a	O
character	O
string	O
can	O
be	O
done	O
as	O
a	O
single	O
machine	B-Language
instruction	I-Language
,	O
thus	O
avoiding	O
multiple	O
instruction	O
fetches	O
.	O
</s>
<s>
Architectures	O
with	O
instruction	B-General_Concept
sets	I-General_Concept
implemented	O
by	O
complex	O
microprograms	B-Device
included	O
the	O
IBM	B-Application
System/360	I-Application
and	O
Digital	O
Equipment	O
Corporation	O
VAX	B-Device
.	O
</s>
<s>
The	O
approach	O
of	O
increasingly	O
complex	O
microcode-implemented	O
instruction	B-General_Concept
sets	I-General_Concept
was	O
later	O
called	O
complex	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
CISC	B-Architecture
)	O
.	O
</s>
<s>
An	O
alternate	O
approach	O
,	O
used	O
in	O
many	O
microprocessors	B-Architecture
,	O
is	O
to	O
use	O
one	O
or	O
more	O
programmable	O
logic	O
array	O
(	O
PLA	O
)	O
or	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
(	O
instead	O
of	O
combinational	O
logic	O
)	O
mainly	O
for	O
instruction	O
decoding	O
,	O
and	O
let	O
a	O
simple	O
state	B-Architecture
machine	I-Architecture
(	O
without	O
much	O
,	O
or	O
any	O
,	O
microcode	B-Device
)	O
do	O
most	O
of	O
the	O
sequencing	O
.	O
</s>
<s>
The	O
MOS	B-General_Concept
Technology	I-General_Concept
6502	I-General_Concept
is	O
an	O
example	O
of	O
a	O
microprocessor	B-Architecture
using	O
a	O
PLA	O
for	O
instruction	O
decode	O
and	O
sequencing	O
.	O
</s>
<s>
The	O
PLA	O
is	O
visible	O
in	O
photomicrographs	O
of	O
the	O
chip	O
,	O
and	O
its	O
operation	O
can	O
be	O
seen	O
in	O
the	O
transistor-level	O
simulation	O
.	O
</s>
<s>
Microprogramming	B-Device
is	O
still	O
used	O
in	O
modern	O
CPU	B-General_Concept
designs	I-General_Concept
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
after	O
the	O
microcode	B-Device
is	O
debugged	O
in	O
simulation	O
,	O
logic	O
functions	O
are	O
substituted	O
for	O
the	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
Logic	O
functions	O
are	O
often	O
faster	O
and	O
less	O
expensive	O
than	O
the	O
equivalent	O
microprogram	B-Device
memory	O
.	O
</s>
<s>
A	O
processor	O
's	O
microprograms	B-Device
operate	O
on	O
a	O
more	O
primitive	O
,	O
totally	O
different	O
,	O
and	O
much	O
more	O
hardware-oriented	O
architecture	O
than	O
the	O
assembly	O
instructions	O
visible	O
to	O
normal	O
programmers	O
.	O
</s>
<s>
In	O
coordination	O
with	O
the	O
hardware	O
,	O
the	O
microcode	B-Device
implements	O
the	O
programmer-visible	O
architecture	O
.	O
</s>
<s>
This	O
makes	O
it	O
easier	O
to	O
implement	O
a	O
given	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
on	O
a	O
wide	O
variety	O
of	O
underlying	O
hardware	O
micro-architectures	B-General_Concept
.	O
</s>
<s>
The	O
IBM	B-Application
System/360	I-Application
has	O
a	O
32-bit	O
architecture	O
with	O
16	O
general-purpose	O
registers	O
,	O
but	O
most	O
of	O
the	O
System/360	B-Application
implementations	O
use	O
hardware	O
that	O
implements	O
a	O
much	O
simpler	O
underlying	O
microarchitecture	B-General_Concept
;	O
for	O
example	O
,	O
the	O
System/360	B-Device
Model	I-Device
30	I-Device
has	O
8-bit	O
data	O
paths	O
to	O
the	O
arithmetic	B-General_Concept
logic	I-General_Concept
unit	I-General_Concept
(	O
ALU	B-General_Concept
)	O
and	O
main	O
memory	O
and	O
implemented	O
the	O
general-purpose	O
registers	O
in	O
a	O
special	O
unit	O
of	O
higher-speed	O
core	O
memory	O
,	O
and	O
the	O
System/360	B-Device
Model	I-Device
40	I-Device
has	O
8-bit	O
data	O
paths	O
to	O
the	O
ALU	B-General_Concept
and	O
16-bit	O
data	O
paths	O
to	O
main	O
memory	O
and	O
also	O
implemented	O
the	O
general-purpose	O
registers	O
in	O
a	O
special	O
unit	O
of	O
higher-speed	O
core	O
memory	O
.	O
</s>
<s>
The	O
Model	B-Device
50	I-Device
has	O
full	O
32-bit	O
data	O
paths	O
and	O
implements	O
the	O
general-purpose	O
registers	O
in	O
a	O
special	O
unit	O
of	O
higher-speed	O
core	O
memory	O
.	O
</s>
<s>
The	O
Model	O
65	O
through	O
the	O
Model	O
195	O
have	O
larger	O
data	O
paths	O
and	O
implement	O
the	O
general-purpose	O
registers	O
in	O
faster	O
transistor	B-Application
circuits	O
.	O
</s>
<s>
In	O
this	O
way	O
,	O
microprogramming	B-Device
enabled	O
IBM	O
to	O
design	O
many	O
System/360	B-Application
models	O
with	O
substantially	O
different	O
hardware	O
and	O
spanning	O
a	O
wide	O
range	O
of	O
cost	O
and	O
performance	O
,	O
while	O
making	O
them	O
all	O
architecturally	O
compatible	O
.	O
</s>
<s>
A	O
similar	O
approach	O
was	O
used	O
by	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
in	O
their	O
VAX	B-Device
family	O
of	O
computers	O
.	O
</s>
<s>
As	O
a	O
result	O
,	O
different	O
VAX	B-Device
processors	O
use	O
different	O
microarchitectures	B-General_Concept
,	O
yet	O
the	O
programmer-visible	O
architecture	O
does	O
not	O
change	O
.	O
</s>
<s>
Microprogramming	B-Device
also	O
reduces	O
the	O
cost	O
of	O
field	O
changes	O
to	O
correct	O
defects	O
(	O
bugs	B-Error_Name
)	O
in	O
the	O
processor	O
;	O
a	O
bug	B-Error_Name
can	O
often	O
be	O
fixed	O
by	O
replacing	O
a	O
portion	O
of	O
the	O
microprogram	B-Device
rather	O
than	O
by	O
changes	O
being	O
made	O
to	O
hardware	O
logic	O
and	O
wiring	O
.	O
</s>
<s>
In	O
1947	O
,	O
the	O
design	O
of	O
the	O
MIT	B-Device
Whirlwind	I-Device
introduced	O
the	O
concept	O
of	O
a	O
control	B-General_Concept
store	I-General_Concept
as	O
a	O
way	O
to	O
simplify	O
computer	O
design	O
and	O
move	O
beyond	O
ad	O
hoc	O
methods	O
.	O
</s>
<s>
The	O
control	B-General_Concept
store	I-General_Concept
is	O
a	O
diode	B-General_Concept
matrix	I-General_Concept
:	O
a	O
two-dimensional	O
lattice	O
,	O
where	O
one	O
dimension	O
accepts	O
"	O
control	O
time	O
pulses	O
"	O
from	O
the	O
CPU	O
's	O
internal	O
clock	O
,	O
and	O
the	O
other	O
connects	O
to	O
control	O
signals	O
on	O
gates	O
and	O
other	O
circuits	O
.	O
</s>
<s>
Described	O
another	O
way	O
,	O
the	O
signals	O
transmitted	O
by	O
the	O
control	B-General_Concept
store	I-General_Concept
are	O
being	O
played	O
much	O
like	O
a	O
player	O
piano	O
roll	O
.	O
</s>
<s>
In	O
a	O
control	B-General_Concept
store	I-General_Concept
,	O
however	O
,	O
the	O
song	O
is	O
short	O
and	O
repeated	O
continuously	O
.	O
</s>
<s>
In	O
1951	O
,	O
Maurice	O
Wilkes	O
enhanced	O
this	O
concept	O
by	O
adding	O
conditional	B-Language
execution	O
,	O
a	O
concept	O
akin	O
to	O
a	O
conditional	B-Language
in	O
computer	O
software	O
.	O
</s>
<s>
His	O
initial	O
implementation	O
consisted	O
of	O
a	O
pair	O
of	O
matrices	O
:	O
the	O
first	O
one	O
generated	O
signals	O
in	O
the	O
manner	O
of	O
the	O
Whirlwind	B-Device
control	B-General_Concept
store	I-General_Concept
,	O
while	O
the	O
second	O
matrix	O
selected	O
which	O
row	O
of	O
signals	O
(	O
the	O
microprogram	B-Device
instruction	O
word	O
,	O
so	O
to	O
speak	O
)	O
to	O
invoke	O
on	O
the	O
next	O
cycle	O
.	O
</s>
<s>
Conditionals	B-Language
were	O
implemented	O
by	O
providing	O
a	O
way	O
that	O
a	O
single	O
line	O
in	O
the	O
control	B-General_Concept
store	I-General_Concept
could	O
choose	O
from	O
alternatives	O
in	O
the	O
second	O
matrix	O
.	O
</s>
<s>
This	O
made	O
the	O
control	O
signals	O
conditional	B-Language
on	O
the	O
detected	O
internal	O
signal	O
.	O
</s>
<s>
Wilkes	O
coined	O
the	O
term	O
microprogramming	B-Device
to	O
describe	O
this	O
feature	O
and	O
distinguish	O
it	O
from	O
a	O
simple	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
The	B-Device
Analytical	I-Device
engine	I-Device
envisioned	O
by	O
Charles	O
Babbage	O
uses	O
pegs	B-Device
inserted	I-Device
into	I-Device
rotating	I-Device
drums	I-Device
to	O
store	O
its	O
internal	O
procedures	O
.	O
</s>
<s>
The	O
EMIDEC	B-Device
1100	I-Device
reputedly	O
uses	O
a	O
hard-wired	O
control	B-General_Concept
store	I-General_Concept
consisting	O
of	O
wires	O
threaded	O
through	O
ferrite	O
cores	O
,	O
known	O
as	O
"	O
the	O
laces	O
"	O
.	O
</s>
<s>
Most	O
models	O
of	O
the	O
IBM	B-Application
System/360	I-Application
series	O
are	O
microprogrammed	O
:	O
</s>
<s>
The	O
Model	B-Device
25	I-Device
is	O
unique	O
among	O
System/360	B-Application
models	O
in	O
using	O
the	O
top	O
16K	O
bytes	O
of	O
core	O
storage	O
to	O
hold	O
the	O
control	O
storage	O
for	O
the	O
microprogram	B-Device
.	I-Device
</s>
<s>
The	O
2025	O
uses	O
a	O
16-bit	O
microarchitecture	B-General_Concept
with	O
seven	O
control	O
words	O
(	O
or	O
microinstructions	B-Device
)	O
.	O
</s>
<s>
After	O
system	O
maintenance	O
or	O
when	O
changing	O
operating	O
mode	O
,	O
the	O
microcode	B-Device
is	O
loaded	O
from	O
the	O
card	O
reader	O
,	O
tape	O
,	O
or	O
other	O
device	O
.	O
</s>
<s>
The	O
IBM	B-Device
1410	I-Device
emulation	B-Application
for	O
this	O
model	O
is	O
loaded	O
this	O
way	O
.	O
</s>
<s>
The	O
Model	B-Device
30	I-Device
uses	O
an	O
8-bit	O
microarchitecture	B-General_Concept
with	O
only	O
a	O
few	O
hardware	O
registers	O
;	O
everything	O
that	O
the	O
programmer	O
saw	O
is	O
emulated	B-Application
by	O
the	O
microprogram	B-Device
.	I-Device
</s>
<s>
The	O
microcode	B-Device
for	O
this	O
model	O
is	O
also	O
held	O
on	O
special	O
punched	O
cards	O
,	O
which	O
are	O
stored	O
inside	O
the	O
machine	O
in	O
a	O
dedicated	O
reader	O
per	O
card	O
,	O
called	O
"	O
CROS	O
"	O
units	O
(	O
Capacitor	O
Read-Only	B-Device
Storage	I-Device
)	O
.	O
</s>
<s>
Another	O
CROS	O
unit	O
is	O
added	O
for	O
machines	O
ordered	O
with	O
1401/1440/1460	O
emulation	B-Application
and	O
for	O
machines	O
ordered	O
with	O
1620	O
emulation	B-Application
.	O
</s>
<s>
The	O
Model	B-Device
40	I-Device
uses	O
56-bit	O
control	O
words	O
.	O
</s>
<s>
The	O
2040	O
box	O
implements	O
both	O
the	O
System/360	B-Application
main	O
processor	O
and	O
the	O
multiplex	O
channel	O
(	O
the	O
I/O	B-Device
processor	I-Device
)	O
.	O
</s>
<s>
The	O
Model	B-Device
50	I-Device
has	O
two	O
internal	O
datapaths	O
which	O
operated	O
in	O
parallel	O
:	O
a	O
32-bit	O
datapath	O
used	O
for	O
arithmetic	O
operations	O
,	O
and	O
an	O
8-bit	O
data	O
path	O
used	O
in	O
some	O
logical	O
operations	O
.	O
</s>
<s>
The	O
control	B-General_Concept
store	I-General_Concept
uses	O
90-bit	O
microinstructions	B-Device
.	O
</s>
<s>
The	O
Model	B-Device
85	I-Device
has	O
separate	O
instruction	O
fetch	O
(	O
I-unit	B-General_Concept
)	O
and	O
execution	O
(	O
E-unit	B-General_Concept
)	O
to	O
provide	O
high	O
performance	O
.	O
</s>
<s>
The	O
I-unit	B-General_Concept
is	O
hardware	O
controlled	O
.	O
</s>
<s>
The	O
E-unit	B-General_Concept
is	O
microprogrammed	O
;	O
the	O
control	O
words	O
are	O
108	O
bits	O
wide	O
on	O
a	O
basic	O
360/85	B-Device
and	O
wider	O
if	O
an	O
emulator	B-Application
feature	O
is	O
installed	O
.	O
</s>
<s>
The	O
NCR	B-Device
315	I-Device
is	O
microprogrammed	O
with	O
hand	O
wired	O
ferrite	O
cores	O
(	O
a	O
ROM	B-Device
)	O
pulsed	O
by	O
a	O
sequencer	O
with	O
conditional	B-Language
execution	O
.	O
</s>
<s>
The	O
Digital	O
Equipment	O
Corporation	O
PDP-11	B-Device
processors	O
,	O
with	O
the	O
exception	O
of	O
the	O
PDP-11/20	O
,	O
are	O
microprogrammed	O
.	O
</s>
<s>
Most	O
Data	B-Device
General	I-Device
Eclipse	I-Device
minicomputers	B-Architecture
are	O
microprogrammed	O
.	O
</s>
<s>
The	O
task	O
of	O
writing	O
microcode	B-Device
for	O
the	O
Eclipse	B-Device
MV/8000	I-Device
is	O
detailed	O
in	O
the	O
Pulitzer	O
Prize-winning	O
book	O
titled	O
The	O
Soul	O
of	O
a	O
New	O
Machine	O
.	O
</s>
<s>
The	O
B700	O
"	O
microprocessor	B-Architecture
"	O
execute	O
application-level	O
opcodes	O
using	O
sequences	O
of	O
16-bit	O
microinstructions	B-Device
stored	O
in	O
main	O
memory	O
;	O
each	O
of	O
these	O
is	O
either	O
a	O
register-load	O
operation	O
or	O
mapped	O
to	O
a	O
single	O
56-bit	O
"	O
nanocode	B-Device
"	O
instruction	O
stored	O
in	O
read-only	B-Device
memory	I-Device
.	O
</s>
<s>
The	O
B1700	B-Device
is	O
implemented	O
with	O
radically	O
different	O
hardware	O
including	O
bit-addressable	O
main	O
memory	O
but	O
has	O
a	O
similar	O
multi-layer	O
organisation	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
system	I-General_Concept
preloads	O
the	O
interpreter	O
for	O
whatever	O
language	O
is	O
required	O
.	O
</s>
<s>
These	O
interpreters	O
present	O
different	O
virtual	O
machines	O
for	O
COBOL	B-Application
,	O
Fortran	B-Application
,	O
etc	O
.	O
</s>
<s>
Microdata	O
produced	O
computers	O
in	O
which	O
the	O
microcode	B-Device
is	O
accessible	O
to	O
the	O
user	O
;	O
this	O
allows	O
the	O
creation	O
of	O
custom	O
assembler	B-Language
level	O
instructions	O
.	O
</s>
<s>
Microdata	O
's	O
Reality	B-Application
operating	B-General_Concept
system	I-General_Concept
design	O
makes	O
extensive	O
use	O
of	O
this	O
capability	O
.	O
</s>
<s>
The	O
Xerox	O
Alto	O
workstation	O
used	O
a	O
microcoded	B-Device
design	O
but	O
,	O
unlike	O
many	O
computers	O
,	O
the	O
microcode	B-Device
engine	O
is	O
not	O
hidden	O
from	O
the	O
programmer	O
in	O
a	O
layered	O
design	O
.	O
</s>
<s>
The	O
IBM	B-Device
System/38	I-Device
is	O
described	O
as	O
having	O
both	O
horizontal	O
and	O
vertical	O
microcode	B-Device
.	O
</s>
<s>
In	O
practice	O
,	O
the	O
processor	O
implements	O
an	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
named	O
the	O
Internal	O
Microprogrammed	O
Interface	O
(	O
IMPI	O
)	O
using	O
a	O
horizontal	O
microcode	B-Device
format	O
.	O
</s>
<s>
The	O
so-called	O
vertical	O
microcode	B-Device
layer	O
implements	O
the	O
System/38	B-Device
'	O
s	O
hardware-independent	O
Machine	O
Interface	O
instruction	B-General_Concept
set	I-General_Concept
in	O
terms	O
of	O
IMPI	O
instructions	O
.	O
</s>
<s>
Prior	O
to	O
the	O
instruction	O
of	O
the	O
IBM	B-Device
RS64	I-Device
processor	O
line	O
,	O
early	O
IBM	B-Device
AS/400	I-Device
systems	O
used	O
the	O
same	O
architecture	O
.	O
</s>
<s>
The	O
Nintendo	B-Operating_System
64	I-Operating_System
's	O
Reality	B-Application
Coprocessor	O
(	O
RCP	O
)	O
,	O
which	O
serves	O
as	O
the	O
console	O
's	O
graphics	B-Architecture
processing	I-Architecture
unit	I-Architecture
and	O
audio	O
processor	O
,	O
utilizes	O
microcode	B-Device
;	O
it	O
is	O
possible	O
to	O
implement	O
new	O
effects	O
or	O
tweak	O
the	O
processor	O
to	O
achieve	O
the	O
desired	O
output	O
.	O
</s>
<s>
Some	O
notable	O
examples	O
of	O
custom	O
RCP	O
microcode	B-Device
include	O
the	O
high-resolution	O
graphics	O
,	O
particle	O
engines	O
,	O
and	O
unlimited	O
draw	O
distances	O
found	O
in	O
Factor	O
5	O
's	O
Indiana	B-Application
Jones	I-Application
and	I-Application
the	I-Application
Infernal	I-Application
Machine	I-Application
,	O
Star	B-Application
Wars	I-Application
:	I-Application
Rogue	I-Application
Squadron	I-Application
,	O
and	O
Star	B-Application
Wars	I-Application
:	I-Application
Battle	I-Application
for	I-Application
Naboo	I-Application
;	O
and	O
the	O
full	B-Application
motion	I-Application
video	I-Application
playback	O
found	O
in	O
Angel	O
Studios	O
 '	O
Resident	B-Application
Evil	I-Application
2	I-Application
.	O
</s>
<s>
The	O
VU0	O
and	O
VU1	O
vector	O
units	O
in	O
the	O
Sony	B-Device
PlayStation	I-Device
2	I-Device
are	O
microprogrammable	O
;	O
in	O
fact	O
,	O
VU1	O
is	O
only	O
accessible	O
via	O
microcode	B-Device
for	O
the	O
first	O
several	O
generations	O
of	O
the	O
SDK	O
.	O
</s>
<s>
The	O
MicroCore	O
Labs	O
,	O
and	O
are	O
examples	O
of	O
highly	O
encoded	O
"	O
vertical	O
"	O
microsequencer	B-General_Concept
implementations	O
of	O
the	O
Intel	O
8086/8088	O
,	O
8051	O
,	O
and	O
MOS	B-General_Concept
6502	I-General_Concept
.	O
</s>
<s>
The	O
microcode	B-Device
had	O
a	O
primarily	O
vertical	O
style	O
with	O
32-bit	O
microinstructions	B-Device
.	O
</s>
<s>
One	O
of	O
Digital	O
Scientific	O
's	O
products	O
was	O
an	O
emulator	B-Application
for	O
the	O
IBM	B-Device
1130	I-Device
.	O
</s>
<s>
The	O
MCP-1600	B-General_Concept
is	O
a	O
microprocessor	B-Architecture
made	O
by	O
Western	O
Digital	O
in	O
the	O
late	O
1970s	O
through	O
the	O
early	O
1980s	O
used	O
to	O
implement	O
three	O
different	O
computer	O
architectures	O
in	O
microcode	B-Device
:	O
the	O
Pascal	B-Device
MicroEngine	I-Device
,	O
the	O
WD16	B-General_Concept
,	O
and	O
the	O
DEC	O
LSI-11	O
,	O
a	O
cost-reduced	O
PDP-11	B-Device
.	O
</s>
<s>
Earlier	O
x86	B-Operating_System
processors	O
are	O
fully	O
microcoded	B-Device
;	O
starting	O
with	O
the	O
Intel	B-General_Concept
80486	I-General_Concept
,	O
less	O
complicated	O
instructions	O
are	O
implemented	O
directly	O
in	O
hardware	O
.	O
</s>
<s>
x86	B-Operating_System
processors	O
implemented	O
patchable	O
microcode	B-Device
(	O
patch	O
by	O
BIOS	B-Operating_System
or	O
operating	B-General_Concept
system	I-General_Concept
)	O
since	O
Intel	B-Device
P6	I-Device
microarchitecture	I-Device
and	O
AMD	B-Architecture
K7	I-Architecture
microarchitecture	I-Architecture
.	O
</s>
<s>
Some	O
video	B-Device
cards	I-Device
,	O
wireless	B-General_Concept
network	I-General_Concept
interface	I-General_Concept
controllers	I-General_Concept
implemented	O
patchable	O
microcode	B-Device
(	O
patch	O
by	O
operating	B-General_Concept
system	I-General_Concept
)	O
.	O
</s>
<s>
Each	O
microinstruction	B-Device
in	O
a	O
microprogram	B-Device
provides	O
the	O
bits	O
that	O
control	O
the	O
functional	O
elements	O
that	O
internally	O
compose	O
a	O
CPU	O
.	O
</s>
<s>
Microcode	B-Device
thus	O
transforms	O
a	O
complex	O
electronic	O
design	O
challenge	O
(	O
the	O
control	O
of	O
a	O
CPU	O
)	O
into	O
a	O
less	O
complex	O
programming	O
challenge	O
.	O
</s>
<s>
An	O
I-unit	B-General_Concept
may	O
decode	O
instructions	O
in	O
hardware	O
and	O
determine	O
the	O
microcode	B-Device
address	O
for	O
processing	O
the	O
instruction	O
in	O
parallel	O
with	O
the	O
E-unit	B-General_Concept
.	O
</s>
<s>
A	O
microsequencer	B-General_Concept
picks	O
the	O
next	O
word	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
A	O
sequencer	O
is	O
mostly	O
a	O
counter	O
,	O
but	O
usually	O
also	O
has	O
some	O
way	O
to	O
jump	O
to	O
a	O
different	O
part	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
depending	O
on	O
some	O
data	O
,	O
usually	O
data	O
from	O
the	O
instruction	B-General_Concept
register	I-General_Concept
and	O
always	O
some	O
part	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
The	O
simplest	O
sequencer	O
is	O
just	O
a	O
register	B-General_Concept
loaded	O
from	O
a	O
few	O
bits	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
A	O
register	B-General_Concept
set	O
is	O
a	O
fast	O
memory	O
containing	O
the	O
data	O
of	O
the	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
It	O
may	O
include	O
the	O
program	B-General_Concept
counter	I-General_Concept
and	O
stack	O
pointer	O
,	O
and	O
may	O
also	O
include	O
other	O
registers	O
that	O
are	O
not	O
easily	O
accessible	O
to	O
the	O
application	O
programmer	O
.	O
</s>
<s>
Often	O
the	O
register	B-General_Concept
set	O
is	O
a	O
triple-ported	O
register	B-General_Concept
file	I-General_Concept
;	O
that	O
is	O
,	O
two	O
registers	O
can	O
be	O
read	O
,	O
and	O
a	O
third	O
written	O
at	O
the	O
same	O
time	O
.	O
</s>
<s>
An	O
arithmetic	B-General_Concept
and	I-General_Concept
logic	I-General_Concept
unit	I-General_Concept
performs	O
calculations	O
,	O
usually	O
addition	O
,	O
logical	O
negation	O
,	O
a	O
right	O
shift	O
,	O
and	O
logical	O
AND	O
.	O
</s>
<s>
There	O
may	O
also	O
be	O
a	O
memory	B-General_Concept
address	I-General_Concept
register	I-General_Concept
and	O
a	O
memory	B-General_Concept
data	I-General_Concept
register	I-General_Concept
,	O
used	O
to	O
access	O
the	O
main	O
computer	B-General_Concept
storage	I-General_Concept
.	O
</s>
<s>
Together	O
,	O
these	O
elements	O
form	O
an	O
"	O
execution	B-General_Concept
unit	I-General_Concept
"	O
.	O
</s>
<s>
Most	O
modern	O
CPUs	B-General_Concept
have	O
several	O
execution	B-General_Concept
units	I-General_Concept
.	O
</s>
<s>
This	O
chip	O
comes	O
in	O
a	O
fixed	O
width	O
that	O
would	O
form	O
a	O
"	O
slice	O
"	O
through	O
the	O
execution	B-General_Concept
unit	I-General_Concept
.	O
</s>
<s>
These	O
are	O
known	O
as	O
"	O
bit	B-General_Concept
slice	I-General_Concept
"	O
chips	O
.	O
</s>
<s>
The	O
AMD	B-General_Concept
Am2900	I-General_Concept
family	O
is	O
one	O
of	O
the	O
best	O
known	O
examples	O
of	O
bit	B-General_Concept
slice	I-General_Concept
elements	O
.	O
</s>
<s>
The	O
parts	O
of	O
the	O
execution	B-General_Concept
units	I-General_Concept
and	O
the	O
whole	O
execution	B-General_Concept
units	I-General_Concept
are	O
interconnected	O
by	O
a	O
bundle	O
of	O
wires	O
called	O
a	O
bus	B-General_Concept
.	O
</s>
<s>
Programmers	O
develop	O
microprograms	B-Device
,	O
using	O
basic	O
software	O
tools	O
.	O
</s>
<s>
A	O
microassembler	B-Application
allows	O
a	O
programmer	O
to	O
define	O
the	O
table	O
of	O
bits	O
symbolically	O
.	O
</s>
<s>
Because	O
of	O
its	O
close	O
relationship	O
to	O
the	O
underlying	O
architecture	O
,	O
"	O
microcode	B-Device
has	O
several	O
properties	O
that	O
make	O
it	O
difficult	O
to	O
generate	O
using	O
a	O
compiler.	O
"	O
</s>
<s>
A	O
simulator	O
program	O
is	O
intended	O
to	O
execute	O
the	O
bits	O
in	O
the	O
same	O
way	O
as	O
the	O
electronics	O
,	O
and	O
allows	O
much	O
more	O
freedom	O
to	O
debug	O
the	O
microprogram	B-Device
.	I-Device
</s>
<s>
After	O
the	O
microprogram	B-Device
is	O
finalized	O
,	O
and	O
extensively	O
tested	O
,	O
it	O
is	O
sometimes	O
used	O
as	O
the	O
input	O
to	O
a	O
computer	O
program	O
that	O
constructs	O
logic	O
to	O
produce	O
the	O
same	O
data	O
.	O
</s>
<s>
Even	O
without	O
fully	O
optimal	O
logic	O
,	O
heuristically	O
optimized	O
logic	O
can	O
vastly	O
reduce	O
the	O
number	O
of	O
transistors	B-Application
from	O
the	O
number	O
needed	O
for	O
a	O
read-only	B-Device
memory	I-Device
(	O
ROM	B-Device
)	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
Microcode	B-Device
can	O
be	O
characterized	O
as	O
horizontal	O
or	O
vertical	O
,	O
referring	O
primarily	O
to	O
whether	O
each	O
microinstruction	B-Device
controls	O
CPU	O
elements	O
with	O
little	O
or	O
no	O
decoding	O
(	O
horizontal	O
microcode	B-Device
)	O
or	O
requires	O
extensive	O
decoding	O
by	O
combinatorial	B-Application
logic	I-Application
before	O
doing	O
so	O
(	O
vertical	O
microcode	B-Device
)	O
.	O
</s>
<s>
Consequently	O
,	O
each	O
horizontal	O
microinstruction	B-Device
is	O
wider	O
(	O
contains	O
more	O
bits	O
)	O
and	O
occupies	O
more	O
storage	O
space	O
than	O
a	O
vertical	O
microinstruction	B-Device
.	O
</s>
<s>
"	O
Horizontal	O
microcode	B-Device
has	O
several	O
discrete	O
micro-operations	B-General_Concept
that	O
are	O
combined	O
in	O
a	O
single	O
microinstruction	B-Device
for	O
simultaneous	O
operation.	O
"	O
</s>
<s>
Horizontal	O
microcode	B-Device
is	O
typically	O
contained	O
in	O
a	O
fairly	O
wide	O
control	B-General_Concept
store	I-General_Concept
;	O
it	O
is	O
not	O
uncommon	O
for	O
each	O
word	O
to	O
be	O
108	O
bits	O
or	O
more	O
.	O
</s>
<s>
On	O
each	O
tick	O
of	O
a	O
sequencer	O
clock	O
a	O
microcode	B-Device
word	O
is	O
read	O
,	O
decoded	O
,	O
and	O
used	O
to	O
control	O
the	O
functional	O
elements	O
that	O
make	O
up	O
the	O
CPU	O
.	O
</s>
<s>
In	O
a	O
typical	O
implementation	O
a	O
horizontal	O
microprogram	B-Device
word	O
comprises	O
fairly	O
tightly	O
defined	O
groups	O
of	O
bits	O
.	O
</s>
<s>
For	O
this	O
type	O
of	O
micromachine	O
to	O
implement	O
a	O
JUMP	O
instruction	O
with	O
the	O
address	O
following	O
the	O
opcode	O
,	O
the	O
microcode	B-Device
might	O
require	O
two	O
clock	O
ticks	O
.	O
</s>
<s>
The	O
engineer	O
designing	O
it	O
would	O
write	O
microassembler	B-Application
source	O
code	O
looking	O
something	O
like	O
this	O
:	O
</s>
<s>
For	O
each	O
tick	O
it	O
is	O
common	O
to	O
find	O
that	O
only	O
some	O
portions	O
of	O
the	O
CPU	O
are	O
used	O
,	O
with	O
the	O
remaining	O
groups	O
of	O
bits	O
in	O
the	O
microinstruction	B-Device
being	O
no-ops	O
.	O
</s>
<s>
With	O
careful	O
design	O
of	O
hardware	O
and	O
microcode	B-Device
,	O
this	O
property	O
can	O
be	O
exploited	O
to	O
parallelise	O
operations	O
that	O
use	O
different	O
areas	O
of	O
the	O
CPU	O
;	O
for	O
example	O
,	O
in	O
the	O
case	O
above	O
,	O
the	O
ALU	B-General_Concept
is	O
not	O
required	O
during	O
the	O
first	O
tick	O
,	O
so	O
it	O
could	O
potentially	O
be	O
used	O
to	O
complete	O
an	O
earlier	O
arithmetic	O
instruction	O
.	O
</s>
<s>
In	O
vertical	O
microcode	B-Device
,	O
each	O
microinstruction	B-Device
is	O
significantly	O
encoded	O
,	O
that	O
is	O
,	O
the	O
bit	O
fields	O
generally	O
pass	O
through	O
intermediate	O
combinatory	B-Application
logic	I-Application
that	O
,	O
in	O
turn	O
,	O
generates	O
the	O
control	O
and	O
sequencing	O
signals	O
for	O
internal	O
CPU	O
elements	O
(	O
ALU	B-General_Concept
,	O
registers	O
,	O
etc	O
.	O
)	O
.	O
</s>
<s>
This	O
is	O
in	O
contrast	O
with	O
horizontal	O
microcode	B-Device
,	O
in	O
which	O
the	O
bit	O
fields	O
either	O
directly	O
produce	O
the	O
control	O
and	O
sequencing	O
signals	O
or	O
are	O
only	O
minimally	O
encoded	O
.	O
</s>
<s>
Consequently	O
,	O
vertical	O
microcode	B-Device
requires	O
smaller	O
instruction	O
lengths	O
and	O
less	O
storage	O
,	O
but	O
requires	O
more	O
time	O
to	O
decode	O
,	O
resulting	O
in	O
a	O
slower	O
CPU	O
clock	O
.	O
</s>
<s>
Some	O
vertical	O
microcode	B-Device
is	O
just	O
the	O
assembly	B-Language
language	I-Language
of	O
a	O
simple	O
conventional	O
computer	O
that	O
is	O
emulating	B-Application
a	O
more	O
complex	O
computer	O
.	O
</s>
<s>
Some	O
processors	O
,	O
such	O
as	O
DEC	B-Device
Alpha	B-Device
processors	I-Device
and	O
the	O
CMOS	O
microprocessors	B-Architecture
on	O
later	O
IBM	O
mainframes	O
System/390	B-Device
and	O
z/Architecture	B-Device
,	O
use	O
machine	B-Language
code	I-Language
,	O
running	O
in	O
a	O
special	O
mode	O
that	O
gives	O
it	O
access	O
to	O
special	O
instructions	O
,	O
special	O
registers	O
,	O
and	O
other	O
hardware	O
resources	O
unavailable	O
to	O
regular	O
machine	B-Language
code	I-Language
,	O
to	O
implement	O
some	O
instructions	O
and	O
other	O
functions	O
,	O
such	O
as	O
page	O
table	O
walks	O
on	O
Alpha	B-Device
processors	I-Device
.	O
</s>
<s>
This	O
is	O
called	O
PALcode	B-General_Concept
on	O
Alpha	B-Device
processors	I-Device
and	O
millicode	B-General_Concept
on	O
IBM	O
mainframe	O
processors	O
.	O
</s>
<s>
Another	O
form	O
of	O
vertical	O
microcode	B-Device
has	O
two	O
fields	O
:	O
</s>
<s>
The	O
field	O
select	O
selects	O
which	O
part	O
of	O
the	O
CPU	O
will	O
be	O
controlled	O
by	O
this	O
word	O
of	O
the	O
control	B-General_Concept
store	I-General_Concept
.	O
</s>
<s>
With	O
this	O
type	O
of	O
microcode	B-Device
,	O
a	O
designer	O
explicitly	O
chooses	O
to	O
make	O
a	O
slower	O
CPU	O
to	O
save	O
money	O
by	O
reducing	O
the	O
unused	O
bits	O
in	O
the	O
control	B-General_Concept
store	I-General_Concept
;	O
however	O
,	O
the	O
reduced	O
complexity	O
may	O
increase	O
the	O
CPU	O
's	O
clock	O
frequency	O
,	O
which	O
lessens	O
the	O
effect	O
of	O
an	O
increased	O
number	O
of	O
cycles	O
per	O
instruction	O
.	O
</s>
<s>
As	O
transistors	B-Application
grew	O
cheaper	O
,	O
horizontal	O
microcode	B-Device
came	O
to	O
dominate	O
the	O
design	O
of	O
CPUs	B-General_Concept
using	O
microcode	B-Device
,	O
with	O
vertical	O
microcode	B-Device
being	O
used	O
less	O
often	O
.	O
</s>
<s>
When	O
both	O
vertical	O
and	O
horizontal	O
microcode	B-Device
are	O
used	O
,	O
the	O
horizontal	O
microcode	B-Device
may	O
be	O
referred	O
to	O
as	O
nanocode	B-Device
or	O
picocode	B-Device
.	O
</s>
<s>
A	O
few	O
computers	O
were	O
built	O
using	O
writable	O
microcode	B-Device
.	O
</s>
<s>
In	O
this	O
design	O
,	O
rather	O
than	O
storing	O
the	O
microcode	B-Device
in	O
ROM	B-Device
or	O
hard-wired	O
logic	O
,	O
the	O
microcode	B-Device
is	O
stored	O
in	O
a	O
RAM	O
called	O
a	O
writable	O
control	B-General_Concept
store	I-General_Concept
or	O
WCS	O
.	O
</s>
<s>
Such	O
a	O
computer	O
is	O
sometimes	O
called	O
a	O
writable	O
instruction	B-General_Concept
set	I-General_Concept
computer	O
(	O
WISC	O
)	O
.	O
</s>
<s>
Many	O
experimental	O
prototype	O
computers	O
use	O
writable	O
control	B-General_Concept
stores	I-General_Concept
;	O
there	O
are	O
also	O
commercial	O
machines	O
that	O
use	O
writable	O
microcode	B-Device
,	O
such	O
as	O
the	O
Burroughs	B-Device
Small	I-Device
Systems	I-Device
,	O
early	O
Xerox	O
workstations	O
,	O
the	O
DEC	B-Device
VAX	I-Device
8800	O
(	O
Nautilus	O
)	O
family	O
,	O
the	O
Symbolics	O
L	O
-	O
and	O
G-machines	O
,	O
a	O
number	O
of	O
IBM	B-Application
System/360	I-Application
and	O
System/370	B-Device
implementations	O
,	O
some	O
DEC	B-Device
PDP-10	I-Device
machines	O
,	O
and	O
the	O
Data	B-Device
General	I-Device
Eclipse	I-Device
MV/8000	I-Device
.	O
</s>
<s>
Many	O
more	O
machines	O
offer	O
user-programmable	O
writable	O
control	B-General_Concept
stores	I-General_Concept
as	O
an	O
option	O
,	O
including	O
the	O
HP	B-Device
2100	I-Device
,	O
DEC	O
PDP-11/60	O
and	O
Varian	O
Data	O
Machines	O
V-70	O
series	O
minicomputers	B-Architecture
.	O
</s>
<s>
The	O
IBM	B-Device
System/370	I-Device
includes	O
a	O
facility	O
called	O
Initial-Microprogram	O
Load	O
(	O
IML	O
or	O
IMPL	O
)	O
that	O
can	O
be	O
invoked	O
from	O
the	O
console	O
,	O
as	O
part	O
of	O
power-on	O
reset	O
(	O
POR	O
)	O
or	O
from	O
another	O
processor	O
in	O
a	O
tightly	B-Operating_System
coupled	I-Operating_System
multiprocessor	B-Operating_System
complex	O
.	O
</s>
<s>
Some	O
commercial	O
machines	O
,	O
for	O
example	O
IBM	O
360/85	O
,	O
have	O
both	O
a	O
read-only	B-Device
storage	I-Device
and	O
a	O
writable	O
control	B-General_Concept
store	I-General_Concept
for	O
microcode	B-Device
.	O
</s>
<s>
WCS	O
offers	O
several	O
advantages	O
including	O
the	O
ease	O
of	O
patching	O
the	O
microprogram	B-Device
and	O
,	O
for	O
certain	O
hardware	O
generations	O
,	O
faster	O
access	O
than	O
ROMs	O
can	O
provide	O
.	O
</s>
<s>
Starting	O
with	O
the	O
Pentium	B-Device
Pro	I-Device
in	O
1995	O
,	O
several	O
x86	B-Operating_System
CPUs	B-General_Concept
have	O
writable	O
Intel	B-Device
Microcode	I-Device
.	O
</s>
<s>
This	O
,	O
for	O
example	O
,	O
has	O
allowed	O
bugs	B-Error_Name
in	O
the	O
Intel	B-Device
Core	I-Device
2	I-Device
and	O
Intel	B-Device
Xeon	I-Device
microcodes	B-Device
to	O
be	O
fixed	O
by	O
patching	O
their	O
microprograms	B-Device
,	O
rather	O
than	O
requiring	O
the	O
entire	O
chips	O
to	O
be	O
replaced	O
.	O
</s>
<s>
A	O
second	O
prominent	O
example	O
is	O
the	O
set	O
of	O
microcode	B-Device
patches	O
that	O
Intel	O
offered	O
for	O
some	O
of	O
their	O
processor	O
architectures	O
of	O
up	O
to	O
10	O
years	O
in	O
age	O
,	O
in	O
a	O
bid	O
to	O
counter	O
the	O
security	O
vulnerabilities	O
discovered	O
in	O
their	O
designs	O
–	O
Spectre	B-Error_Name
and	O
Meltdown	B-Architecture
–	O
which	O
went	O
public	O
at	O
the	O
start	O
of	O
2018	O
.	O
</s>
<s>
A	O
microcode	B-Device
update	O
can	O
be	O
installed	O
by	O
Linux	O
,	O
FreeBSD	B-Operating_System
,	O
Microsoft	O
Windows	O
,	O
or	O
the	O
motherboard	O
BIOS	B-Operating_System
.	O
</s>
<s>
The	O
design	O
trend	O
toward	O
heavily	O
microcoded	B-Device
processors	O
with	O
complex	O
instructions	O
began	O
in	O
the	O
early	O
1960s	O
and	O
continued	O
until	O
roughly	O
the	O
mid-1980s	O
.	O
</s>
<s>
At	O
that	O
point	O
the	O
RISC	B-Architecture
design	O
philosophy	O
started	O
becoming	O
more	O
prominent	O
.	O
</s>
<s>
A	O
CPU	O
that	O
uses	O
microcode	B-Device
generally	O
takes	O
several	O
clock	O
cycles	O
to	O
execute	O
a	O
single	O
instruction	O
,	O
one	O
clock	O
cycle	O
for	O
each	O
step	O
in	O
the	O
microprogram	B-Device
for	O
that	O
instruction	O
.	O
</s>
<s>
Some	O
CISC	B-Architecture
processors	I-Architecture
include	O
instructions	O
that	O
can	O
take	O
a	O
very	O
long	O
time	O
to	O
execute	O
.	O
</s>
<s>
Such	O
variations	O
interfere	O
with	O
both	O
interrupt	B-General_Concept
latency	I-General_Concept
and	O
,	O
what	O
is	O
far	O
more	O
important	O
in	O
modern	O
systems	O
,	O
pipelining	B-General_Concept
.	O
</s>
<s>
When	O
designing	O
a	O
new	O
processor	O
,	O
a	O
hardwired	O
control	O
RISC	B-Architecture
has	O
the	O
following	O
advantages	O
over	O
microcoded	B-Device
CISC	B-Architecture
:	O
</s>
<s>
Simpler	O
instruction	B-General_Concept
sets	I-General_Concept
allow	O
direct	O
execution	O
by	O
hardware	O
,	O
avoiding	O
the	O
performance	O
penalty	O
of	O
microcoded	B-Device
execution	O
.	O
</s>
<s>
Complex	O
microcoded	B-Device
instructions	O
may	O
require	O
many	O
clock	O
cycles	O
that	O
vary	O
,	O
and	O
are	O
difficult	O
to	O
pipeline	B-General_Concept
for	O
increased	O
performance	O
.	O
</s>
<s>
The	O
complex	O
instructions	O
in	O
heavily	O
microcoded	B-Device
implementations	O
may	O
not	O
take	O
much	O
extra	O
machine	O
resources	O
,	O
except	O
for	O
microcode	B-Device
space	O
.	O
</s>
<s>
For	O
example	O
,	O
the	O
same	O
ALU	B-General_Concept
is	O
often	O
used	O
to	O
calculate	O
an	O
effective	O
address	O
and	O
to	O
compute	O
the	O
result	O
from	O
the	O
operands	O
,	O
e.g.	O
,	O
the	O
original	O
Z80	B-General_Concept
,	O
8086	B-General_Concept
,	O
and	O
others	O
.	O
</s>
<s>
The	O
simpler	O
non-RISC	O
instructions	O
(	O
i.e.	O
,	O
involving	O
direct	O
memory	O
operands	O
)	O
are	O
frequently	O
used	O
by	O
modern	O
compilers	O
.	O
</s>
<s>
Although	O
such	O
memory	O
operations	O
,	O
often	O
with	O
varying	O
length	O
encodings	O
,	O
are	O
more	O
difficult	O
to	O
pipeline	B-General_Concept
,	O
it	O
is	O
still	O
fully	O
feasible	O
to	O
do	O
so	O
-	O
clearly	O
exemplified	O
by	O
the	O
i486	B-General_Concept
,	O
AMD	O
K5	O
,	O
Cyrix	B-General_Concept
6x86	I-General_Concept
,	O
Motorola	B-Device
68040	I-Device
,	O
etc	O
.	O
</s>
<s>
Non-RISC	O
instructions	O
inherently	O
perform	O
more	O
work	O
per	O
instruction	O
(	O
on	O
average	O
)	O
,	O
and	O
are	O
also	O
normally	O
highly	O
encoded	O
,	O
so	O
they	O
enable	O
smaller	O
overall	O
size	O
of	O
the	O
same	O
program	O
,	O
and	O
thus	O
better	O
use	O
of	O
limited	O
cache	O
memories	O
.	O
</s>
<s>
Many	O
RISC	B-Architecture
and	O
VLIW	B-General_Concept
processors	O
are	O
designed	O
to	O
execute	O
every	O
instruction	O
(	O
as	O
long	O
as	O
it	O
is	O
in	O
the	O
cache	O
)	O
in	O
a	O
single	O
cycle	O
.	O
</s>
<s>
This	O
is	O
very	O
similar	O
to	O
the	O
way	O
CPUs	B-General_Concept
with	O
microcode	B-Device
execute	O
one	O
microinstruction	B-Device
per	O
cycle	O
.	O
</s>
<s>
VLIW	B-General_Concept
processors	O
have	O
instructions	O
that	O
behave	O
similarly	O
to	O
very	O
wide	O
horizontal	O
microcode	B-Device
,	O
although	O
typically	O
without	O
such	O
fine-grained	O
control	O
over	O
the	O
hardware	O
as	O
provided	O
by	O
microcode	B-Device
.	O
</s>
<s>
RISC	B-Architecture
instructions	O
are	O
sometimes	O
similar	O
to	O
the	O
narrow	O
vertical	O
microcode	B-Device
.	O
</s>
<s>
Microcode	B-Device
has	O
been	O
popular	O
in	O
application-specific	O
processors	O
such	O
as	O
network	B-General_Concept
processors	I-General_Concept
,	O
digital	B-Architecture
signal	I-Architecture
processors	I-Architecture
,	O
channel	B-Device
controllers	I-Device
,	O
disk	B-General_Concept
controllers	I-General_Concept
,	O
network	B-Protocol
interface	I-Protocol
controllers	I-Protocol
,	O
flash	B-Device
memory	I-Device
controllers	I-Device
,	O
graphics	B-Architecture
processing	I-Architecture
units	I-Architecture
,	O
and	O
in	O
other	O
hardware	O
.	O
</s>
<s>
Modern	O
CISC	B-Architecture
implementations	O
,	O
such	O
as	O
the	O
x86	B-Operating_System
family	O
,	O
decode	O
instructions	O
into	O
dynamically	O
buffered	O
micro-operations	B-General_Concept
with	O
an	O
instruction	O
encoding	O
similar	O
to	O
RISC	B-Architecture
or	O
traditional	O
microcode	B-Device
.	O
</s>
<s>
A	O
hardwired	O
instruction	O
decode	O
unit	O
directly	O
emits	O
microoperations	B-General_Concept
for	O
common	O
x86	B-Operating_System
instructions	O
,	O
but	O
falls	O
back	O
to	O
a	O
more	O
traditional	O
microcode	B-Device
ROM	B-Device
containing	O
microoperations	B-General_Concept
for	O
more	O
complex	O
or	O
rarely	O
used	O
instructions	O
.	O
</s>
<s>
For	O
example	O
,	O
an	O
x86	B-Operating_System
might	O
look	O
up	O
microoperations	B-General_Concept
from	O
microcode	B-Device
to	O
handle	O
complex	O
multistep	O
operations	O
such	O
as	O
loop	O
or	O
string	O
instructions	O
,	O
floating-point	B-General_Concept
unit	I-General_Concept
transcendental	O
functions	O
or	O
unusual	O
values	O
such	O
as	O
denormal	B-Algorithm
numbers	I-Algorithm
,	O
and	O
special-purpose	O
instructions	O
such	O
as	O
CPUID	B-Architecture
.	O
</s>
