<s>
The	O
MicroBlaze	B-Device
is	O
a	O
soft	B-Device
microprocessor	I-Device
core	O
designed	O
for	O
Xilinx	O
field-programmable	B-Architecture
gate	I-Architecture
arrays	I-Architecture
(	O
FPGA	B-Architecture
)	O
.	O
</s>
<s>
As	O
a	O
soft-core	O
processor	O
,	O
MicroBlaze	B-Device
is	O
implemented	O
entirely	O
in	O
the	O
general-purpose	O
memory	O
and	O
logic	O
fabric	O
of	O
Xilinx	O
FPGAs	B-Architecture
.	O
</s>
<s>
MicroBlaze	B-Device
was	O
introduced	O
in	O
2002	O
.	O
</s>
<s>
In	O
terms	O
of	O
its	O
instruction	O
set	O
architecture	O
,	O
MicroBlaze	B-Device
is	O
similar	O
to	O
the	O
RISC-based	B-Architecture
DLX	B-Architecture
architecture	O
described	O
in	O
a	O
popular	O
computer	O
architecture	O
book	O
by	O
Patterson	O
and	O
Hennessy	O
.	O
</s>
<s>
With	O
few	O
exceptions	O
,	O
the	O
MicroBlaze	B-Device
can	O
issue	O
a	O
new	O
instruction	O
every	O
cycle	O
,	O
maintaining	O
single-cycle	O
throughput	O
under	O
most	O
circumstances	O
.	O
</s>
<s>
The	O
MicroBlaze	B-Device
has	O
a	O
versatile	O
interconnect	O
system	O
to	O
support	O
a	O
variety	O
of	O
embedded	O
applications	O
.	O
</s>
<s>
MicroBlaze	B-Device
's	O
primary	O
I/O	O
bus	O
,	O
the	O
AXI	B-Architecture
interconnect	I-Architecture
,	O
is	O
a	O
system-memory	O
mapped	O
transaction	O
bus	O
with	O
master	O
–	O
slave	O
capability	O
.	O
</s>
<s>
Older	O
versions	O
of	O
the	O
MicroBlaze	B-Device
used	O
the	O
CoreConnect	B-Architecture
PLB	O
bus	O
.	O
</s>
<s>
The	O
majority	O
of	O
vendor-supplied	O
and	O
third-party	O
IP	O
interface	O
to	O
AXI	O
directly	O
(	O
or	O
through	O
an	O
AXI	B-Architecture
interconnect	I-Architecture
)	O
.	O
</s>
<s>
For	O
access	O
to	O
local-memory	O
(	O
FPGA	B-Architecture
RAM	B-Architecture
)	O
,	O
MicroBlaze	B-Device
uses	O
a	O
dedicated	O
LMB	O
bus	O
,	O
which	O
provides	O
fast	O
on-chip	O
storage	O
.	O
</s>
<s>
Many	O
aspects	O
of	O
the	O
MicroBlaze	B-Device
can	O
be	O
user	O
configured	O
:	O
cache	O
size	O
,	O
pipeline	O
depth	O
(	O
3-stage	O
,	O
5-stage	O
,	O
or	O
8-stage	O
)	O
,	O
embedded	O
peripherals	O
,	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
,	O
and	O
bus-interfaces	O
can	O
be	O
customized	O
.	O
</s>
<s>
The	O
area-optimized	O
version	O
of	O
MicroBlaze	B-Device
,	O
which	O
uses	O
a	O
3-stage	O
pipeline	O
,	O
sacrifices	O
clock	O
frequency	O
for	O
reduced	O
logic	O
area	O
.	O
</s>
<s>
The	O
performance-optimized	O
version	O
expands	O
the	O
execution	O
pipeline	O
to	O
5	O
stages	O
,	O
allowing	O
top	O
speeds	O
of	O
more	O
than	O
700	O
MHz	O
(	O
on	O
Virtex	O
UltraScale+	O
FPGA	B-Architecture
family	O
)	O
.	O
</s>
<s>
Also	O
,	O
key	O
processor	B-General_Concept
instructions	I-General_Concept
which	O
are	O
rarely	O
used	O
but	O
more	O
expensive	O
to	O
implement	O
in	O
hardware	O
can	O
be	O
selectively	O
added/removed	O
(	O
e.g.	O
</s>
<s>
With	O
the	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
,	O
MicroBlaze	B-Device
is	O
capable	O
of	O
hosting	O
operating	O
systems	O
requiring	O
hardware-based	O
paging	O
and	O
protection	O
,	O
such	O
as	O
the	O
Linux	B-Operating_System
kernel	I-Operating_System
.	O
</s>
<s>
FreeRTOS	B-Operating_System
or	O
Linux	B-Operating_System
without	O
MMU	O
support	O
.	O
</s>
<s>
MicroBlaze	B-Device
's	O
overall	O
throughput	O
is	O
substantially	O
less	O
than	O
a	O
comparable	O
hard	O
CPU	O
core	O
(	O
such	O
as	O
the	O
ARM	B-Application
Cortex-A9	I-Application
in	O
the	O
Zynq	O
)	O
.	O
</s>
<s>
Xilinx	O
's	O
Vivado	B-Algorithm
Design	I-Algorithm
Suite	I-Algorithm
is	O
the	O
development	O
environment	O
for	O
building	O
current	O
MicroBlaze	B-Device
(	O
or	O
ARM	B-Architecture
-	O
see	O
Zynq	O
)	O
embedded	O
processor	O
systems	O
in	O
Xilinx	O
FPGAs	B-Architecture
.	O
</s>
<s>
Designers	O
use	O
the	O
Vivado	B-Algorithm
IP	O
Integrator	O
to	O
configure	O
and	O
build	O
the	O
hardware	O
specification	O
of	O
their	O
embedded	O
system	O
(	O
processor	O
core	O
,	O
memory-controller	O
,	O
I/O	O
peripherals	O
,	O
etc	O
.	O
)	O
</s>
<s>
The	O
IP	O
Integrator	O
converts	O
the	O
designer	O
's	O
block	O
design	O
into	O
a	O
synthesizeable	O
RTL	O
description	O
(	O
Verilog	B-Language
or	O
VHDL	B-Language
)	O
,	O
and	O
automates	O
the	O
implementation	O
of	O
the	O
embedded	O
system	O
(	O
from	O
RTL	O
to	O
the	O
bitstream-file	O
.	O
)	O
</s>
<s>
For	O
the	O
MicroBlaze	B-Device
core	O
,	O
Vivado	B-Algorithm
generates	O
an	O
encrypted	O
(	O
non	O
human-readable	O
)	O
netlist	O
.	O
</s>
<s>
Powered	O
by	O
the	O
GNU	B-Application
toolchain	I-Application
(	O
GNU	B-Application
Compiler	I-Application
Collection	I-Application
,	O
GNU	B-Language
Debugger	I-Language
)	O
,	O
the	O
SDK	O
enables	O
programmers	O
to	O
write	O
,	O
compile	O
,	O
and	O
debug	O
C/C	O
++	O
applications	O
for	O
their	O
embedded	O
system	O
.	O
</s>
<s>
Xilinx	O
's	O
tools	O
provides	O
the	O
possibility	O
of	O
running	O
software	O
in	O
simulation	O
,	O
or	O
using	O
a	O
suitable	O
FPGA-board	O
to	O
download	O
and	O
execute	O
on	O
the	O
actual	O
system	O
.	O
</s>
<s>
Purchasers	O
of	O
Vivado	B-Algorithm
are	O
granted	O
a	O
perpetual	O
license	O
to	O
use	O
MicroBlaze	B-Device
in	O
Xilinx	O
FPGAs	B-Architecture
with	O
no	O
recurring	O
royalties	O
.	O
</s>
<s>
The	O
license	O
does	O
not	O
grant	O
the	O
right	O
to	O
use	O
MicroBlaze	B-Device
outside	O
of	O
Xilinx	O
's	O
devices	O
.	O
</s>
<s>
Alternative	O
compilers	O
and	O
development	O
tools	O
have	O
been	O
made	O
available	O
from	O
Altium	B-Algorithm
but	O
an	O
EDK	O
installation	O
and	O
license	O
is	O
still	O
required	O
.	O
</s>
<s>
In	O
June	O
2009	O
,	O
MicroBlaze	B-Device
became	O
the	O
first	O
soft-CPU	O
architecture	O
to	O
be	O
merged	O
into	O
the	O
mainline	O
Linux	B-Operating_System
kernel	I-Operating_System
source	O
tree	O
.	O
</s>
<s>
As	O
of	O
September	O
2009	O
,	O
MicroBlaze	B-Device
GNU	O
tools	O
support	O
is	O
also	O
being	O
contributed	O
to	O
the	O
Free	O
Software	O
Foundation	O
's	O
mainline	O
repositories	O
.	O
</s>
<s>
Support	O
was	O
added	O
to	O
LLVM	B-Application
in	O
April	O
2010	O
,	O
but	O
subsequently	O
removed	O
in	O
July	O
2013	O
due	O
to	O
a	O
lack	O
of	O
maintainer	O
.	O
</s>
<s>
RISC-V	B-Device
(	O
A	O
number	O
of	O
open	B-License
source	I-License
soft	O
cores	O
are	O
available	O
.	O
</s>
