<s>
Micro-threads	B-Operating_System
for	O
multi-core	O
and	O
many-cores	O
processors	O
is	O
a	O
mechanism	O
to	O
hide	O
memory	B-General_Concept
latency	I-General_Concept
similar	O
to	O
multi-threading	O
architectures	O
.	O
</s>
<s>
However	O
,	O
it	O
is	O
done	O
in	O
software	O
for	O
multi-core	O
processors	O
such	O
as	O
the	O
Cell	B-General_Concept
Broadband	I-General_Concept
Engine	I-General_Concept
to	O
dynamically	O
hide	O
latencies	O
that	O
occur	O
due	O
to	O
memory	B-General_Concept
latency	I-General_Concept
or	O
I/O	O
operations	O
.	O
</s>
<s>
Micro-threads	B-Operating_System
mainly	O
hide	O
memory	B-General_Concept
latency	I-General_Concept
inside	O
each	O
core	O
by	O
over	O
lapping	O
computations	O
with	O
memory	O
requests	O
.	O
</s>
<s>
The	O
main	O
difference	O
between	O
micro-threads	B-Operating_System
and	O
current	O
threading	O
models	O
is	O
that	O
micro-threads	B-Operating_System
context	O
switching	O
overhead	O
is	O
very	O
small	O
.	O
</s>
<s>
For	O
example	O
,	O
the	O
overhead	O
micro-threads	B-Operating_System
implementation	O
on	O
Cell	B-General_Concept
Broadband	I-General_Concept
Engine	I-General_Concept
is	O
160	O
nano	O
seconds	O
;	O
meanwhile	O
,	O
the	O
overhead	O
of	O
context	O
switching	O
of	O
the	O
whole	O
core	O
's	O
(	O
SPE	O
)	O
thread	O
is	O
around	O
2000	O
micro-seconds	O
.	O
</s>
<s>
First	O
,	O
micro-threads	B-Operating_System
are	O
very	O
small	O
.	O
</s>
<s>
Each	O
micro-thread	B-Operating_System
runs	O
one	O
or	O
two	O
simple	O
but	O
critical	O
functions	O
.	O
</s>
<s>
Second	O
,	O
micro-threads	B-Operating_System
context	O
include	O
only	O
the	O
register	O
file	O
of	O
the	O
core	O
currently	O
the	O
micro-thread	B-Operating_System
is	O
executing	O
on	O
.	O
</s>
<s>
Third	O
,	O
micro-threads	B-Operating_System
are	O
context	O
switched	O
to	O
core	O
's	O
dedicated	O
cache	O
,	O
which	O
makes	O
this	O
process	O
very	O
fast	O
and	O
efficient	O
.	O
</s>
<s>
As	O
microprocessors	O
are	O
becoming	O
faster	O
,	O
mainly	O
because	O
of	O
the	O
cores	O
being	O
added	O
every	O
few	O
months	O
,	O
memory	B-General_Concept
latency	I-General_Concept
gap	O
is	O
becoming	O
wider	O
.	O
</s>
<s>
Memory	B-General_Concept
latency	I-General_Concept
was	O
few	O
cycles	O
in	O
1980	O
and	O
it	O
is	O
reaching	O
nowadays	O
almost	O
1000	O
cycles	O
.	O
</s>
<s>
If	O
the	O
micro-processor	O
has	O
enough	O
cores	O
and	O
hopefully	O
they	O
are	O
not	O
sending	O
requests	O
to	O
the	O
main	O
memory	O
at	O
the	O
same	O
time	O
,	O
there	O
will	O
be	O
partial	O
aggregate	O
hiding	O
of	O
memory	B-General_Concept
latency	I-General_Concept
.	O
</s>
<s>
Context	O
switching	O
threads	O
to	O
main	O
memory	O
is	O
much	O
expensive	O
operation	O
when	O
compared	O
to	O
memory	B-General_Concept
latency	I-General_Concept
.	O
</s>
<s>
For	O
example	O
,	O
in	O
Cell	B-General_Concept
Broadband	I-General_Concept
Engine	I-General_Concept
context	O
switching	O
any	O
of	O
the	O
core	O
's	O
thread	O
takes	O
2000	O
micro-seconds	O
in	O
best	O
cases	O
.	O
</s>
<s>
Some	O
software	O
techniques	O
like	O
double	O
or	O
multi-buffering	O
may	O
solve	O
the	O
memory	B-General_Concept
latency	I-General_Concept
problem	O
.	O
</s>
<s>
In	O
addition	O
,	O
multi-buffering	O
assumes	O
that	O
memory	B-General_Concept
latency	I-General_Concept
is	O
constant	O
and	O
can	O
be	O
hidden	O
by	O
statically	O
.	O
</s>
<s>
However	O
,	O
reality	O
shows	O
that	O
memory	B-General_Concept
latency	I-General_Concept
changes	O
from	O
application	O
to	O
another	O
.	O
</s>
<s>
Currently	O
micro-threading	O
is	O
implemented	O
on	O
the	O
Cell	B-General_Concept
Broadband	I-General_Concept
Engine	I-General_Concept
.	O
</s>
<s>
Micro-threads	B-Operating_System
provide	O
a	O
very	O
good	O
solution	O
to	O
hide	O
memory	B-General_Concept
latency	I-General_Concept
best	O
based	O
on	O
the	O
run-time	O
utilization	O
of	O
the	O
microprocessor	O
.	O
</s>
<s>
For	O
example	O
,	O
if	O
the	O
memory	B-General_Concept
latency	I-General_Concept
is	O
very	O
high	O
compared	O
to	O
processing	O
and	O
context	O
switching	O
time	O
,	O
more	O
micro-threads	B-Operating_System
can	O
be	O
added	O
;	O
this	O
happens	O
when	O
large	O
data	O
chunks	O
are	O
requested	O
from	O
memory	O
or	O
there	O
are	O
many	O
memory	O
hot-spots	O
.	O
</s>
<s>
If	O
this	O
ration	O
is	O
small	O
,	O
less	O
micro-threads	B-Operating_System
might	O
be	O
introduced	O
at	O
run-time	O
.	O
</s>
<s>
Although	O
micro-threads	B-Operating_System
provide	O
a	O
promising	O
model	O
to	O
hide	O
memory	B-General_Concept
latency	I-General_Concept
for	O
multi	O
and	O
many-core	O
processors	O
,	O
it	O
has	O
some	O
important	O
critiques	O
that	O
need	O
to	O
be	O
addressed	O
:	O
</s>
<s>
Each	O
core	O
should	O
have	O
its	O
own	O
local	O
interrupt	O
facility	O
to	O
efficiently	O
schedule	O
micro-threads	B-Operating_System
.	O
</s>
<s>
Adding	O
more	O
micro-threads	B-Operating_System
per	O
core	O
increases	O
dramatically	O
load	O
on	O
microprocessor	O
's	O
shared	O
resources	O
.	O
</s>
<s>
However	O
,	O
this	O
problem	O
can	O
be	O
mitigated	O
by	O
the	O
run-time	O
system	O
's	O
monitoring	O
to	O
microprocessor	O
's	O
critical	O
measures	O
,	O
such	O
as	O
memory	B-General_Concept
latency	I-General_Concept
,	O
and	O
accordingly	O
slow	O
down	O
overall	O
execution	O
by	O
either	O
reducing	O
micro-threads	B-Operating_System
or	O
modifying	O
scheduling	O
policy	O
.	O
</s>
