<s>
A	O
metal	B-Algorithm
gate	I-Algorithm
,	O
in	O
the	O
context	O
of	O
a	O
lateral	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
(	O
MOS	O
)	O
stack	O
,	O
is	O
the	O
gate	O
electrode	O
separated	O
by	O
an	O
oxide	O
from	O
the	O
transistor	B-Application
's	O
channel	O
–	O
the	O
gate	O
material	O
is	O
made	O
from	O
a	O
metal	O
.	O
</s>
<s>
In	O
most	O
MOS	B-Architecture
transistors	I-Architecture
since	O
about	O
the	O
mid	O
1970s	O
,	O
the	O
"	O
M	O
"	O
for	O
metal	O
has	O
been	O
replaced	O
by	O
a	O
non-metal	O
gate	O
material	O
.	O
</s>
<s>
The	O
first	O
MOSFET	B-Architecture
(	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
field-effect	I-Architecture
transistor	I-Architecture
)	O
was	O
made	O
by	O
Mohamed	O
Atalla	O
and	O
Dawon	O
Kahng	O
at	O
Bell	O
Labs	O
in	O
1959	O
,	O
and	O
demonstrated	O
in	O
1960	O
.	O
</s>
<s>
They	O
used	O
silicon	O
as	O
channel	O
material	O
and	O
a	O
non-self-aligned	O
aluminum	B-Algorithm
gate	I-Algorithm
.	O
</s>
<s>
Aluminum	B-Algorithm
gate	I-Algorithm
metal	O
(	O
typically	O
deposited	O
in	O
an	O
evaporation	O
vacuum	O
chamber	O
onto	O
the	O
wafer	B-Architecture
surface	O
)	O
was	O
common	O
through	O
the	O
early	O
1970s	O
.	O
</s>
<s>
By	O
the	O
late	O
1970s	O
,	O
the	O
industry	O
had	O
moved	O
away	O
from	O
aluminum	O
as	O
the	O
gate	O
material	O
in	O
the	O
metal	B-Architecture
–	I-Architecture
oxide	I-Architecture
–	I-Architecture
semiconductor	I-Architecture
stack	O
due	O
to	O
fabrication	O
complications	O
and	O
performance	O
issues	O
.	O
</s>
<s>
A	O
material	O
called	O
polysilicon	O
(	O
polycrystalline	O
silicon	O
,	O
highly	O
doped	B-Algorithm
with	O
donors	O
or	O
acceptors	O
to	O
reduce	O
its	O
electrical	O
resistance	O
)	O
was	O
used	O
to	O
replace	O
aluminum	O
.	O
</s>
<s>
Polysilicon	O
can	O
be	O
deposited	O
easily	O
via	O
chemical	B-Algorithm
vapor	I-Algorithm
deposition	I-Algorithm
(	O
CVD	O
)	O
and	O
is	O
tolerant	O
to	O
subsequent	O
manufacturing	O
steps	O
which	O
involve	O
extremely	O
high	O
temperatures	O
(	O
in	O
excess	O
of	O
900	O
–	O
1000°C	O
)	O
,	O
where	O
metal	O
was	O
not	O
.	O
</s>
<s>
Particularly	O
,	O
metal	O
(	O
most	O
commonly	O
aluminum	O
a	O
Type	O
III	O
(	O
P-type	O
)	O
dopant	O
)	O
has	O
a	O
tendency	O
to	O
disperse	O
into	O
(	O
alloy	B-Application
with	O
)	O
silicon	O
during	O
these	O
thermal	O
annealing	O
steps	O
.	O
</s>
<s>
In	O
particular	O
,	O
when	O
used	O
on	O
a	O
silicon	B-Architecture
wafer	I-Architecture
with	O
a	O
< 1 1 1 >	O
crystal	O
orientation	O
,	O
excessive	O
alloying	O
of	O
aluminum	O
(	O
from	O
extended	O
high	O
temperature	O
processing	O
steps	O
)	O
with	O
the	O
underlying	O
silicon	O
can	O
create	O
a	O
short	B-Application
circuit	I-Application
between	O
the	O
diffused	O
FET	O
source	O
or	O
drain	O
areas	O
under	O
the	O
aluminum	O
and	O
across	O
the	O
metallurgical	O
junction	O
into	O
the	O
underlying	O
substrate	B-Architecture
causing	O
irreparable	O
circuit	O
failures	O
.	O
</s>
<s>
These	O
shorts	O
are	O
created	O
by	O
pyramidal-shaped	O
spikes	O
of	O
silicon-aluminum	O
alloy	B-Application
pointing	O
vertically	O
"	O
down	O
"	O
into	O
the	O
silicon	B-Architecture
wafer	I-Architecture
.	O
</s>
<s>
In	O
NMOS	O
and	O
CMOS	B-Device
technologies	O
,	O
over	O
time	O
and	O
elevated	O
temperatures	O
,	O
the	O
positive	O
voltages	O
employed	O
by	O
the	O
gate	O
structure	O
can	O
cause	O
any	O
existing	O
positively	O
charged	O
sodium	O
impurities	O
directly	O
under	O
the	O
positively	O
charged	O
gate	O
to	O
diffuse	O
through	O
the	O
gate	O
dielectric	O
and	O
migrate	O
to	O
the	O
less-positively-charged	O
channel	O
surface	O
,	O
where	O
the	O
positive	O
sodium	O
charge	O
has	O
a	O
higher	O
effect	O
on	O
the	O
channel	O
creation	O
thus	O
lowering	O
the	O
threshold	O
voltage	O
of	O
an	O
N-channel	O
transistor	B-Application
and	O
potentially	O
causing	O
failures	O
over	O
time	O
.	O
</s>
<s>
N-channel	O
,	O
metal	B-Algorithm
gate	I-Algorithm
processes	O
(	O
in	O
the	O
1970s	O
)	O
imposed	O
a	O
very	O
high	O
standard	O
of	O
cleanliness	O
(	O
absence	O
of	O
sodium	O
)	O
difficult	O
to	O
achieve	O
in	O
that	O
timeframe	O
,	O
resulting	O
in	O
high	O
manufacturing	O
costs	O
.	O
</s>
<s>
However	O
,	O
polysilicon	O
doped	B-Algorithm
at	O
practical	O
levels	O
does	O
not	O
offer	O
the	O
near-zero	O
electrical	O
resistance	O
of	O
metals	O
,	O
and	O
is	O
therefore	O
not	O
ideal	O
for	O
charging	O
and	O
discharging	O
the	O
gate	O
capacitance	O
of	O
the	O
transistor	B-Application
potentially	O
resulting	O
in	O
slower	O
circuitry	O
.	O
</s>
<s>
From	O
the	O
45	O
nm	O
node	O
onward	O
,	O
the	O
metal	B-Algorithm
gate	I-Algorithm
technology	O
returns	O
,	O
together	O
with	O
the	O
use	O
of	O
high-dielectric	O
(	O
high-κ	B-Algorithm
)	O
materials	O
,	O
pioneered	O
by	O
Intel	O
developments	O
.	O
</s>
<s>
The	O
candidates	O
for	O
the	O
metal	B-Algorithm
gate	I-Algorithm
electrode	O
are	O
,	O
for	O
NMOS	O
,	O
Ta	O
,	O
TaN	O
,	O
Nb	O
(	O
single	O
metal	B-Algorithm
gate	I-Algorithm
)	O
and	O
for	O
PMOS	O
WN/RuO2	O
(	O
the	O
PMOS	O
metal	B-Algorithm
gate	I-Algorithm
is	O
normally	O
composed	O
by	O
two	O
layers	O
of	O
metal	O
)	O
.	O
</s>
<s>
Due	O
to	O
this	O
solution	O
,	O
the	O
strain	O
capacity	O
on	O
the	O
channel	O
can	O
be	O
improved	O
(	O
by	O
the	O
metal	B-Algorithm
gate	I-Algorithm
)	O
.	O
</s>
