<s>
A	O
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
MMU	O
)	O
,	O
sometimes	O
called	O
paged	B-General_Concept
memory	I-General_Concept
management	I-General_Concept
unit	I-General_Concept
(	O
PMMU	B-General_Concept
)	O
,	O
is	O
a	O
computer	B-Architecture
hardware	I-Architecture
unit	O
having	O
all	O
memory	B-General_Concept
references	O
passed	O
through	O
itself	O
,	O
primarily	O
performing	O
the	O
translation	O
of	O
virtual	B-General_Concept
memory	I-General_Concept
addresses	I-General_Concept
to	O
physical	O
addresses	O
.	O
</s>
<s>
An	O
MMU	O
effectively	O
performs	O
virtual	B-Architecture
memory	I-Architecture
management	O
,	O
handling	O
at	O
the	O
same	O
time	O
memory	B-General_Concept
protection	I-General_Concept
,	O
cache	B-General_Concept
control	O
,	O
bus	B-General_Concept
arbitration	O
and	O
,	O
in	O
simpler	O
computer	O
architectures	O
(	O
especially	O
8-bit	O
systems	O
)	O
,	O
bank	B-General_Concept
switching	I-General_Concept
.	O
</s>
<s>
Modern	O
MMUs	O
typically	O
divide	O
the	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
(	O
the	O
range	O
of	O
addresses	O
used	O
by	O
the	O
processor	O
)	O
into	O
pages	B-General_Concept
,	O
each	O
having	O
a	O
size	O
which	O
is	O
a	O
power	O
of	O
2	O
,	O
usually	O
a	O
few	O
kilobytes	O
,	O
but	O
they	O
may	O
be	O
much	O
larger	O
.	O
</s>
<s>
The	O
upper	O
address	O
bits	O
are	O
the	O
virtual	B-General_Concept
page	I-General_Concept
numbers	O
.	O
</s>
<s>
Most	O
MMUs	O
use	O
an	O
in-memory	O
table	O
of	O
items	O
called	O
a	O
"	O
page	B-General_Concept
table	I-General_Concept
"	O
,	O
containing	O
one	O
"	O
page	B-General_Concept
table	I-General_Concept
entry	O
"	O
(	O
PTE	O
)	O
per	O
page	O
,	O
to	O
map	O
virtual	B-General_Concept
page	I-General_Concept
numbers	O
to	O
physical	O
page	O
numbers	O
in	O
main	O
memory	B-General_Concept
.	O
</s>
<s>
An	O
associative	O
cache	B-General_Concept
of	O
PTEs	O
is	O
called	O
a	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
)	O
and	O
is	O
used	O
to	O
avoid	O
the	O
necessity	O
of	O
accessing	O
the	O
main	O
memory	B-General_Concept
every	O
time	O
a	O
virtual	B-General_Concept
address	I-General_Concept
is	O
mapped	O
.	O
</s>
<s>
Other	O
MMUs	O
may	O
have	O
a	O
private	O
array	O
of	O
memory	B-General_Concept
or	O
registers	O
that	O
hold	O
a	O
set	O
of	O
page	B-General_Concept
table	I-General_Concept
entries	O
.	O
</s>
<s>
The	O
physical	O
page	O
number	O
is	O
combined	O
with	O
the	O
page	O
offset	O
to	O
give	O
the	O
complete	O
physical	B-General_Concept
address	I-General_Concept
.	O
</s>
<s>
A	O
PTE	O
may	O
also	O
include	O
information	O
about	O
whether	O
the	O
page	O
has	O
been	O
written	O
to	O
(	O
the	O
"	O
dirty	B-Operating_System
bit	I-Operating_System
"	O
)	O
,	O
when	O
it	O
was	O
last	O
used	O
(	O
the	O
"	O
accessed	O
bit	O
,	O
"	O
for	O
a	O
least	B-General_Concept
recently	I-General_Concept
used	I-General_Concept
(	O
LRU	O
)	O
page	B-General_Concept
replacement	I-General_Concept
algorithm	I-General_Concept
)	O
,	O
what	O
kind	O
of	O
processes	O
(	O
user	B-Operating_System
mode	I-Operating_System
or	O
supervisor	O
mode	O
)	O
may	O
read	O
and	O
write	O
it	O
,	O
and	O
whether	O
it	O
should	O
be	O
cached	B-General_Concept
.	O
</s>
<s>
Sometimes	O
,	O
a	O
PTE	O
prohibits	O
access	O
to	O
a	O
virtual	B-General_Concept
page	I-General_Concept
,	O
perhaps	O
because	O
no	O
physical	O
random-access	B-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
has	O
been	O
allocated	O
to	O
that	O
virtual	B-General_Concept
page	I-General_Concept
.	O
</s>
<s>
In	O
this	O
case	O
,	O
the	O
MMU	O
signals	O
a	O
page	B-General_Concept
fault	I-General_Concept
to	O
the	O
CPU	O
.	O
</s>
<s>
The	O
operating	B-General_Concept
system	I-General_Concept
(	O
OS	O
)	O
then	O
handles	O
the	O
situation	O
,	O
perhaps	O
by	O
trying	O
to	O
find	O
a	O
spare	O
frame	O
of	O
RAM	B-Architecture
and	O
set	O
up	O
a	O
new	O
PTE	O
to	O
map	O
it	O
to	O
the	O
requested	O
virtual	B-General_Concept
address	I-General_Concept
.	O
</s>
<s>
If	O
no	O
RAM	B-Architecture
is	O
free	O
,	O
it	O
may	O
be	O
necessary	O
to	O
choose	O
an	O
existing	O
page	O
(	O
known	O
as	O
a	O
"	O
victim	O
"	O
)	O
,	O
using	O
some	O
replacement	O
algorithm	O
,	O
and	O
save	O
it	O
to	O
disk	O
(	O
a	O
process	O
called	O
"	O
paging	B-Architecture
"	O
)	O
.	O
</s>
<s>
The	O
MMU	O
may	O
also	O
generate	O
illegal	O
access	O
error	O
conditions	O
or	O
invalid	O
page	B-General_Concept
faults	I-General_Concept
upon	O
illegal	O
or	O
non-existing	O
memory	B-General_Concept
accesses	O
,	O
respectively	O
,	O
leading	O
to	O
segmentation	B-Error_Name
fault	I-Error_Name
or	O
bus	B-General_Concept
error	I-General_Concept
conditions	O
when	O
handled	O
by	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
In	O
some	O
cases	O
,	O
a	O
page	B-General_Concept
fault	I-General_Concept
may	O
indicate	O
a	O
software	B-Error_Name
bug	I-Error_Name
,	O
which	O
can	O
be	O
prevented	O
by	O
using	O
memory	B-General_Concept
protection	I-General_Concept
as	O
one	O
of	O
key	O
benefits	O
of	O
an	O
MMU	O
:	O
an	O
operating	B-General_Concept
system	I-General_Concept
can	O
use	O
it	O
to	O
protect	O
against	O
errant	O
programs	O
by	O
disallowing	O
access	O
to	O
memory	B-General_Concept
that	O
a	O
particular	O
program	O
should	O
not	O
have	O
access	O
to	O
.	O
</s>
<s>
Typically	O
,	O
an	O
operating	B-General_Concept
system	I-General_Concept
assigns	O
each	O
program	O
its	O
own	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
.	O
</s>
<s>
An	O
MMU	O
also	O
mitigates	O
the	O
problem	O
of	O
fragmentation	B-Architecture
of	O
memory	B-General_Concept
.	O
</s>
<s>
After	O
blocks	O
of	O
memory	B-General_Concept
have	O
been	O
allocated	O
and	O
freed	O
,	O
the	O
free	O
memory	B-General_Concept
may	O
become	O
fragmented	O
(	O
discontinuous	O
)	O
so	O
that	O
the	O
largest	O
contiguous	O
block	O
of	O
free	O
memory	B-General_Concept
may	O
be	O
much	O
smaller	O
than	O
the	O
total	O
amount	O
.	O
</s>
<s>
With	O
virtual	B-Architecture
memory	I-Architecture
,	O
a	O
contiguous	O
range	O
of	O
virtual	O
addresses	O
can	O
be	O
mapped	O
to	O
several	O
non-contiguous	O
blocks	O
of	O
physical	O
memory	B-General_Concept
;	O
this	O
non-contiguous	O
allocation	O
is	O
one	O
of	O
the	O
benefits	O
of	O
paging	B-Architecture
.	O
</s>
<s>
In	O
some	O
early	O
microprocessor	B-Architecture
designs	O
,	O
memory	B-General_Concept
management	I-General_Concept
was	O
performed	O
by	O
a	O
separate	O
integrated	O
circuit	O
such	O
as	O
the	O
VLSI	O
Technology	O
VI475	O
(	O
1986	O
)	O
,	O
the	O
Motorola	B-General_Concept
68851	I-General_Concept
(	O
1984	O
)	O
used	O
with	O
the	O
Motorola	B-Device
68020	I-Device
CPU	O
in	O
the	O
Macintosh	B-Device
II	I-Device
,	O
or	O
the	O
Z8010	O
and	O
Z8015	O
(	O
1985	O
)	O
used	O
with	O
the	O
Zilog	B-Device
Z8000	I-Device
family	O
of	O
processors	O
.	O
</s>
<s>
Later	O
microprocessors	B-Architecture
(	O
such	O
as	O
the	O
Motorola	B-Device
68030	I-Device
and	O
the	O
Zilog	B-Device
Z280	I-Device
)	O
placed	O
the	O
MMU	O
together	O
with	O
the	O
CPU	O
on	O
the	O
same	O
integrated	O
circuit	O
,	O
as	O
did	O
the	O
Intel	B-General_Concept
80286	I-General_Concept
and	O
later	O
x86	B-Operating_System
microprocessors	I-Operating_System
.	O
</s>
<s>
While	O
this	O
article	O
concentrates	O
on	O
modern	O
MMUs	O
,	O
commonly	O
based	O
on	O
pages	B-General_Concept
,	O
early	O
systems	O
used	O
a	O
similar	O
concept	O
for	O
base-limit	O
addressing	O
that	O
further	O
developed	O
into	O
segmentation	B-General_Concept
.	O
</s>
<s>
The	O
x86	B-Operating_System
architecture	I-Operating_System
provided	O
segmentation	B-General_Concept
,	O
rather	O
than	O
paging	B-Architecture
,	O
in	O
the	O
80286	B-General_Concept
,	O
and	O
provides	O
both	O
paging	B-Architecture
and	O
segmentation	B-General_Concept
in	O
the	O
80386	B-General_Concept
and	O
later	O
processors	O
(	O
although	O
the	O
use	O
of	O
segmentation	B-General_Concept
is	O
not	O
available	O
in	O
64-bit	B-Device
operation	O
)	O
.	O
</s>
<s>
Most	O
modern	O
systems	O
divide	O
memory	B-General_Concept
into	O
pages	B-General_Concept
that	O
are	O
in	O
size	O
,	O
often	O
with	O
the	O
capability	O
to	O
use	O
so	O
called	O
huge	O
pages	B-General_Concept
of	O
or	O
in	O
size	O
(	O
often	O
both	O
variants	O
are	O
possible	O
)	O
.	O
</s>
<s>
Page	O
translations	O
are	O
cached	B-General_Concept
in	O
a	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
(	O
TLB	O
)	O
.	O
</s>
<s>
Some	O
systems	O
,	O
mainly	O
older	O
RISC	B-Architecture
designs	O
,	O
trap	B-Application
into	O
the	O
OS	O
when	O
a	O
page	O
translation	O
is	O
not	O
found	O
in	O
the	O
TLB	O
.	O
</s>
<s>
Most	O
systems	O
use	O
a	O
hardware-based	O
tree	B-Application
walker	O
.	O
</s>
<s>
VAX	B-Device
pages	B-General_Concept
are	O
512	O
bytes	O
,	O
which	O
is	O
very	O
small	O
.	O
</s>
<s>
An	O
OS	O
may	O
treat	O
multiple	O
pages	B-General_Concept
as	O
if	O
they	O
were	O
a	O
single	O
larger	O
page	O
.	O
</s>
<s>
For	O
example	O
,	O
Linux	B-Application
on	O
VAX	B-Device
groups	O
eight	O
pages	B-General_Concept
together	O
.	O
</s>
<s>
Thus	O
,	O
the	O
system	O
is	O
viewed	O
as	O
having	O
pages	B-General_Concept
.	O
</s>
<s>
The	O
VAX	B-Device
divides	O
memory	B-General_Concept
into	O
four	O
fixed-purpose	O
regions	O
,	O
each	O
in	O
size	O
.	O
</s>
<s>
P0	O
space	O
Used	O
for	O
general-purpose	O
per-process	O
memory	B-General_Concept
such	O
as	O
heaps	O
.	O
</s>
<s>
P1	O
space	O
(	O
Or	O
control	O
space	O
)	O
which	O
is	O
also	O
per-process	O
and	O
is	O
typically	O
used	O
for	O
supervisor	O
,	O
executive	O
,	O
kernel	B-Operating_System
,	O
user	O
stacks	B-Application
and	O
other	O
per-process	O
control	O
structures	O
managed	O
by	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
S0	O
space	O
(	O
Or	O
system	O
space	O
)	O
which	O
is	O
global	O
to	O
all	O
processes	O
and	O
stores	O
operating	B-General_Concept
system	I-General_Concept
code	O
and	O
data	O
,	O
whether	O
paged	O
or	O
not	O
,	O
including	O
pagetables	O
.	O
</s>
<s>
Page	B-General_Concept
tables	I-General_Concept
are	O
big	O
linear	O
arrays	O
.	O
</s>
<s>
Normally	O
,	O
this	O
would	O
be	O
very	O
wasteful	O
when	O
addresses	O
are	O
used	O
at	O
both	O
ends	O
of	O
the	O
possible	O
range	O
,	O
but	O
the	O
page	B-General_Concept
table	I-General_Concept
for	O
applications	O
is	O
itself	O
stored	O
in	O
the	O
kernel	B-Operating_System
's	O
paged	B-Architecture
memory	I-Architecture
.	O
</s>
<s>
Thus	O
,	O
there	O
is	O
effectively	O
a	O
two-level	O
tree	B-Application
,	O
allowing	O
applications	O
to	O
have	O
sparse	O
memory	B-General_Concept
layout	O
without	O
wasting	O
a	O
lot	O
of	O
space	O
on	O
unused	O
page	B-General_Concept
table	I-General_Concept
entries	O
.	O
</s>
<s>
The	O
VAX	B-Device
MMU	O
is	O
notable	O
for	O
lacking	O
an	O
accessed	O
bit	O
.	O
</s>
<s>
OSes	O
which	O
implement	O
paging	B-Architecture
must	O
find	O
some	O
way	O
to	O
emulate	O
the	O
accessed	O
bit	O
if	O
they	O
are	O
to	O
operate	O
efficiently	O
.	O
</s>
<s>
Typically	O
,	O
the	O
OS	O
will	O
periodically	O
unmap	O
pages	B-General_Concept
so	O
that	O
page-not-present	O
faults	O
can	O
be	O
used	O
to	O
let	O
the	O
OS	O
set	O
an	O
accessed	O
bit	O
.	O
</s>
<s>
ARM	O
architecture-based	O
application	O
processors	O
implement	O
an	O
MMU	O
defined	O
by	O
ARM	O
's	O
virtual	B-Architecture
memory	I-Architecture
system	O
architecture	O
.	O
</s>
<s>
The	O
current	O
architecture	O
defines	O
PTEs	O
for	O
describing	O
and	O
pages	B-General_Concept
,	O
sections	O
and	O
super-sections	O
;	O
legacy	O
versions	O
also	O
defined	O
a	O
tiny	O
page	O
.	O
</s>
<s>
ARM	O
uses	O
a	O
two-level	O
page	B-General_Concept
table	I-General_Concept
if	O
using	O
and	O
pages	B-General_Concept
,	O
or	O
just	O
a	O
one-level	O
page	B-General_Concept
table	I-General_Concept
for	O
sections	O
and	O
sections	O
.	O
</s>
<s>
TLB	O
updates	O
are	O
performed	O
automatically	O
by	O
page	B-General_Concept
table	I-General_Concept
walking	O
hardware	B-Architecture
.	O
</s>
<s>
PTEs	O
include	O
read/write	O
access	O
permission	O
based	O
on	O
privilege	O
,	O
cacheability	O
information	O
,	O
an	O
NX	B-General_Concept
bit	I-General_Concept
,	O
and	O
a	O
non-secure	O
bit	O
.	O
</s>
<s>
The	O
IBM	B-Device
System/360	I-Device
Model	I-Device
67	I-Device
,	O
which	O
was	O
introduced	O
Aug	O
.	O
1965	O
,	O
included	O
an	O
MMU	O
called	O
a	O
dynamic	O
address	O
translation	O
(	O
DAT	O
)	O
box	O
.	O
</s>
<s>
It	O
has	O
the	O
unusual	O
feature	O
of	O
storing	O
accessed	O
and	O
dirty	B-Operating_System
bits	I-Operating_System
outside	O
of	O
the	O
page	B-General_Concept
table	I-General_Concept
(	O
along	O
with	O
the	O
four	O
bit	O
protection	O
key	O
for	O
all	O
S/360	O
processors	O
)	O
.	O
</s>
<s>
They	O
refer	O
to	O
physical	O
memory	B-General_Concept
rather	O
than	O
virtual	B-Architecture
memory	I-Architecture
,	O
and	O
are	O
accessed	O
by	O
special-purpose	O
instructions	O
.	O
</s>
<s>
This	O
reduces	O
overhead	O
for	O
the	O
OS	O
,	O
which	O
would	O
otherwise	O
need	O
to	O
propagate	O
accessed	O
and	O
dirty	B-Operating_System
bits	I-Operating_System
from	O
the	O
page	B-General_Concept
tables	I-General_Concept
to	O
a	O
more	O
physically	O
oriented	O
data	O
structure	O
.	O
</s>
<s>
This	O
makes	O
OS-level	B-Application
virtualization	I-Application
,	O
later	O
called	O
paravirtualization	O
,	O
easier	O
.	O
</s>
<s>
Starting	O
in	O
August	O
,	O
1972	O
,	O
the	O
IBM	B-Device
System/370	I-Device
has	O
a	O
similar	O
MMU	O
,	O
although	O
it	O
initially	O
supported	O
only	O
a	O
24-bit	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
rather	O
than	O
the	O
32-bit	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
of	O
the	O
System/360	B-Device
Model	I-Device
67	I-Device
.	O
</s>
<s>
It	O
also	O
stores	O
the	O
accessed	O
and	O
dirty	B-Operating_System
bits	I-Operating_System
outside	O
the	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
In	O
early	O
1983	O
,	O
the	O
System/370	B-Device
-XA	I-Device
architecture	O
expanded	O
the	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
to	O
31	O
bits	O
,	O
and	O
in	O
2000	O
,	O
the	O
64-bit	B-Device
z/Architecture	B-Device
was	O
introduced	O
,	O
with	O
the	O
address	B-General_Concept
space	I-General_Concept
expanded	O
to	O
64	B-Device
bits	I-Device
;	O
those	O
continue	O
to	O
store	O
the	O
accessed	O
and	O
dirty	B-Operating_System
bits	I-Operating_System
outside	O
the	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
The	O
DEC	B-Device
Alpha	I-Device
processor	O
divides	O
memory	B-General_Concept
into	O
pages	B-General_Concept
.	O
</s>
<s>
After	O
a	O
TLB	O
miss	O
,	O
low-level	O
firmware	B-Application
machine	O
code	O
(	O
here	O
called	O
PALcode	B-General_Concept
)	O
walks	O
a	O
three-level	O
tree-structured	O
page	B-General_Concept
table	I-General_Concept
.	O
</s>
<s>
Addresses	O
are	O
broken	O
down	O
as	O
follows	O
:	O
21	O
bits	O
unused	O
,	O
10	O
bits	O
to	O
index	O
the	O
root	O
level	O
of	O
the	O
tree	B-Application
,	O
10	O
bits	O
to	O
index	O
the	O
middle	O
level	O
of	O
the	O
tree	B-Application
,	O
10	O
bits	O
to	O
index	O
the	O
leaf	O
level	O
of	O
the	O
tree	B-Application
,	O
and	O
13	O
bits	O
that	O
pass	O
through	O
to	O
the	O
physical	B-General_Concept
address	I-General_Concept
without	O
modification	O
.	O
</s>
<s>
The	O
MIPS	B-Device
architecture	I-Device
supports	O
one	O
to	O
64	O
entries	O
in	O
the	O
TLB	O
.	O
</s>
<s>
Each	O
TLB	O
entry	O
maps	O
a	O
virtual	B-General_Concept
page	I-General_Concept
number	O
(	O
VPN2	O
)	O
to	O
either	O
one	O
of	O
two	O
page	B-General_Concept
frame	I-General_Concept
numbers	I-General_Concept
(	O
PFN0	O
or	O
PFN1	O
)	O
,	O
depending	O
on	O
the	O
least	O
significant	O
bit	O
of	O
the	O
virtual	B-General_Concept
address	I-General_Concept
that	O
is	O
not	O
part	O
of	O
the	O
page	O
mask	O
.	O
</s>
<s>
Each	O
TLB	O
entry	O
has	O
its	O
own	O
page	B-General_Concept
size	I-General_Concept
,	O
which	O
can	O
be	O
any	O
value	O
from	O
to	O
in	O
multiples	O
of	O
four	O
.	O
</s>
<s>
Each	O
PFN	O
in	O
a	O
TLB	O
entry	O
has	O
a	O
caching	B-General_Concept
attribute	O
,	O
a	O
dirty	O
and	O
a	O
valid	O
status	O
bit	O
.	O
</s>
<s>
A	O
VPN2	O
has	O
a	O
global	O
status	O
bit	O
and	O
an	O
OS	O
assigned	O
ID	O
which	O
participates	O
in	O
the	O
virtual	B-General_Concept
address	I-General_Concept
TLB	O
entry	O
match	O
,	O
if	O
the	O
global	O
status	O
bit	O
is	O
set	O
to	O
zero	O
.	O
</s>
<s>
A	O
PFN	O
stores	O
the	O
physical	B-General_Concept
address	I-General_Concept
without	O
the	O
page	O
mask	O
bits	O
.	O
</s>
<s>
A	O
TLB	O
refill	O
exception	O
is	O
generated	O
when	O
there	O
are	O
no	O
entries	O
in	O
the	O
TLB	O
that	O
match	O
the	O
mapped	O
virtual	B-General_Concept
address	I-General_Concept
.	O
</s>
<s>
If	O
a	O
TLB	O
exception	O
occurs	O
when	O
processing	O
a	O
TLB	O
exception	O
,	O
a	O
double	O
fault	O
TLB	O
exception	O
,	O
it	O
is	O
dispatched	O
to	O
its	O
own	O
exception	B-General_Concept
handler	I-General_Concept
.	O
</s>
<s>
MIPS32	O
and	O
MIPS32r2	O
support	O
32	O
bits	O
of	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
and	O
up	O
to	O
36	O
bits	O
of	O
physical	B-General_Concept
address	I-General_Concept
space	O
.	O
</s>
<s>
MIPS64	O
supports	O
up	O
to	O
64	B-Device
bits	I-Device
of	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
and	O
up	O
to	O
59	O
bits	O
of	O
physical	B-General_Concept
address	I-General_Concept
space	O
.	O
</s>
<s>
The	O
original	O
Sun	B-Device
1	I-Device
is	O
a	O
single-board	B-Device
computer	I-Device
built	O
around	O
the	O
Motorola	B-Device
68000	I-Device
microprocessor	I-Device
and	O
introduced	O
in	O
1982	O
.	O
</s>
<s>
It	O
includes	O
the	O
original	O
Sun	B-Device
1	I-Device
memory	B-General_Concept
management	I-General_Concept
unit	I-General_Concept
that	O
provides	O
address	O
translation	O
,	O
memory	B-General_Concept
protection	I-General_Concept
,	O
memory	B-General_Concept
sharing	O
and	O
memory	B-General_Concept
allocation	I-General_Concept
for	O
multiple	O
processes	O
running	O
on	O
the	O
CPU	O
.	O
</s>
<s>
All	O
access	O
of	O
the	O
CPU	O
to	O
private	O
on-board	O
RAM	B-Architecture
,	O
external	O
Multibus	B-Protocol
memory	B-General_Concept
,	O
on-board	O
I/O	B-General_Concept
and	O
the	O
Multibus	B-Protocol
I/O	B-General_Concept
runs	O
through	O
the	O
MMU	O
,	O
where	O
address	O
translation	O
and	O
protection	O
are	O
done	O
in	O
a	O
uniform	O
fashion	O
.	O
</s>
<s>
The	O
MMU	O
is	O
implemented	O
in	O
hardware	B-Architecture
on	O
the	O
CPU	O
board	O
.	O
</s>
<s>
The	O
MMU	O
consists	O
of	O
a	O
context	O
register	O
,	O
a	O
segment	B-General_Concept
map	O
and	O
a	O
page	O
map	O
.	O
</s>
<s>
Virtual	O
addresses	O
from	O
the	O
CPU	O
are	O
translated	O
into	O
intermediate	O
addresses	O
by	O
the	O
segment	B-General_Concept
map	O
,	O
which	O
in	O
turn	O
are	O
translated	O
into	O
physical	O
addresses	O
by	O
the	O
page	O
map	O
.	O
</s>
<s>
The	O
page	B-General_Concept
size	I-General_Concept
is	O
and	O
the	O
segment	B-General_Concept
size	O
is	O
which	O
gives	O
16	O
pages	B-General_Concept
per	O
segment	B-General_Concept
.	O
</s>
<s>
The	O
context	O
register	O
is	O
important	O
in	O
a	O
multitasking	O
operating	B-General_Concept
system	I-General_Concept
because	O
it	O
allows	O
the	O
CPU	O
to	O
switch	O
between	O
processes	O
without	O
reloading	O
all	O
the	O
translation	O
state	O
information	O
.	O
</s>
<s>
The	O
4-bit	O
context	O
register	O
can	O
switch	O
between	O
16	O
sections	O
of	O
the	O
segment	B-General_Concept
map	O
under	O
supervisor	O
control	O
,	O
which	O
allows	O
16	O
contexts	O
to	O
be	O
mapped	O
concurrently	O
.	O
</s>
<s>
Each	O
context	O
has	O
its	O
own	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
.	O
</s>
<s>
Sharing	O
of	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
and	O
inter-context	O
communications	O
can	O
be	O
provided	O
by	O
writing	O
the	O
same	O
values	O
in	O
to	O
the	O
segment	B-General_Concept
or	O
page	O
maps	O
of	O
different	O
contexts	O
.	O
</s>
<s>
Additional	O
contexts	O
can	O
be	O
handled	O
by	O
treating	O
the	O
segment	B-General_Concept
map	O
as	O
a	O
context	O
cache	B-General_Concept
and	O
replacing	O
out-of-date	O
contexts	O
on	O
a	O
least-recently	O
used	O
basis	O
.	O
</s>
<s>
Interrupts	B-Application
and	O
traps	B-Application
do	O
not	O
switch	O
contexts	O
,	O
which	O
requires	O
that	O
all	O
valid	O
interrupt	B-Application
vectors	O
always	O
be	O
mapped	O
in	O
page	O
0	O
of	O
context	O
,	O
as	O
well	O
as	O
the	O
valid	O
supervisor	O
stack	B-Application
.	O
</s>
<s>
In	O
PowerPC	B-Architecture
G1	O
,	O
G2	O
,	O
G3	O
,	O
and	O
G4	O
pages	B-General_Concept
are	O
normally	O
After	O
a	O
TLB	O
miss	O
,	O
the	O
standard	O
PowerPC	B-Architecture
MMU	O
begins	O
two	O
simultaneous	O
lookups	O
.	O
</s>
<s>
One	O
lookup	O
attempts	O
to	O
match	O
the	O
address	O
with	O
one	O
of	O
four	O
or	O
eight	O
data	O
block	O
address	O
translation	O
(	O
DBAT	O
)	O
registers	O
,	O
or	O
four	O
or	O
eight	O
instruction	O
block	O
address	B-Architecture
translation	I-Architecture
registers	I-Architecture
(	O
IBAT	O
)	O
,	O
as	O
appropriate	O
.	O
</s>
<s>
The	O
BAT	O
registers	O
can	O
map	O
linear	O
chunks	O
of	O
memory	B-General_Concept
as	O
large	O
as	O
and	O
are	O
normally	O
used	O
by	O
an	O
OS	O
to	O
map	O
large	O
portions	O
of	O
the	O
address	B-General_Concept
space	I-General_Concept
for	O
the	O
OS	B-Operating_System
kernel	I-Operating_System
's	O
own	O
use	O
.	O
</s>
<s>
The	O
other	O
lookup	O
,	O
not	O
directly	O
supported	O
by	O
all	O
processors	O
in	O
this	O
family	O
,	O
is	O
via	O
a	O
so-called	O
"	O
inverted	O
page	B-General_Concept
table	I-General_Concept
,	O
"	O
which	O
acts	O
as	O
a	O
hashed	O
off-chip	O
extension	O
of	O
the	O
TLB	O
.	O
</s>
<s>
First	O
,	O
the	O
top	O
four	O
bits	O
of	O
the	O
address	O
are	O
used	O
to	O
select	O
one	O
of	O
16	O
segment	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
Then	O
24	O
bits	O
from	O
the	O
segment	B-General_Concept
register	I-General_Concept
replace	O
those	O
four	O
bits	O
,	O
producing	O
a	O
52-bit	O
address	O
.	O
</s>
<s>
The	O
use	O
of	O
segment	B-General_Concept
registers	I-General_Concept
allows	O
multiple	O
processes	O
to	O
share	O
the	O
same	O
hash	B-Algorithm
table	I-Algorithm
.	O
</s>
<s>
If	O
none	O
match	O
due	O
to	O
excessive	O
hash	B-Algorithm
collisions	I-Algorithm
,	O
the	O
processor	O
tries	O
again	O
with	O
a	O
slightly	O
different	O
hash	B-Error_Name
function	I-Error_Name
.	O
</s>
<s>
If	O
this	O
,	O
too	O
,	O
fails	O
,	O
the	O
CPU	O
traps	B-Application
into	O
OS	O
(	O
with	O
MMU	O
disabled	O
)	O
so	O
that	O
the	O
problem	O
may	O
be	O
resolved	O
.	O
</s>
<s>
The	O
OS	O
needs	O
to	O
discard	O
an	O
entry	O
from	O
the	O
hash	B-Algorithm
table	I-Algorithm
to	O
make	O
space	O
for	O
a	O
new	O
entry	O
.	O
</s>
<s>
The	O
OS	O
may	O
generate	O
the	O
new	O
entry	O
from	O
a	O
more-normal	O
tree-like	O
page	B-General_Concept
table	I-General_Concept
or	O
from	O
per-mapping	O
data	O
structures	O
which	O
are	O
likely	O
to	O
be	O
slower	O
and	O
more	O
space-efficient	O
.	O
</s>
<s>
Support	O
for	O
no-execute	B-General_Concept
control	O
is	O
in	O
the	O
segment	B-General_Concept
registers	I-General_Concept
,	O
leading	O
to	O
granularity	O
.	O
</s>
<s>
A	O
major	O
problem	O
with	O
this	O
design	O
is	O
poor	O
cache	B-General_Concept
locality	I-General_Concept
caused	O
by	O
the	O
hash	B-Error_Name
function	I-Error_Name
.	O
</s>
<s>
Tree-based	O
designs	O
avoid	O
this	O
by	O
placing	O
the	O
page	B-General_Concept
table	I-General_Concept
entries	O
for	O
adjacent	O
pages	B-General_Concept
in	O
adjacent	O
locations	O
.	O
</s>
<s>
An	O
operating	B-General_Concept
system	I-General_Concept
running	O
on	O
the	O
PowerPC	B-Architecture
may	O
minimize	O
the	O
size	O
of	O
the	O
hash	B-Algorithm
table	I-Algorithm
to	O
reduce	O
this	O
problem	O
.	O
</s>
<s>
It	O
is	O
also	O
somewhat	O
slow	O
to	O
remove	O
the	O
page	B-General_Concept
table	I-General_Concept
entries	O
of	O
a	O
process	O
.	O
</s>
<s>
The	O
OS	O
may	O
avoid	O
reusing	O
segment	B-General_Concept
values	O
to	O
delay	O
facing	O
this	O
,	O
or	O
it	O
may	O
elect	O
to	O
suffer	O
the	O
waste	O
of	O
memory	B-General_Concept
associated	O
with	O
per-process	O
hash	B-Algorithm
tables	I-Algorithm
.	O
</s>
<s>
G1	O
chips	O
do	O
not	O
search	O
for	O
page	B-General_Concept
table	I-General_Concept
entries	O
,	O
but	O
they	O
do	O
generate	O
the	O
hash	B-Error_Name
,	O
with	O
the	O
expectation	O
that	O
an	O
OS	O
will	O
search	O
the	O
standard	O
hash	B-Algorithm
table	I-Algorithm
via	O
software	O
.	O
</s>
<s>
G2	O
,	O
G3	O
,	O
and	O
early	O
G4	O
chips	O
use	O
hardware	B-Architecture
to	O
search	O
the	O
hash	B-Algorithm
table	I-Algorithm
.	O
</s>
<s>
On	O
chips	O
that	O
make	O
this	O
optional	O
or	O
do	O
not	O
support	O
it	O
at	O
all	O
,	O
the	O
OS	O
may	O
choose	O
to	O
use	O
a	O
tree-based	O
page	B-General_Concept
table	I-General_Concept
exclusively	O
.	O
</s>
<s>
The	O
x86	B-Operating_System
architecture	I-Operating_System
has	O
evolved	O
over	O
a	O
very	O
long	O
time	O
while	O
maintaining	O
full	O
software	O
compatibility	O
,	O
even	O
for	O
OS	O
code	O
.	O
</s>
<s>
Normal	O
operation	O
of	O
the	O
traditional	O
80386	B-General_Concept
CPU	O
and	O
its	O
successors	O
(	O
IA-32	B-Device
)	O
is	O
described	O
here	O
.	O
</s>
<s>
The	O
CPU	O
primarily	O
divides	O
memory	B-General_Concept
into	O
pages	B-General_Concept
.	O
</s>
<s>
Segment	B-General_Concept
registers	I-General_Concept
,	O
fundamental	O
to	O
the	O
older	O
8088	B-Device
and	O
80286	B-General_Concept
MMU	O
designs	O
,	O
are	O
not	O
used	O
in	O
modern	O
OSes	O
,	O
with	O
one	O
major	O
exception	O
:	O
access	O
to	O
thread-specific	O
data	O
for	O
applications	O
or	O
CPU-specific	O
data	O
for	O
OS	B-Operating_System
kernels	I-Operating_System
,	O
which	O
is	O
done	O
with	O
explicit	O
use	O
of	O
the	O
FS	O
and	O
GS	O
segment	B-General_Concept
registers	I-General_Concept
.	O
</s>
<s>
All	O
memory	B-General_Concept
access	O
involves	O
a	O
segment	B-General_Concept
register	I-General_Concept
,	O
chosen	O
according	O
to	O
the	O
code	O
being	O
executed	O
.	O
</s>
<s>
The	O
segment	B-General_Concept
register	I-General_Concept
acts	O
as	O
an	O
index	O
into	O
a	O
table	O
,	O
which	O
provides	O
an	O
offset	O
to	O
be	O
added	O
to	O
the	O
virtual	B-General_Concept
address	I-General_Concept
.	O
</s>
<s>
The	O
result	O
may	O
be	O
looked	O
up	O
via	O
a	O
tree-structured	O
page	B-General_Concept
table	I-General_Concept
,	O
with	O
the	O
bits	O
of	O
the	O
address	O
being	O
split	O
as	O
follows	O
:	O
10	O
bits	O
for	O
the	O
branch	O
of	O
the	O
tree	B-Application
,	O
10	O
bits	O
for	O
the	O
leaves	O
of	O
the	O
branch	O
,	O
and	O
the	O
12	O
lowest	O
bits	O
being	O
directly	O
copied	O
to	O
the	O
result	O
.	O
</s>
<s>
Some	O
operating	B-General_Concept
systems	I-General_Concept
,	O
such	O
as	O
OpenBSD	B-Operating_System
with	O
its	O
W^X	O
feature	O
,	O
and	O
Linux	B-Application
with	O
the	O
Exec	O
Shield	O
or	O
PaX	B-Device
patches	O
,	O
may	O
also	O
limit	O
the	O
length	O
of	O
the	O
code	O
segment	B-General_Concept
,	O
as	O
specified	O
by	O
the	O
CS	O
register	O
,	O
to	O
disallow	O
execution	O
of	O
code	O
in	O
modifiable	O
regions	O
of	O
the	O
address	B-General_Concept
space	I-General_Concept
.	O
</s>
<s>
Minor	O
revisions	O
of	O
the	O
MMU	O
introduced	O
with	O
the	O
Pentium	B-General_Concept
have	O
allowed	O
very	O
large	O
pages	B-General_Concept
by	O
skipping	O
the	O
bottom	O
level	O
of	O
the	O
tree	B-Application
(	O
this	O
leaves	O
10	O
bits	O
for	O
indexing	O
the	O
first	O
level	O
of	O
page	O
hierarchy	O
with	O
the	O
remaining	O
10+12	O
bits	O
being	O
directly	O
copied	O
to	O
the	O
result	O
)	O
.	O
</s>
<s>
Minor	O
revisions	O
of	O
the	O
MMU	O
introduced	O
with	O
the	O
Pentium	B-Device
Pro	I-Device
introduced	O
the	O
physical	B-General_Concept
address	I-General_Concept
extension	I-General_Concept
(	O
PAE	O
)	O
feature	O
,	O
enabling	O
36-bit	O
physical	O
addresses	O
with	O
2+9+9	O
bits	O
for	O
three-level	O
page	B-General_Concept
tables	I-General_Concept
and	O
12	O
lowest	O
bits	O
being	O
directly	O
copied	O
to	O
the	O
result	O
.	O
</s>
<s>
Large	O
pages	B-General_Concept
(	O
)	O
are	O
also	O
available	O
by	O
skipping	O
the	O
bottom	O
level	O
of	O
the	O
tree	B-Application
(	O
resulting	O
in	O
2+9	O
bits	O
for	O
two-level	O
table	O
hierarchy	O
and	O
the	O
remaining	O
9+12	O
lowest	O
bits	O
copied	O
directly	O
)	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
page	B-General_Concept
attribute	I-General_Concept
table	I-General_Concept
allowed	O
specification	O
of	O
cacheability	O
by	O
looking	O
up	O
a	O
few	O
high	O
bits	O
in	O
a	O
small	O
on-CPU	O
table	O
.	O
</s>
<s>
No-execute	B-General_Concept
support	O
was	O
originally	O
only	O
provided	O
on	O
a	O
per-segment	O
basis	O
,	O
making	O
it	O
very	O
awkward	O
to	O
use	O
.	O
</s>
<s>
More	O
recent	O
x86	B-Operating_System
chips	O
provide	O
a	O
per-page	O
no-execute	B-General_Concept
bit	I-General_Concept
in	O
the	O
PAE	O
mode	O
.	O
</s>
<s>
The	O
W^X	O
,	O
Exec	O
Shield	O
,	O
and	O
PaX	B-Device
mechanisms	O
described	O
above	O
emulate	O
per-page	O
non-execute	O
support	O
on	O
machines	O
x86	B-Operating_System
processors	O
lacking	O
the	O
NX	B-General_Concept
bit	I-General_Concept
by	O
setting	O
the	O
length	O
of	O
the	O
code	O
segment	B-General_Concept
,	O
with	O
a	O
performance	O
loss	O
and	O
a	O
reduction	O
in	O
the	O
available	O
address	B-General_Concept
space	I-General_Concept
.	O
</s>
<s>
x86-64	B-Device
is	O
a	O
64-bit	B-Device
extension	O
of	O
x86	B-Operating_System
that	O
almost	O
entirely	O
removes	O
segmentation	B-General_Concept
in	O
favor	O
of	O
the	O
flat	B-General_Concept
memory	I-General_Concept
model	I-General_Concept
used	O
by	O
almost	O
all	O
operating	B-General_Concept
systems	I-General_Concept
for	O
the	O
386	B-General_Concept
or	O
newer	O
processors	O
.	O
</s>
<s>
In	O
long	O
mode	O
,	O
all	O
segment	B-General_Concept
offsets	O
are	O
ignored	O
,	O
except	O
for	O
the	O
FS	O
and	O
GS	O
segments	O
.	O
</s>
<s>
When	O
used	O
with	O
pages	B-General_Concept
,	O
the	O
page	B-General_Concept
table	I-General_Concept
tree	B-Application
has	O
four	O
levels	O
instead	O
of	O
three	O
.	O
</s>
<s>
The	O
virtual	O
addresses	O
are	O
divided	O
as	O
follows	O
:	O
16	O
bits	O
unused	O
,	O
nine	O
bits	O
each	O
for	O
four	O
tree	B-Application
levels	O
(	O
for	O
a	O
total	O
of	O
36	O
bits	O
)	O
,	O
and	O
the	O
12	O
lowest	O
bits	O
directly	O
copied	O
to	O
the	O
result	O
.	O
</s>
<s>
With	O
pages	B-General_Concept
,	O
there	O
are	O
only	O
three	O
levels	O
of	O
page	B-General_Concept
table	I-General_Concept
,	O
for	O
a	O
total	O
of	O
27	O
bits	O
used	O
in	O
paging	B-Architecture
and	O
21	O
bits	O
of	O
offset	O
.	O
</s>
<s>
Some	O
newer	O
CPUs	O
also	O
support	O
a	O
page	O
with	O
two	O
levels	O
of	O
paging	B-Architecture
and	O
of	O
offset	O
.	O
</s>
<s>
CPUID	B-Architecture
can	O
be	O
used	O
to	O
determine	O
if	O
pages	B-General_Concept
are	O
supported	O
.	O
</s>
<s>
In	O
all	O
levels	O
of	O
the	O
page	B-General_Concept
table	I-General_Concept
,	O
the	O
page	B-General_Concept
table	I-General_Concept
entry	O
includes	O
a	O
no-execute	B-General_Concept
bit	I-General_Concept
.	O
</s>
<s>
The	O
Burroughs	B-Device
B5000	I-Device
from	O
1961	O
was	O
the	O
first	O
commercial	O
system	O
to	O
support	O
virtual	B-Architecture
memory	I-Architecture
(	O
after	O
the	O
Atlas	B-Device
)	O
,	O
even	O
though	O
it	O
has	O
no	O
MMU	O
It	O
provides	O
the	O
two	O
functions	O
of	O
an	O
MMU	O
-	O
virtual	B-General_Concept
memory	I-General_Concept
addresses	I-General_Concept
and	O
memory	B-General_Concept
protection	I-General_Concept
-	O
with	O
a	O
different	O
architectural	O
approach	O
.	O
</s>
<s>
First	O
,	O
in	O
the	O
mapping	O
of	O
virtual	B-General_Concept
memory	I-General_Concept
addresses	I-General_Concept
,	O
instead	O
of	O
needing	O
an	O
MMU	O
,	O
the	O
MCP	B-Application
systems	O
are	O
descriptor-based	O
.	O
</s>
<s>
Each	O
allocated	O
memory	B-General_Concept
block	O
is	O
given	O
a	O
master	O
descriptor	B-Data_Structure
with	O
the	O
properties	O
of	O
the	O
block	O
(	O
i.e.	O
,	O
the	O
size	O
,	O
address	O
,	O
and	O
whether	O
present	O
in	O
memory	B-General_Concept
)	O
.	O
</s>
<s>
When	O
a	O
request	O
is	O
made	O
to	O
access	O
the	O
block	O
for	O
reading	O
or	O
writing	O
,	O
the	O
hardware	B-Architecture
checks	O
its	O
presence	O
via	O
the	O
presence	O
bit	O
(	O
pbit	O
)	O
in	O
the	O
descriptor	B-Data_Structure
.	O
</s>
<s>
In	O
this	O
case	O
,	O
the	O
block	O
can	O
be	O
accessed	O
via	O
the	O
physical	B-General_Concept
address	I-General_Concept
in	O
the	O
descriptor	B-Data_Structure
.	O
</s>
<s>
If	O
the	O
pbit	O
is	O
zero	O
,	O
an	O
interrupt	B-Application
is	O
generated	O
for	O
the	O
MCP	B-Application
(	O
operating	B-General_Concept
system	I-General_Concept
)	O
to	O
make	O
the	O
block	O
present	O
.	O
</s>
<s>
If	O
the	O
address	O
field	O
is	O
non-zero	O
,	O
it	O
is	O
a	O
disk	O
address	O
of	O
the	O
block	O
,	O
which	O
has	O
previously	O
been	O
rolled	O
out	O
,	O
so	O
the	O
block	O
is	O
fetched	O
from	O
disk	O
and	O
the	O
pbit	O
is	O
set	O
to	O
one	O
and	O
the	O
physical	O
memory	B-General_Concept
address	O
updated	O
to	O
point	O
to	O
the	O
block	O
in	O
memory	B-General_Concept
(	O
another	O
pbit	O
)	O
.	O
</s>
<s>
All	O
memory	B-General_Concept
allocation	I-General_Concept
is	O
therefore	O
completely	O
automatic	O
(	O
one	O
of	O
the	O
features	O
of	O
modern	O
systems	O
)	O
and	O
there	O
is	O
no	O
way	O
to	O
allocate	O
blocks	O
other	O
than	O
this	O
mechanism	O
.	O
</s>
<s>
There	O
are	O
no	O
such	O
calls	O
as	O
malloc	B-Language
or	O
dealloc	O
,	O
since	O
memory	B-General_Concept
blocks	O
are	O
also	O
automatically	O
discarded	O
.	O
</s>
<s>
When	O
memory	B-General_Concept
is	O
nearly	O
full	O
,	O
the	O
MCP	B-Application
examines	O
the	O
working	O
set	O
,	O
trying	O
compaction	O
(	O
since	O
the	O
system	O
is	O
segmented	O
,	O
not	O
paged	O
)	O
,	O
deallocating	O
read-only	O
segments	O
(	O
such	O
as	O
code-segments	O
which	O
can	O
be	O
restored	O
from	O
their	O
original	O
copy	O
)	O
and	O
,	O
as	O
a	O
last	O
resort	O
,	O
rolling	O
dirty	O
data	O
segments	O
out	O
to	O
disk	O
.	O
</s>
<s>
Since	O
all	O
accesses	O
are	O
via	O
the	O
descriptor	B-Data_Structure
,	O
the	O
hardware	B-Architecture
can	O
check	O
that	O
all	O
accesses	O
are	O
within	O
bounds	O
and	O
,	O
in	O
the	O
case	O
of	O
a	O
write	O
,	O
that	O
the	O
process	O
has	O
write	O
permission	O
.	O
</s>
<s>
The	O
MCP	B-Application
system	O
is	O
inherently	O
secure	O
and	O
thus	O
has	O
no	O
need	O
of	O
an	O
MMU	O
to	O
provide	O
this	O
level	O
of	O
memory	B-General_Concept
protection	I-General_Concept
.	O
</s>
<s>
Descriptors	O
are	O
read	O
only	O
to	O
user	O
processes	O
and	O
may	O
only	O
be	O
updated	O
by	O
the	O
system	O
(	O
hardware	B-Architecture
or	O
MCP	B-Application
)	O
.	O
</s>
<s>
Blocks	O
can	O
be	O
shared	O
between	O
processes	O
via	O
copy	O
descriptors	O
in	O
the	O
process	O
stack	B-Application
.	O
</s>
<s>
A	O
code	O
segment	B-General_Concept
is	O
read	O
only	O
,	O
thus	O
reentrant	O
and	O
shared	O
between	O
processes	O
.	O
</s>
<s>
Copy	O
descriptors	O
contain	O
a	O
20-bit	O
address	O
field	O
giving	O
index	O
of	O
the	O
master	O
descriptor	B-Data_Structure
in	O
the	O
master	O
descriptor	B-Data_Structure
array	O
.	O
</s>
<s>
Blocks	O
can	O
easily	O
be	O
relocated	O
,	O
since	O
only	O
the	O
master	O
descriptor	B-Data_Structure
needs	O
update	O
when	O
a	O
block	O
's	O
status	O
changes	O
.	O
</s>
<s>
MCP	B-Application
systems	O
may	O
be	O
implemented	O
on	O
top	O
of	O
standard	O
hardware	B-Architecture
that	O
does	O
have	O
an	O
MMU	O
(	O
for	O
example	O
,	O
a	O
standard	O
PC	O
)	O
.	O
</s>
<s>
Even	O
if	O
the	O
system	O
implementation	O
uses	O
the	O
MMU	O
in	O
some	O
way	O
,	O
this	O
will	O
not	O
be	O
at	O
all	O
visible	O
at	O
the	O
MCP	B-Application
level	O
.	O
</s>
