<s>
In	O
the	O
design	O
of	O
modern	O
computers	O
,	O
memory	B-Architecture
geometry	I-Architecture
describes	O
the	O
internal	O
structure	O
of	O
random-access	B-Architecture
memory	I-Architecture
.	O
</s>
<s>
Memory	B-Architecture
geometry	I-Architecture
is	O
of	O
concern	O
to	O
consumers	O
upgrading	O
their	O
computers	O
,	O
since	O
older	O
memory	O
controllers	O
may	O
not	O
be	O
compatible	O
with	O
later	O
products	O
.	O
</s>
<s>
Memory	B-Architecture
geometry	I-Architecture
terminology	O
can	O
be	O
confusing	O
because	O
of	O
the	O
number	O
of	O
overlapping	O
terms	O
.	O
</s>
<s>
For	O
example	O
,	O
the	O
number	O
of	O
data	O
pins	O
on	O
a	O
memory	B-General_Concept
module	I-General_Concept
is	O
one	O
dimension	O
.	O
</s>
<s>
Memory	B-Architecture
geometry	I-Architecture
describes	O
the	O
logical	O
configuration	O
of	O
a	O
RAM	B-Architecture
module	O
,	O
but	O
consumers	O
will	O
always	O
find	O
it	O
easiest	O
to	O
grasp	O
the	O
physical	O
configuration	O
.	O
</s>
<s>
Much	O
of	O
the	O
confusion	O
surrounding	O
memory	B-Architecture
geometry	I-Architecture
occurs	O
when	O
the	O
physical	O
configuration	O
obfuscates	O
the	O
logical	O
configuration	O
.	O
</s>
<s>
The	O
first	O
defining	O
feature	O
of	O
RAM	B-Architecture
is	O
form	O
factor	O
.	O
</s>
<s>
RAM	B-Architecture
modules	O
can	O
be	O
in	O
compact	O
SO-DIMM	O
form	O
for	O
space	O
constrained	O
applications	O
like	O
laptops	B-Device
,	O
printers	O
,	O
embedded	B-Architecture
computers	I-Architecture
,	O
and	O
small	B-Device
form	I-Device
factor	I-Device
computers	O
,	O
and	O
in	O
DIMM	B-General_Concept
format	O
,	O
which	O
is	O
used	O
in	O
most	O
desktops	O
.	O
</s>
<s>
The	O
other	O
physical	O
characteristics	O
,	O
determined	O
by	O
physical	O
examination	O
,	O
are	O
the	O
number	O
of	O
memory	O
chips	O
,	O
and	O
whether	O
both	O
sides	O
of	O
the	O
memory	B-General_Concept
"	I-General_Concept
stick	I-General_Concept
"	I-General_Concept
are	O
populated	O
.	O
</s>
<s>
Modules	O
with	O
the	O
number	O
of	O
RAM	B-Architecture
chips	I-Architecture
equal	O
to	O
some	O
power	O
of	O
two	O
do	O
not	O
support	O
memory	O
error	O
detection	O
or	O
correction	O
.	O
</s>
<s>
If	O
there	O
are	O
extra	O
RAM	B-Architecture
chips	I-Architecture
(	O
between	O
powers	O
of	O
two	O
)	O
,	O
these	O
are	O
used	O
for	O
ECC	B-General_Concept
.	O
</s>
<s>
RAM	B-Architecture
modules	O
are	O
'	O
keyed	O
 '	O
by	O
indentations	O
on	O
the	O
sides	O
,	O
and	O
along	O
the	O
bottom	O
of	O
the	O
module	O
.	O
</s>
<s>
With	O
AMD	O
's	O
release	O
of	O
the	O
Opteron	B-General_Concept
,	O
and	O
Intel	O
's	O
corresponding	O
CPU	O
,	O
systems	O
that	O
share	O
more	O
than	O
one	O
memory	O
controller	O
in	O
a	O
single	O
system	O
have	O
become	O
common	O
in	O
applications	O
that	O
require	O
the	O
power	O
of	O
more	O
than	O
one	O
common	O
desktop	O
.	O
</s>
<s>
For	O
these	O
systems	O
schemes	O
like	O
non-uniform	B-Operating_System
memory	I-Operating_System
architecture	I-Operating_System
are	O
used	O
.	O
</s>
<s>
Modern	O
computers	O
can	O
have	O
two	B-Architecture
,	I-Architecture
three	I-Architecture
or	I-Architecture
even	I-Architecture
more	I-Architecture
channels	I-Architecture
.	O
</s>
<s>
Module	O
capacity	O
is	O
the	O
aggregate	O
space	O
in	O
a	O
module	O
measured	O
in	O
bytes	B-Application
,	O
or	O
–	O
more	O
generally	O
–	O
in	O
words	O
.	O
</s>
<s>
Module	O
capacity	O
is	O
equal	O
to	O
the	O
product	O
of	O
the	O
number	O
of	O
ranks	B-General_Concept
and	O
the	O
rank	O
density	O
,	O
and	O
where	O
the	O
rank	O
density	O
is	O
the	O
product	O
of	O
rank	O
depth	O
and	O
rank	O
width	O
.	O
</s>
<s>
The	O
standard	O
format	O
for	O
expressing	O
this	O
specification	O
is	O
(	O
rank	O
depth	O
)	O
Mbit	O
×	O
(	O
rank	O
width	O
)	O
×	O
(	O
number	O
of	O
ranks	B-General_Concept
)	O
.	O
</s>
<s>
Ranks	B-General_Concept
are	O
sub-units	O
of	O
a	O
memory	B-General_Concept
module	I-General_Concept
that	O
share	O
the	O
same	O
address	O
and	O
data	O
buses	O
and	O
are	O
selected	O
by	O
chip	B-Architecture
select	I-Architecture
(	O
CS	O
)	O
in	O
low-level	O
addressing	O
.	O
</s>
<s>
For	O
example	O
,	O
a	O
memory	B-General_Concept
module	I-General_Concept
with	O
8	O
chips	O
on	O
each	O
side	O
,	O
with	O
each	O
chip	O
having	O
an	O
8-bit-wide	O
data	O
bus	O
,	O
would	O
have	O
one	O
rank	O
for	O
each	O
side	O
for	O
a	O
total	O
of	O
2	O
ranks	B-General_Concept
,	O
if	O
we	O
define	O
a	O
rank	O
to	O
be	O
64	O
bits	O
wide	O
.	O
</s>
<s>
For	O
a	O
64-bit-wide	O
memory	O
data	O
interface	O
,	O
this	O
equates	O
to	O
having	O
4	O
ranks	B-General_Concept
,	O
where	O
each	O
rank	O
can	O
be	O
selected	O
by	O
a	O
2-bit	O
chip	B-Architecture
select	I-Architecture
signal	O
.	O
</s>
<s>
Memory	O
controllers	O
such	O
as	O
the	O
Intel	B-Device
945	I-Device
Chipset	B-Device
list	O
the	O
configurations	O
they	O
support	O
:	O
"	O
256-Mib	O
,	O
512-Mib	O
,	O
and	O
1-Gib	O
DDR2	O
technologies	O
for	O
×8	O
and	O
×16	O
devices	O
"	O
,	O
"	O
four	O
ranks	B-General_Concept
for	O
all	O
DDR2	O
devices	O
up	O
to	O
512-Mibit	O
density	O
"	O
,	O
"	O
eight	O
ranks	B-General_Concept
for	O
1-Gibit	O
DDR2	O
devices	O
"	O
.	O
</s>
<s>
As	O
an	O
example	O
,	O
take	O
an	O
i945	B-Device
memory	O
controller	O
with	O
four	O
Kingston	O
KHX6400D2/1G	O
memory	B-General_Concept
modules	I-General_Concept
,	O
where	O
each	O
module	O
has	O
a	O
capacity	O
of	O
1GiB	O
.	O
</s>
<s>
16	O
×	O
8	O
equals	O
128	O
,	O
therefore	O
,	O
each	O
module	O
has	O
two	O
ranks	B-General_Concept
of	O
64bits	O
each	O
.	O
</s>
<s>
So	O
,	O
from	O
the	O
MCH	B-Device
point	O
of	O
view	O
there	O
are	O
four	O
1GB	O
modules	O
.	O
</s>
<s>
At	O
a	O
higher	O
logical	O
level	O
,	O
the	O
MCH	B-Device
also	O
sees	O
two	O
channels	O
,	O
each	O
with	O
four	O
ranks	B-General_Concept
.	O
</s>
<s>
In	O
contrast	O
,	O
banks	B-General_Concept
,	O
while	O
similar	O
from	O
a	O
logical	O
perspective	O
to	O
ranks	B-General_Concept
,	O
are	O
implemented	O
quite	O
differently	O
in	O
physical	O
hardware	O
.	O
</s>
<s>
Banks	B-General_Concept
are	O
sub-units	O
inside	O
a	O
single	O
memory	O
chip	O
,	O
while	O
ranks	B-General_Concept
are	O
sub-units	O
composed	O
of	O
a	O
subset	O
of	O
the	O
chips	O
on	O
a	O
module	O
.	O
</s>
<s>
Similar	O
to	O
chip	B-Architecture
select	I-Architecture
,	O
banks	B-General_Concept
are	O
selected	O
by	O
bank	O
select	O
bits	O
,	O
which	O
are	O
part	O
of	O
the	O
memory	O
interface	O
.	O
</s>
<s>
The	O
lowest	O
form	O
of	O
organization	O
covered	O
by	O
memory	B-Architecture
geometry	I-Architecture
,	O
sometimes	O
called	O
"	O
memory	O
device	O
"	O
.	O
</s>
<s>
These	O
are	O
the	O
component	O
ICs	O
that	O
make	O
up	O
each	O
module	O
,	O
or	O
module	O
of	O
RAM	B-Architecture
.	O
</s>
<s>
In	O
addition	O
to	O
the	O
depth	O
,	O
a	O
second	O
addressing	O
dimension	O
has	O
been	O
added	O
at	O
the	O
chip	O
level	O
,	O
banks	B-General_Concept
.	O
</s>
<s>
Banks	B-General_Concept
allow	O
one	O
bank	O
to	O
be	O
available	O
,	O
while	O
another	O
bank	O
is	O
unavailable	O
because	O
it	O
is	O
refreshing	O
.	O
</s>
<s>
A	O
memory	B-General_Concept
module	I-General_Concept
consists	O
of	O
a	O
multiple	O
of	O
the	O
memory	O
chips	O
to	O
equal	O
the	O
desired	O
module	O
width	O
.	O
</s>
<s>
So	O
a	O
32-bit	O
SIMM	B-General_Concept
module	O
could	O
be	O
composed	O
of	O
four	O
8-bit	O
wide	O
( ×8	O
)	O
chips	O
.	O
</s>
<s>
As	O
noted	O
in	O
the	O
memory	O
channel	O
part	O
,	O
one	O
physical	O
module	O
can	O
be	O
made	O
up	O
of	O
one	O
or	O
more	O
logical	O
ranks	B-General_Concept
.	O
</s>
<s>
If	O
that	O
32-bit	O
SIMM	B-General_Concept
were	O
composed	O
of	O
eight	O
8-bit	O
chips	O
the	O
SIMM	B-General_Concept
would	O
have	O
two	O
ranks	B-General_Concept
.	O
</s>
<s>
A	O
memory	O
channel	O
is	O
made	O
up	O
of	O
ranks	B-General_Concept
.	O
</s>
<s>
Physically	O
a	O
memory	O
channel	O
with	O
just	O
one	O
memory	B-General_Concept
module	I-General_Concept
might	O
present	O
itself	O
as	O
having	O
one	O
or	O
more	O
logical	O
ranks	B-General_Concept
.	O
</s>
<s>
The	O
logical	O
features	O
section	O
described	O
NUMA	O
configurations	O
,	O
which	O
can	O
take	O
the	O
form	O
of	O
a	O
network	B-Architecture
of	O
memory	O
controllers	O
.	O
</s>
<s>
For	O
example	O
,	O
each	O
socket	O
of	O
a	O
two-socket	O
AMD	O
K8	B-General_Concept
can	O
have	O
a	O
two-channel	O
memory	O
controller	O
,	O
giving	O
the	O
system	O
a	O
total	O
of	O
four	O
memory	O
channels	O
.	O
</s>
<s>
Various	O
methods	O
of	O
specifying	O
memory	B-Architecture
geometry	I-Architecture
can	O
be	O
encountered	O
,	O
giving	O
different	O
types	O
of	O
information	O
.	O
</s>
<s>
The	O
memory	O
width	O
specifies	O
the	O
data	O
width	O
of	O
the	O
memory	B-General_Concept
module	I-General_Concept
interface	O
in	O
bits	O
.	O
</s>
<s>
For	O
example	O
,	O
64	O
would	O
indicate	O
a	O
64-bit	O
data	O
width	O
,	O
as	O
is	O
found	O
on	O
non-ECC	O
DIMMs	B-General_Concept
common	O
in	O
SDR	O
and	O
DDR1	O
–	O
4	O
families	O
of	O
RAM	B-Architecture
.	O
</s>
<s>
A	O
memory	O
of	O
width	O
of	O
72	O
would	O
indicate	O
an	O
ECC	B-General_Concept
module	O
,	O
with	O
8	O
extra	O
bits	O
in	O
the	O
data	O
width	O
for	O
the	O
error-correcting	O
code	O
syndrome	O
.	O
</s>
<s>
(	O
The	O
ECC	B-General_Concept
syndrome	O
allows	O
single-bit	O
errors	O
to	O
be	O
corrected	O
)	O
.	O
</s>
<s>
Example	O
:	O
a	O
chip	O
with	O
the	O
same	O
capacity	O
and	O
memory	O
width	O
as	O
above	O
but	O
constructed	O
with	O
4	O
banks	B-General_Concept
would	O
be	O
specified	O
as	O
4	O
Mi	O
×	O
8	O
×	O
4	O
.	O
</s>
