<s>
Meiko	B-Device
Scientific	I-Device
Ltd	O
.	O
was	O
a	O
British	O
supercomputer	B-Architecture
company	O
based	O
in	O
Bristol	O
,	O
founded	O
by	O
members	O
of	O
the	O
design	O
team	O
working	O
on	O
the	O
Inmos	B-General_Concept
transputer	I-General_Concept
microprocessor	B-Architecture
.	O
</s>
<s>
In	O
1985	O
,	O
when	O
Inmos	O
management	O
suggested	O
the	O
release	O
of	O
the	O
transputer	B-General_Concept
be	O
delayed	O
,	O
Miles	O
Chesney	O
,	O
David	O
Alden	O
,	O
Eric	O
Barton	O
,	O
Roy	O
Bottomley	O
,	O
James	O
Cownie	O
,	O
and	O
Gerry	O
Talbot	O
resigned	O
and	O
formed	O
Meiko	O
(	O
Japanese	O
for	O
"	O
well-engineered	O
"	O
)	O
to	O
start	O
work	O
on	O
massively	B-Operating_System
parallel	I-Operating_System
machines	O
based	O
on	O
the	O
processor	O
.	O
</s>
<s>
Nine	O
weeks	O
later	O
in	O
July	O
1985	O
,	O
they	O
demonstrated	O
a	O
transputer	B-General_Concept
system	O
based	O
on	O
experimental	O
16-bit	B-Device
transputers	B-General_Concept
at	O
the	O
SIGGRAPH	O
in	O
San	O
Francisco	O
.	O
</s>
<s>
In	O
1986	O
,	O
a	O
system	O
based	O
on	O
32-bit	O
T414	O
transputers	B-General_Concept
was	O
launched	O
as	O
the	O
Meiko	B-Device
Computing	I-Device
Surface	I-Device
.	O
</s>
<s>
In	O
1993	O
,	O
Meiko	O
launched	O
the	O
second-generation	O
Meiko	B-Device
CS-2	I-Device
system	O
,	O
but	O
the	O
company	O
ran	O
into	O
financial	O
difficulties	O
in	O
the	O
mid-1990s	O
.	O
</s>
<s>
The	O
technical	O
team	O
and	O
technology	O
was	O
transferred	O
to	O
a	O
joint	O
venture	O
company	O
named	O
Quadrics	B-General_Concept
Supercomputers	I-General_Concept
World	I-General_Concept
Ltd	I-General_Concept
.	I-General_Concept
(	O
QSW	B-General_Concept
)	O
,	O
formed	O
by	O
Alenia	O
Spazio	O
of	O
Italy	O
in	O
mid-1996	O
.	O
</s>
<s>
At	O
Quadrics	B-General_Concept
,	O
the	O
CS-2	O
interconnect	O
technology	O
was	O
developed	O
into	O
QsNet	B-Architecture
.	O
</s>
<s>
The	O
Meiko	B-Device
Computing	I-Device
Surface	I-Device
(	O
sometimes	O
retrospectively	O
referred	O
to	O
as	O
the	O
CS-1	O
)	O
was	O
a	O
massively	B-Operating_System
parallel	I-Operating_System
supercomputer	B-Architecture
.	O
</s>
<s>
The	O
system	O
was	O
based	O
on	O
the	O
Inmos	B-General_Concept
transputer	I-General_Concept
microprocessor	B-Architecture
,	O
later	O
also	O
using	O
SPARC	B-Architecture
and	O
Intel	B-General_Concept
i860	I-General_Concept
processors	O
.	O
</s>
<s>
The	O
Computing	B-Device
Surface	I-Device
architecture	O
comprised	O
multiple	O
boards	O
containing	O
transputers	B-General_Concept
connected	O
together	O
by	O
their	O
communications	O
links	O
via	O
Meiko-designed	O
link	O
switch	B-Protocol
chips	O
.	O
</s>
<s>
A	O
variety	O
of	O
different	O
boards	O
were	O
produced	O
with	O
different	O
transputer	B-General_Concept
variants	O
,	O
random-access	B-Architecture
memory	I-Architecture
(	O
RAM	B-Architecture
)	O
capacities	O
and	O
peripherals	O
.	O
</s>
<s>
The	O
initial	O
software	O
environments	O
provided	O
for	O
the	O
Computing	B-Device
Surface	I-Device
was	O
Occam	B-Language
Programming	O
System	O
(	O
OPS	O
)	O
,	O
Meiko	O
's	O
version	O
of	O
Inmos	O
's	O
D700	O
Transputer	B-General_Concept
Development	O
System	O
.	O
</s>
<s>
This	O
was	O
soon	O
superseded	O
by	O
a	O
multi-user	B-Operating_System
version	O
,	O
MultiOPS	O
.	O
</s>
<s>
Later	O
,	O
Meiko	O
introduced	O
Meiko	O
Multiple	O
Virtual	O
Computing	B-Device
Surfaces	I-Device
(	O
M²VCS	O
)	O
,	O
a	O
multi-user	B-Operating_System
resource	O
management	O
system	O
let	O
the	O
processors	O
of	O
a	O
Computing	B-Device
Surface	I-Device
be	O
partitioned	O
into	O
several	O
domains	O
of	O
different	O
sizes	O
.	O
</s>
<s>
These	O
domains	O
were	O
allocated	O
by	O
M²VCS	O
to	O
individual	O
users	O
,	O
thus	O
allowing	O
several	O
simultaneous	O
users	O
access	O
to	O
their	O
own	O
virtual	O
Computing	B-Device
Surfaces	I-Device
.	O
</s>
<s>
M²VCS	O
was	O
used	O
in	O
conjunction	O
with	O
either	O
OPS	O
or	O
MeikOS	B-Device
,	O
a	O
Unix-like	B-Operating_System
single-processor	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
In	O
1988	O
,	O
Meiko	O
launched	O
the	O
In-Sun	O
Computing	B-Device
Surface	I-Device
,	O
which	O
repackaged	O
the	O
Computing	B-Device
Surface	I-Device
into	O
VMEbus	B-Architecture
boards	O
(	O
designated	O
the	O
MK200	O
series	O
)	O
suitable	O
for	O
installation	O
in	O
larger	O
Sun-3	B-Device
or	O
Sun-4	B-Device
systems	O
.	O
</s>
<s>
The	O
Sun	O
acted	O
as	O
front-end	O
host	O
system	O
for	O
managing	O
the	O
transputers	B-General_Concept
,	O
running	O
development	O
tools	O
and	O
providing	O
mass	O
storage	O
.	O
</s>
<s>
A	O
version	O
of	O
M²VCS	O
running	O
as	O
a	O
SunOS	B-Operating_System
daemon	B-Operating_System
named	O
Sun	O
Virtual	O
Computing	B-Device
Surfaces	I-Device
(	O
SVCS	O
)	O
provided	O
access	O
between	O
the	O
transputer	B-General_Concept
network	O
and	O
the	O
Sun	O
host	O
.	O
</s>
<s>
As	O
the	O
performance	O
of	O
the	O
transputer	B-General_Concept
became	O
less	O
competitive	O
toward	O
the	O
end	O
of	O
the	O
1980s	O
(	O
the	O
follow-on	O
T9000	B-General_Concept
transputer	B-General_Concept
being	O
beset	O
with	O
delays	O
)	O
,	O
Meiko	O
added	O
the	O
ability	O
to	O
supplement	O
the	O
transputers	B-General_Concept
with	O
Intel	B-General_Concept
i860	I-General_Concept
processors	O
.	O
</s>
<s>
Each	O
i860	O
board	O
(	O
MK086	O
or	O
MK096	O
)	O
contained	O
two	O
i860s	O
with	O
up	O
to	O
32	O
MB	O
of	O
RAM	B-Architecture
each	O
,	O
and	O
two	O
T800s	O
providing	O
inter-processor	O
communication	O
.	O
</s>
<s>
Sometimes	O
known	O
as	O
the	O
Concerto	O
or	O
simply	O
the	O
i860	O
Computing	B-Device
Surface	I-Device
,	O
these	O
systems	O
had	O
limited	O
success	O
.	O
</s>
<s>
Meiko	O
also	O
produced	O
a	O
SPARC	B-Architecture
processor	O
board	O
,	O
the	O
MK083	O
,	O
which	O
allowed	O
the	O
integration	O
of	O
the	O
SunOS	B-Operating_System
operating	B-General_Concept
system	I-General_Concept
into	O
the	O
Computing	B-Device
Surface	I-Device
architecture	O
,	O
similarly	O
to	O
the	O
In-Sun	O
Computing	B-Device
Surface	I-Device
.	O
</s>
<s>
These	O
were	O
usually	O
used	O
as	O
front-end	O
host	O
processors	O
for	O
transputer	B-General_Concept
or	O
i860	O
Computing	B-Device
Surfaces	I-Device
.	O
</s>
<s>
SVCS	O
,	O
or	O
an	O
improved	O
version	O
,	O
called	O
simply	O
VCS	O
was	O
used	O
to	O
manage	O
the	O
transputer	B-General_Concept
resources	O
.	O
</s>
<s>
Computing	B-Device
Surface	I-Device
configurations	O
with	O
multiple	O
MK083	O
boards	O
were	O
also	O
possible	O
.	O
</s>
<s>
A	O
major	O
drawback	O
of	O
the	O
Computing	B-Device
Surface	I-Device
architecture	O
was	O
poor	O
I/O	B-General_Concept
bandwidth	O
for	O
general	O
data	O
shuffling	O
.	O
</s>
<s>
This	O
made	O
the	O
Meiko	B-Device
Computing	I-Device
Surface	I-Device
uneconomic	O
for	O
many	O
applications	O
.	O
</s>
<s>
MeikOS	B-Device
(	O
also	O
written	O
as	O
Meikos	B-Device
or	O
MEiKOS	B-Device
)	O
is	O
a	O
Unix-like	B-Operating_System
transputer	B-General_Concept
operating	B-General_Concept
system	I-General_Concept
developed	O
for	O
the	O
Computing	B-Device
Surface	I-Device
during	O
the	O
late	O
1980s	O
.	O
</s>
<s>
MeikOS	B-Device
was	O
derived	O
from	O
an	O
early	O
version	O
of	O
Minix	B-Operating_System
,	O
extensively	O
modified	O
for	O
the	O
Computing	B-Device
Surface	I-Device
architecture	O
.	O
</s>
<s>
Unlike	O
HeliOS	B-Operating_System
,	O
another	O
Unix-like	B-Operating_System
transputer	B-General_Concept
operating	B-General_Concept
system	I-General_Concept
,	O
MeikOS	B-Device
is	O
essentially	O
a	O
single-processor	O
operating	B-General_Concept
system	I-General_Concept
with	O
a	O
distributed	O
file	B-Application
system	I-Application
.	O
</s>
<s>
MeikOS	B-Device
was	O
intended	O
for	O
use	O
with	O
the	O
Meiko	O
Multiple	O
Virtual	O
Computing	B-Device
Surfaces	I-Device
(	O
M²VCS	O
)	O
resource	O
management	O
software	O
,	O
which	O
partitions	O
the	O
processors	O
of	O
a	O
Computing	B-Device
Surface	I-Device
into	O
domains	O
,	O
manages	O
user	O
access	O
to	O
these	O
domains	O
,	O
and	O
provides	O
inter-domain	O
communication	O
.	O
</s>
<s>
MeikOS	B-Device
has	O
diskless	B-Device
and	O
fileserver	O
variants	O
,	O
the	O
former	O
running	O
on	O
the	O
seat	O
processor	O
of	O
an	O
M²VCS	O
domain	O
,	O
providing	O
a	O
command	B-Application
line	I-Application
user	O
interface	O
for	O
a	O
given	O
user	O
;	O
the	O
latter	O
running	O
on	O
processors	O
with	O
attached	O
SCSI	B-Architecture
hard	O
disks	O
,	O
providing	O
a	O
remote	O
file	O
service	O
(	O
named	O
Surface	O
File	B-Application
System	I-Application
(	O
SFS	O
)	O
)	O
to	O
instances	O
of	O
diskless	B-Device
MeikOS	B-Device
.	O
</s>
<s>
MeikOS	B-Device
was	O
made	O
obsolete	O
by	O
the	O
introduction	O
of	O
the	O
In-Sun	O
Computing	B-Device
Surface	I-Device
and	O
the	O
Meiko	O
MK083	O
SPARC	B-Architecture
processor	O
board	O
,	O
which	O
allow	O
SunOS	B-Operating_System
and	O
Sun	O
Virtual	O
Computing	B-Device
Surfaces	I-Device
(	O
SVCS	O
)	O
,	O
later	O
developed	O
as	O
VCS	O
to	O
take	O
over	O
the	O
roles	O
of	O
MeikOS	B-Device
and	O
M²VCS	O
respectively	O
.	O
</s>
<s>
The	O
last	O
MeikOS	B-Device
release	O
was	O
MeikOS	B-Device
3.06	O
,	O
in	O
early	O
1991	O
.	O
</s>
<s>
This	O
was	O
based	O
on	O
the	O
transputer	B-General_Concept
link	O
protocol	O
.	O
</s>
<s>
Meiko	O
developed	O
its	O
own	O
switch	B-Protocol
silicon	O
on	O
and	O
European	O
Silicon	O
Systems	O
,	O
ES2	O
gate	O
array	O
.	O
</s>
<s>
The	O
CS-2	O
was	O
launched	O
in	O
1993	O
and	O
was	O
Meiko	O
's	O
second-generation	O
system	O
architecture	O
,	O
superseding	O
the	O
earlier	O
Computing	B-Device
Surface	I-Device
.	O
</s>
<s>
The	O
CS-2	O
was	O
an	O
all-new	O
modular	O
architecture	O
based	O
around	O
SuperSPARC	B-Architecture
or	O
hyperSPARC	B-General_Concept
processors	O
and	O
,	O
optionally	O
,	O
Fujitsu	O
μVP	O
vector	B-Operating_System
processors	I-Operating_System
.	O
</s>
<s>
These	O
implemented	O
an	O
instruction	O
set	O
similar	O
to	O
the	O
Fujitsu	B-Device
VP2000	I-Device
vector	O
supercomputer	B-Architecture
and	O
had	O
a	O
nominal	O
performance	O
of	O
200	O
megaflops	O
on	O
double	O
precision	O
arithmetic	O
and	O
double	O
that	O
on	O
single	O
precision	O
.	O
</s>
<s>
The	O
SuperSPARC	B-Architecture
processors	O
ran	O
at	O
40MHz	O
initially	O
,	O
later	O
increased	O
to	O
50MHz	O
.	O
</s>
<s>
Subsequently	O
,	O
hyperSPARC	B-General_Concept
processors	O
were	O
introduced	O
at	O
66	O
,	O
90	O
or	O
100MHz	O
.	O
</s>
<s>
The	O
CS-2	O
ran	O
a	O
customized	O
version	O
of	O
Sun	O
's	O
operating	B-General_Concept
system	I-General_Concept
Solaris	B-Application
,	O
initially	O
Solaris	B-Application
2.1	O
,	O
later	O
2.3	O
and	O
2.5.1	O
.	O
</s>
<s>
The	O
processors	O
in	O
a	O
CS-2	O
were	O
connected	O
by	O
a	O
Meiko-designed	O
multi-stage	O
packet-switched	B-Protocol
fat	B-Protocol
tree	I-Protocol
network	O
implemented	O
in	O
custom	O
silicon	O
.	O
</s>
<s>
This	O
project	O
,	O
codenamed	O
Elan-Elite	O
,	O
was	O
started	O
in	O
1990	O
,	O
as	O
a	O
speculative	O
project	O
to	O
compete	O
with	O
the	O
T9000	B-General_Concept
Transputer	B-General_Concept
from	O
Inmos	O
,	O
which	O
Meiko	O
intended	O
to	O
use	O
as	O
an	O
interconnect	O
technology	O
.	O
</s>
<s>
The	O
T9000	B-General_Concept
began	O
to	O
suffer	O
massive	O
delays	O
,	O
such	O
that	O
the	O
internal	O
project	O
became	O
the	O
only	O
viable	O
interconnect	O
choice	O
for	O
the	O
CS-2	O
.	O
</s>
<s>
This	O
interconnect	O
comprised	O
two	O
devices	O
,	O
code-named	O
Elan	O
(	O
adapter	B-Protocol
)	O
and	O
Elite	O
(	O
switch	B-Protocol
)	O
.	O
</s>
<s>
Each	O
processing	O
element	O
included	O
an	O
Elan	O
chip	O
,	O
a	O
communications	O
co-processor	O
based	O
on	O
the	O
SPARC	B-Architecture
architecture	O
,	O
accessed	O
via	O
a	O
Sun	B-Architecture
MBus	I-Architecture
cache	B-General_Concept
coherent	I-General_Concept
interface	O
and	O
providing	O
two	O
50MB/s	O
bi-directional	O
links	O
.	O
</s>
<s>
The	O
Elite	O
chip	O
was	O
an	O
8-way	O
link	O
crossbar	O
switch	B-Protocol
,	O
used	O
to	O
form	O
the	O
packet-switched	B-Protocol
network	I-Protocol
.	O
</s>
<s>
The	O
switch	B-Protocol
had	O
limited	O
adaption	O
based	O
on	O
load	O
and	O
priority	O
.	O
</s>
<s>
Both	O
ASICs	O
were	O
fabbed	O
in	O
complementary	O
metal	O
–	O
oxide	O
–	O
semiconductor	O
(	O
CMOS	B-Device
)	O
gate	O
arrays	O
by	O
GEC	O
Plessey	O
in	O
their	O
Roborough	O
,	O
Plymouth	B-Application
semi-conductor	O
fab	O
in	O
1993	O
.	O
</s>
<s>
After	O
the	O
Meiko	O
technology	O
was	O
acquired	O
by	O
Quadrics	B-General_Concept
,	O
the	O
Elan/Elite	O
interconnect	O
technology	O
was	O
developed	O
into	O
QsNet	B-Architecture
.	O
</s>
<s>
Together	O
,	O
they	O
designed	O
and	O
developed	O
an	O
improved	O
,	O
higher	O
performance	O
FPU	B-General_Concept
core	O
,	O
owned	O
by	O
Meiko	O
.	O
</s>
<s>
A	O
chance	O
discussion	O
between	O
McLaren	O
and	O
Andy	O
Bechtolsheim	O
while	O
visiting	O
Sun	O
Microsystems	O
to	O
discuss	O
licensing	O
Solaris	B-Application
caused	O
Meiko	O
to	O
re-target	O
the	O
design	O
for	O
SPARC	B-Architecture
.	O
</s>
<s>
Meiko	O
was	O
able	O
to	O
turn	O
around	O
the	O
core	O
FPU	B-General_Concept
design	O
in	O
a	O
short	O
time	O
and	O
LSI	O
Logic	O
fabbed	O
a	O
device	O
for	O
the	O
SPARCstation	B-Architecture
1	I-Architecture
.	O
</s>
<s>
A	O
major	O
difference	O
over	O
the	O
T800	O
FPU	B-General_Concept
was	O
that	O
it	O
fully	O
implemented	O
the	O
IEEE	O
754	O
standard	O
for	O
computer	O
arithmetic	O
.	O
</s>
<s>
This	O
including	O
all	O
rounding	O
modes	O
,	O
denormalised	O
numbers	O
and	O
square	O
root	O
in	O
hardware	B-Architecture
without	O
taking	O
any	O
hardware	B-General_Concept
exceptions	I-General_Concept
to	O
complete	O
computation	O
.	O
</s>
<s>
A	O
SPARCstation	B-Architecture
2	I-Architecture
design	O
was	O
also	O
developed	O
together	O
with	O
a	O
combined	O
part	O
targeting	O
the	O
SPARCstation	B-Architecture
2	I-Architecture
ASIC	O
pinout	O
.	O
</s>
<s>
LSI	O
fabbed	O
and	O
manufactured	O
the	O
separate	O
FPU	B-General_Concept
L64814	O
,	O
as	O
part	O
of	O
their	O
SparKIT	O
chipset	O
.	O
</s>
<s>
The	O
Meiko	O
design	O
was	O
eventually	O
fully	O
licensed	O
to	O
Sun	O
which	O
went	O
on	O
to	O
use	O
it	O
in	O
the	O
MicroSPARC	B-Device
family	O
of	O
ASICs	O
for	O
several	O
generations	O
in	O
return	O
for	O
a	O
one-off	O
payment	O
and	O
full	O
Solaris	B-Application
source	O
license	O
.	O
</s>
