<s>
The	O
media-independent	B-Protocol
interface	I-Protocol
(	O
MII	O
)	O
was	O
originally	O
defined	O
as	O
a	O
standard	O
interface	O
to	O
connect	O
a	O
Fast	B-Protocol
Ethernet	I-Protocol
(	O
i.e.	O
,	O
)	O
media	B-Protocol
access	I-Protocol
control	I-Protocol
(	O
MAC	O
)	O
block	O
to	O
a	O
PHY	O
chip	O
.	O
</s>
<s>
The	O
MII	O
is	O
standardized	O
by	O
IEEE	B-Protocol
802.3u	I-Protocol
and	O
connects	O
different	O
types	O
of	O
PHYs	O
to	O
MACs	O
.	O
</s>
<s>
twisted	B-Protocol
pair	I-Protocol
,	O
fiber	B-Architecture
optic	I-Architecture
,	O
etc	O
.	O
)	O
</s>
<s>
On	O
a	O
PC	O
the	O
CNR	B-Device
connector	I-Device
Type	O
B	O
carries	O
MII	O
signals	O
.	O
</s>
<s>
Network	O
data	O
on	O
the	O
interface	O
is	O
framed	B-Protocol
using	O
the	O
IEEE	O
Ethernet	O
standard	O
.	O
</s>
<s>
As	O
such	O
it	O
consists	O
of	O
a	O
preamble	O
,	O
start	B-Protocol
frame	I-Protocol
delimiter	I-Protocol
,	O
Ethernet	O
headers	O
,	O
protocol-specific	O
data	O
and	O
a	O
cyclic	O
redundancy	O
check	O
(	O
CRC	O
)	O
.	O
</s>
<s>
At	O
power	O
up	O
,	O
using	O
autonegotiation	B-Protocol
,	O
the	O
PHY	O
usually	O
adapts	O
to	O
whatever	O
it	O
is	O
connected	O
to	O
unless	O
settings	O
are	O
altered	O
via	O
the	O
MDIO	O
interface	O
.	O
</s>
<s>
The	O
MII	O
Status	O
Word	O
is	O
the	O
most	O
useful	O
datum	O
,	O
since	O
it	O
may	O
be	O
used	O
to	O
detect	O
whether	O
an	O
Ethernet	B-Protocol
NIC	I-Protocol
is	O
connected	O
to	O
a	O
network	O
.	O
</s>
<s>
As	O
with	O
I²C	O
,	O
the	O
interface	O
is	O
a	O
multidrop	B-Architecture
bus	I-Architecture
so	O
MDC	O
and	O
MDIO	O
can	O
be	O
shared	O
among	O
multiple	O
PHYs	O
.	O
</s>
<s>
Reduced	O
media-independent	B-Protocol
interface	I-Protocol
(	O
RMII	O
)	O
is	O
a	O
standard	O
which	O
was	O
developed	O
to	O
reduce	O
the	O
number	O
of	O
signals	O
required	O
to	O
connect	O
a	O
PHY	O
to	O
a	O
MAC	O
.	O
</s>
<s>
Reducing	O
pin	O
count	O
reduces	O
cost	O
and	O
complexity	O
for	O
network	O
hardware	O
especially	O
in	O
the	O
context	O
of	O
microcontrollers	B-Architecture
with	O
built-in	O
MAC	O
,	O
FPGAs	B-Architecture
,	O
multiport	O
switches	O
or	O
repeaters	O
,	O
and	O
PC	O
motherboard	O
chipsets	O
.	O
</s>
<s>
+	O
Reduced	O
media-independent	B-Protocol
interface	I-Protocol
(	O
RMII	O
)	O
signals	O
Signal	O
name	O
Description	O
Direction	O
REF_CLK	O
Continuous	O
50	O
MHz	O
reference	O
clock	O
Reference	O
clock	O
may	O
be	O
an	O
input	O
on	O
both	O
devices	O
from	O
an	O
external	O
clock	O
source	O
,	O
or	O
may	O
be	O
driven	O
from	O
the	O
MAC	O
to	O
the	O
PHY	O
,	O
or	O
may	O
be	O
driven	O
from	O
the	O
PHY	O
to	O
the	O
MAC	O
TXD0	O
Transmit	O
data	O
bit	O
0	O
(	O
transmitted	O
first	O
)	O
MAC	O
to	O
PHY	O
TXD1	O
Transmit	O
data	O
bit	O
1	O
MAC	O
to	O
PHY	O
TX_EN	O
When	O
high	O
,	O
clock	O
data	O
on	O
TXD0	O
and	O
TXD1	O
to	O
the	O
transmitter	O
MAC	O
to	O
PHY	O
RXD0	O
Receive	O
data	O
bit	O
0	O
(	O
received	O
first	O
)	O
PHY	O
to	O
MAC	O
RXD1	O
Receive	O
data	O
bit	O
1	O
PHY	O
to	O
MAC	O
CRS_DV	O
Carrier	O
Sense	O
(	O
CRS	O
)	O
and	O
RX_Data	O
Valid	O
(	O
RX_DV	O
)	O
multiplexed	O
on	O
alternate	O
clock	O
cycles	O
.	O
</s>
<s>
Version	O
1.2	O
of	O
the	O
RMII	O
Consortium	O
specification	O
states	O
that	O
its	O
MDIO/MDC	O
interface	O
is	O
identical	O
to	O
that	O
specified	O
for	O
MII	O
in	O
IEEE	B-Protocol
802.3u	I-Protocol
.	O
</s>
<s>
The	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
GMII	O
)	O
is	O
an	O
interface	O
between	O
the	O
medium	B-Protocol
access	I-Protocol
control	I-Protocol
(	O
MAC	O
)	O
device	O
and	O
the	O
physical	B-Application
layer	I-Application
(	O
PHY	O
)	O
.	O
</s>
<s>
The	O
reduced	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
RGMII	O
)	O
uses	O
half	O
the	O
number	O
of	O
data	O
pins	O
as	O
are	O
used	O
in	O
the	O
GMII	O
interface	O
.	O
</s>
<s>
The	O
serial	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
SGMII	B-Protocol
)	O
is	O
a	O
variant	O
of	O
MII	O
used	O
for	O
Gigabit	O
Ethernet	O
but	O
can	O
also	O
carry	O
10/100Mbit/s	O
Ethernet	O
.	O
</s>
<s>
It	O
differs	O
from	O
GMII	O
by	O
its	O
low-power	O
and	O
low	O
pin-count	O
8b/10b	B-Protocol
-coded	O
SerDes	O
.	O
</s>
<s>
The	O
high	O
serial	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
HSGMII	O
)	O
is	O
functionally	O
similar	O
to	O
the	O
SGMII	B-Protocol
but	O
supports	O
link	O
speeds	O
of	O
up	O
to	O
2.5Gbit/s	O
.	O
</s>
<s>
The	O
quad	O
serial	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
QSGMII	B-Protocol
)	O
is	O
a	O
method	O
of	O
combining	O
four	O
SGMII	B-Protocol
lines	O
into	O
a	O
5Gbit/s	O
interface	O
.	O
</s>
<s>
QSGMII	B-Protocol
,	O
like	O
SGMII	B-Protocol
,	O
uses	O
low-voltage	B-Architecture
differential	I-Architecture
signaling	I-Architecture
(	O
LVDS	B-Architecture
)	O
for	O
the	O
TX	O
and	O
RX	O
data	O
,	O
and	O
a	O
single	O
LVDS	B-Architecture
clock	O
signal	O
.	O
</s>
<s>
QSGMII	B-Protocol
uses	O
significantly	O
fewer	O
signal	O
lines	O
than	O
four	O
separate	O
SGMII	B-Protocol
connections	O
.	O
</s>
<s>
10	O
gigabit	O
media-independent	B-Protocol
interface	I-Protocol
(	O
XGMII	O
)	O
is	O
a	O
standard	O
defined	O
in	O
IEEE	O
802.3	O
designed	O
for	O
connecting	O
full	O
duplex	O
10	O
Gigabit	O
Ethernet	O
(	O
10GbE	O
)	O
ports	O
to	O
each	O
other	O
and	O
to	O
other	O
electronic	O
devices	O
on	O
a	O
printed	O
circuit	O
board	O
(	O
PCB	O
)	O
.	O
</s>
<s>
PCB	O
connections	O
are	O
now	O
mostly	O
accomplished	O
with	O
XAUI	B-Protocol
.	O
</s>
