<s>
Maxwell	B-General_Concept
is	O
the	O
codename	O
for	O
a	O
GPU	B-Architecture
microarchitecture	B-General_Concept
developed	O
by	O
Nvidia	O
as	O
the	O
successor	O
to	O
the	O
Kepler	B-General_Concept
microarchitecture	B-General_Concept
.	O
</s>
<s>
The	O
Maxwell	B-General_Concept
architecture	I-General_Concept
was	O
introduced	O
in	O
later	O
models	O
of	O
the	O
GeForce	O
700	O
series	O
and	O
is	O
also	O
used	O
in	O
the	O
GeForce	O
800M	O
series	O
,	O
GeForce	O
900	O
series	O
,	O
and	O
Quadro	B-Application
Mxxx	O
series	O
,	O
as	O
well	O
as	O
some	O
Jetson	O
products	O
,	O
all	O
manufactured	O
with	O
TSMC	O
's	O
28	B-Algorithm
nm	I-Algorithm
process	O
.	O
</s>
<s>
The	O
first	O
Maxwell-based	O
products	O
were	O
the	O
GeForce	O
GTX	O
745	O
(	O
OEM	O
)	O
,	O
GeForce	O
GTX	O
750	O
,	O
and	O
the	O
GeForce	O
GTX	O
750	O
Ti	O
.	O
</s>
<s>
Earlier	O
GeForce	O
700	O
series	O
GPUs	B-Architecture
had	O
used	O
Kepler	B-General_Concept
chips	O
with	O
the	O
code	O
numbers	O
GK1xx	O
.	O
</s>
<s>
First-generation	O
Maxwell	B-General_Concept
GPUs	B-Architecture
(	O
code	O
numbers	O
GM10x	O
)	O
are	O
also	O
used	O
in	O
the	O
GeForce	O
800M	O
series	O
and	O
the	O
Quadro	B-Application
Kxxx	O
series	O
.	O
</s>
<s>
A	O
second	O
generation	O
of	O
Maxwell-based	O
products	O
was	O
introduced	O
on	O
September	O
18	O
,	O
2014	O
with	O
the	O
GeForce	O
GTX	O
970	O
and	O
GeForce	O
GTX	O
980	O
,	O
followed	O
by	O
the	O
GeForce	O
GTX	O
960	O
on	O
January	O
22	O
,	O
2015	O
,	O
the	O
GeForce	O
GTX	O
Titan	O
X	O
on	O
March	O
17	O
,	O
2015	O
,	O
and	O
the	O
GeForce	O
GTX	O
980	O
Ti	O
on	O
June	O
1	O
,	O
2015	O
.	O
</s>
<s>
These	O
GPUs	B-Architecture
have	O
GM20x	O
chip	O
code	O
numbers	O
.	O
</s>
<s>
Maxwell	B-General_Concept
introduced	O
an	O
improved	O
Streaming	O
Multiprocessor	O
(	O
SM	O
)	O
design	O
that	O
increased	O
power	O
efficiency	O
,	O
the	O
sixth	O
and	O
seventh	O
generation	O
PureVideo	O
HD	O
,	O
and	O
CUDA	B-Architecture
Compute	O
Capability	O
5.2	O
.	O
</s>
<s>
The	O
architecture	O
is	O
named	O
after	O
James	O
Clerk	O
Maxwell	B-General_Concept
,	O
the	O
founder	O
of	O
the	O
theory	O
of	O
electromagnetic	O
radiation	O
.	O
</s>
<s>
The	O
Maxwell	B-General_Concept
architecture	I-General_Concept
is	O
used	O
in	O
the	O
system	O
on	O
a	O
chip	O
(	O
SOC	O
)	O
,	O
mobile	O
application	O
processor	O
,	O
Tegra	O
X1	O
.	O
</s>
<s>
First	O
generation	O
Maxwell	B-General_Concept
GPUs	B-Architecture
(	O
GM107/GM108	O
)	O
were	O
released	O
as	O
GeForce	O
GTX	O
745	O
,	O
GTX	O
750/750	O
Ti	O
,	O
GTX	O
850M/860M	O
(	O
GM107	O
)	O
and	O
GeForce	O
830M/840M	O
(	O
GM108	O
)	O
.	O
</s>
<s>
These	O
new	O
chips	O
introduced	O
few	O
consumer-facing	O
additional	O
features	O
,	O
as	O
Nvidia	O
instead	O
focused	O
more	O
on	O
increasing	O
GPU	B-Architecture
power	O
efficiency	O
.	O
</s>
<s>
The	O
L2	O
cache	O
was	O
increased	O
from	O
256KiB	O
on	O
Kepler	B-General_Concept
to	O
2MiB	O
on	O
Maxwell	B-General_Concept
,	O
reducing	O
the	O
need	O
for	O
more	O
memory	O
bandwidth	O
.	O
</s>
<s>
Accordingly	O
,	O
the	O
memory	O
bus	O
was	O
reduced	O
from	O
192	O
bit	O
on	O
Kepler	B-General_Concept
(	O
GK106	O
)	O
to	O
128	O
bit	O
,	O
reducing	O
die	O
area	O
,	O
cost	O
,	O
and	O
power	O
draw	O
.	O
</s>
<s>
The	O
"	O
SMX	O
"	O
streaming	O
multiprocessor	O
design	O
from	O
Kepler	B-General_Concept
was	O
also	O
retooled	O
and	O
partitioned	O
,	O
being	O
renamed	O
"	O
SMM	O
"	O
for	O
Maxwell	B-General_Concept
.	O
</s>
<s>
The	O
structure	O
of	O
the	O
warp	O
scheduler	O
was	O
inherited	O
from	O
Kepler	B-General_Concept
,	O
with	O
the	O
texture	O
units	O
and	O
FP64	O
CUDA	B-Architecture
cores	O
still	O
shared	O
,	O
but	O
the	O
layout	O
of	O
most	O
execution	O
units	O
were	O
partitioned	O
so	O
that	O
each	O
warp	O
schedulers	O
in	O
an	O
SMM	O
controls	O
one	O
set	O
of	O
32	O
FP32	O
CUDA	B-Architecture
cores	O
,	O
one	O
set	O
of	O
8	O
load/store	O
units	O
and	O
one	O
set	O
of	O
8	O
special	O
function	O
units	O
.	O
</s>
<s>
This	O
is	O
in	O
contrast	O
to	O
Kepler	B-General_Concept
,	O
where	O
each	O
SMX	O
had	O
4	O
schedulers	O
that	O
scheduled	O
to	O
a	O
shared	O
pool	O
of	O
execution	O
units	O
.	O
</s>
<s>
Conversely	O
,	O
Maxwell	B-General_Concept
's	O
more	O
modular	O
design	O
allows	O
for	O
a	O
finer-grained	O
and	O
more	O
efficient	O
allocation	O
of	O
resources	O
,	O
saving	O
power	O
when	O
the	O
workload	O
is	O
n't	O
optimal	O
for	O
shared	O
resources	O
.	O
</s>
<s>
Also	O
,	O
each	O
Graphics	O
Processing	O
Cluster	O
,	O
or	O
GPC	O
,	O
contains	O
up	O
to	O
4	O
SMX	O
units	O
in	O
Kepler	B-General_Concept
,	O
and	O
up	O
to	O
5	O
SMM	O
units	O
in	O
first	O
generation	O
Maxwell	B-General_Concept
.	O
</s>
<s>
GM107	O
also	O
supports	O
CUDA	B-Architecture
Compute	O
Capability	O
5.0	O
compared	O
to	O
3.5	O
on	O
GK110/GK208	O
GPUs	B-Architecture
and	O
3.0	O
on	O
GK10x	O
GPUs	B-Architecture
.	O
</s>
<s>
Dynamic	O
Parallelism	O
and	O
HyperQ	O
,	O
two	O
features	O
in	O
GK110/GK208	O
GPUs	B-Architecture
,	O
are	O
also	O
supported	O
across	O
the	O
entire	O
Maxwell	B-General_Concept
product	O
line	O
.	O
</s>
<s>
Maxwell	B-General_Concept
also	O
provides	O
native	O
shared	O
memory	O
atomic	O
operations	O
for	O
32-bit	O
integers	O
and	O
native	O
shared	O
memory	O
32-bit	O
and	O
64-bit	O
compare-and-swap	O
(	O
CAS	O
)	O
,	O
which	O
can	O
be	O
used	O
to	O
implement	O
other	O
atomic	O
functions	O
.	O
</s>
<s>
Nvidia	O
's	O
video	O
encoder	O
,	O
NVENC	B-General_Concept
,	O
was	O
upgraded	O
to	O
be	O
1.5	O
to	O
2	O
times	O
faster	O
than	O
on	O
Kepler-based	O
GPUs	B-Architecture
,	O
meaning	O
it	O
can	O
encode	O
video	O
at	O
six	O
to	O
eight	O
times	O
playback	O
speed	O
.	O
</s>
<s>
However	O
,	O
H.265	B-Algorithm
is	O
not	O
supported	O
for	O
full	O
hardware	O
decoding	O
in	O
first	O
generation	O
Maxwell	B-General_Concept
GPUs	B-Architecture
,	O
relying	O
on	O
a	O
mix	O
of	O
hardware	O
and	O
software	O
decoding	O
.	O
</s>
<s>
When	O
decoding	O
video	O
,	O
a	O
new	O
low	O
power	O
state	O
"	O
GC5	O
"	O
is	O
used	O
on	O
Maxwell	B-General_Concept
GPUs	B-Architecture
to	O
conserve	O
power	O
.	O
</s>
<s>
Maxwell	B-General_Concept
GPUs	B-Architecture
were	O
thought	O
to	O
use	O
tile-based	O
rendering	O
,	O
but	O
they	O
actually	O
use	O
tiled	O
caching	O
.	O
</s>
<s>
Second	O
generation	O
Maxwell	B-General_Concept
GPUs	B-Architecture
introduced	O
several	O
new	O
technologies	O
:	O
Dynamic	O
Super	O
Resolution	O
,	O
Third	O
Generation	O
Delta	O
Color	O
Compression	O
,	O
Multi-Pixel	O
Programming	O
Sampling	O
,	O
Nvidia	O
VXGI	B-Algorithm
(	O
Real-Time-Voxel-Global	O
Illumination	O
)	O
,	O
VR	O
Direct	O
,	O
Multi-Projection	O
Acceleration	O
,	O
Multi-Frame	O
Sampled	O
Anti-Aliasing(MFAA )	O
(	O
however	O
,	O
support	O
for	O
Coverage-Sampling	O
Anti-Aliasing(CSAA )	O
was	O
removed	O
)	O
,	O
and	O
Direct3D12	O
API	O
at	O
Feature	O
Level	O
12_1	O
.	O
</s>
<s>
The	O
Polymorph	O
Engine	O
responsible	O
for	O
tessellation	B-Algorithm
was	O
upgraded	O
to	O
version	O
3.0	O
in	O
second	O
generation	O
Maxwell	B-General_Concept
GPUs	B-Architecture
,	O
resulting	O
in	O
improved	O
tessellation	B-Algorithm
performance	O
per	O
unit/clock	O
.	O
</s>
<s>
Second	O
generation	O
Maxwell	B-General_Concept
also	O
has	O
up	O
to	O
4	O
SMM	O
units	O
per	O
GPC	O
,	O
compared	O
to	O
5	O
SMM	O
units	O
per	O
GPC	O
.	O
</s>
<s>
GM204	O
supports	O
CUDA	B-Architecture
Compute	O
Capability	O
5.2	O
(	O
compared	O
to	O
5.0	O
on	O
GM107/GM108	O
GPUs	B-Architecture
,	O
3.5	O
on	O
GK110/GK208	O
GPUs	B-Architecture
and	O
3.0	O
on	O
GK10x	O
GPUs	B-Architecture
)	O
.	O
</s>
<s>
GM20x	O
GPUs	B-Architecture
have	O
an	O
upgraded	O
NVENC	B-General_Concept
which	O
supports	O
HEVC	B-Algorithm
encoding	O
and	O
adds	O
support	O
for	O
H.264	O
encoding	O
resolutions	O
at	O
1440p/60FPS	O
&	O
4K/60FPS	O
(	O
compared	O
to	O
NVENC	B-General_Concept
on	O
Maxwell	B-General_Concept
first	O
generation	O
GM10x	O
GPUs	B-Architecture
which	O
only	O
supported	O
H.264	O
1080p/60FPS	O
encoding	O
)	O
.	O
</s>
<s>
The	O
peak	O
speed	O
of	O
such	O
a	O
GPU	B-Architecture
can	O
still	O
be	O
attained	O
,	O
but	O
the	O
peak	O
speed	O
figure	O
is	O
only	O
reachable	O
if	O
one	O
segment	O
is	O
executing	O
a	O
read	O
operation	O
while	O
the	O
other	O
segment	O
is	O
executing	O
a	O
write	O
operation	O
.	O
</s>
<s>
The	O
theoretical	O
single-precision	O
processing	O
power	O
of	O
a	O
Maxwell	B-General_Concept
GPU	B-Architecture
in	O
FLOPS	O
is	O
computed	O
as	O
2	O
(	O
operations	O
per	O
FMA	O
instruction	O
per	O
CUDA	B-Architecture
core	O
per	O
cycle	O
)	O
×	O
number	O
of	O
CUDA	B-Architecture
cores	O
×	O
core	O
clock	O
speed	O
(	O
in	O
Hz	O
)	O
.	O
</s>
<s>
The	O
theoretical	O
double-precision	O
processing	O
power	O
of	O
a	O
Maxwell	B-General_Concept
GPU	B-Architecture
is	O
1/32	O
of	O
the	O
single	O
precision	O
performance	O
(	O
which	O
has	O
been	O
noted	O
as	O
being	O
very	O
low	O
compared	O
to	O
the	O
previous	O
generation	O
Kepler	B-General_Concept
)	O
.	O
</s>
<s>
The	O
successor	O
to	O
Maxwell	B-General_Concept
is	O
codenamed	O
Pascal	B-General_Concept
.	O
</s>
<s>
The	O
Pascal	B-General_Concept
architecture	O
features	O
higher	O
bandwidth	O
unified	O
memory	O
and	O
NVLink	O
.	O
</s>
