<s>
The	O
Massbus	B-Architecture
is	O
a	O
high-performance	O
computer	O
input/output	B-General_Concept
bus	B-General_Concept
designed	O
in	O
the	O
1970s	O
by	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
.	O
</s>
<s>
The	O
bus	B-General_Concept
was	O
used	O
by	O
Digital	O
to	O
interconnect	B-General_Concept
its	O
highest-performance	O
computers	O
with	O
magnetic	B-Architecture
disk	I-Architecture
and	O
magnetic	O
tape	O
storage	O
equipment	O
.	O
</s>
<s>
The	O
use	O
of	O
a	O
common	O
bus	B-General_Concept
was	O
intended	O
to	O
allow	O
a	O
single	O
controller	B-Device
design	O
to	O
handle	O
multiple	O
peripheral	O
models	O
,	O
and	O
allowed	O
the	O
PDP-10	B-Device
,	O
PDP-11	B-Device
,	O
and	O
VAX	B-Device
computer	O
families	O
to	O
share	O
a	O
common	O
set	O
of	O
peripherals	O
.	O
</s>
<s>
At	O
the	O
time	O
there	O
were	O
multiple	O
operating	B-General_Concept
systems	I-General_Concept
for	O
each	O
of	O
the	O
16-bit	O
,	O
32-bit	O
,	O
and	O
36-bit	O
computer	O
lines	O
.	O
</s>
<s>
The	O
18-bit	O
PDP-15/40	O
connected	O
to	O
Massbus	B-Architecture
peripherals	O
via	O
a	O
PDP-11	B-Device
front	O
end	O
.	O
</s>
<s>
An	O
engineering	O
goal	O
was	O
to	O
reduce	O
the	O
need	O
for	O
a	O
new	O
driver	O
per	O
peripheral	O
per	O
operating	B-General_Concept
system	I-General_Concept
per	O
computer	O
family	O
.	O
</s>
<s>
Also	O
,	O
a	O
major	O
technical	O
goal	O
was	O
to	O
place	O
any	O
magnetic	O
technology	O
changes	O
(	O
data	O
separators	O
)	O
into	O
the	O
storage	O
device	O
rather	O
than	O
in	O
the	O
CPU-attached	O
controller	B-Device
.	O
</s>
<s>
Thus	O
the	O
CPU	O
I/O	B-General_Concept
or	O
memory	O
bus	B-General_Concept
to	O
Massbus	B-Architecture
adapter	O
needed	O
no	O
changes	O
for	O
multiple	O
generations	O
of	O
storage	O
technology	O
.	O
</s>
<s>
The	O
first	O
Massbus	B-Architecture
device	O
was	O
the	O
RP04	O
,	O
based	O
on	O
Sperry	O
Univac	O
Information	O
Storage	O
Systems	O
's	O
(	O
ISS	O
)	O
clone	O
of	O
the	O
IBM	B-Device
3330	I-Device
.	O
</s>
<s>
Multiple	O
generations	O
of	O
tape	O
technology	O
and	O
performance	O
were	O
also	O
Massbus	B-Architecture
connected	O
although	O
the	O
architecture	O
was	O
a	O
Master	O
Massbus	B-Architecture
drive	O
and	O
slave	O
tape	O
drives	O
.	O
</s>
<s>
DEC	O
also	O
developed	O
the	O
Massbus	B-Architecture
RS03/04	O
,	O
a	O
head	O
per	O
track	O
disk	O
drive	O
for	O
high	O
performance	O
swapping	O
.	O
</s>
<s>
The	O
last	O
Massbus	B-Architecture
disk	O
drive	O
was	O
the	O
DEC	O
designed	O
RM80	O
as	O
DEC	O
shifted	O
to	O
internal	O
development	O
of	O
large	O
disks	O
.	O
</s>
<s>
The	O
bus	B-General_Concept
is	O
logically	O
implemented	O
as	O
two	O
separate	O
sections	O
:	O
</s>
<s>
A	O
high-speed	O
,	O
synchronous	O
data	B-General_Concept
bus	I-General_Concept
that	O
is	O
used	O
to	O
carry	O
the	O
actual	O
data	O
transfers	O
between	O
the	O
storage	O
devices	O
and	O
the	O
host	O
bus	B-General_Concept
adapter	O
.	O
</s>
<s>
The	O
data	B-General_Concept
bus	I-General_Concept
is	O
18	O
bits	O
wide	O
plus	O
parity	O
.	O
</s>
<s>
The	O
RP04	O
and	O
RP06	O
disks	O
were	O
comparable	O
to	O
the	O
100	O
Mb	O
IBM	B-Device
3330	I-Device
Mod	O
I	O
and	O
IBM	O
's	O
200	O
Mb	O
Model	O
II	O
thereof	O
.	O
</s>
<s>
TU78/TA78	O
6250	O
GCR	O
The	O
1600/6250	O
BPI	O
TU78	O
uses	O
DEC	O
's	O
Massbus	B-Architecture
,	O
whereas	O
the	O
TA78	O
uses	O
the	O
HSC50	B-Operating_System
controller	B-Device
.	O
</s>
