<s>
MasPar	B-Device
Computer	I-Device
Corporation	I-Device
was	O
a	O
minisupercomputer	B-Device
vendor	O
that	O
was	O
founded	O
in	O
1987	O
by	O
Jeff	O
Kalb	O
.	O
</s>
<s>
While	O
Kalb	O
was	O
the	O
vice-president	O
of	O
the	O
division	O
of	O
Digital	O
Equipment	O
Corporation	O
(	O
DEC	O
)	O
that	O
built	O
integrated	O
circuits	O
,	O
some	O
researchers	O
in	O
that	O
division	O
were	O
building	O
a	O
supercomputer	O
based	O
on	O
the	O
Goodyear	B-Device
MPP	I-Device
(	O
massively	O
parallel	O
processor	O
)	O
supercomputer	O
.	O
</s>
<s>
After	O
Digital	O
decided	O
not	O
to	O
commercialize	O
the	O
research	O
project	O
,	O
Kalb	O
decided	O
to	O
start	O
a	O
company	O
to	O
sell	O
this	O
minisupercomputer	B-Device
.	O
</s>
<s>
MasPar	B-Device
along	O
with	O
nCUBE	B-Application
criticized	O
the	O
open	O
government	O
support	O
,	O
by	O
DARPA	O
,	O
of	O
competitors	O
Intel	O
for	O
their	O
hypercube	O
Personal	O
SuperComputers	O
(	O
iPSC	B-Device
)	O
and	O
the	O
Thinking	O
Machines	O
Connection	B-Device
Machine	I-Device
on	O
the	O
pages	O
of	O
Datamation	O
.	O
</s>
<s>
Samples	O
of	O
MasPar	B-Device
MPs	O
,	O
from	O
the	O
NASA	O
Goddard	O
Space	O
Flight	O
Center	O
,	O
are	O
in	O
storage	O
at	O
the	O
Computer	O
History	O
Museum	O
.	O
</s>
<s>
MasPar	B-Device
offered	O
a	O
family	O
of	O
SIMD	B-Device
machines	O
,	O
second	O
sourced	O
by	O
DEC	O
.	O
</s>
<s>
MasPar	B-Device
exited	O
the	O
computer	O
hardware	O
business	O
in	O
June	O
1996	O
,	O
halting	O
all	O
hardware	O
development	O
and	O
transforming	O
itself	O
into	O
a	O
new	O
data	B-Application
mining	I-Application
software	O
company	O
called	O
NeoVista	O
Software	O
.	O
</s>
<s>
MasPar	B-Device
is	O
unique	O
in	O
being	O
a	O
manufacturer	O
of	O
SIMD	B-Device
supercomputers	O
(	O
as	O
opposed	O
to	O
vector	O
machines	O
)	O
.	O
</s>
<s>
In	O
this	O
approach	O
,	O
a	O
collection	O
of	O
ALU	B-General_Concept
's	O
listen	O
to	O
a	O
program	O
broadcast	O
from	O
a	O
central	O
source	O
.	O
</s>
<s>
The	O
MasPar	B-Device
architecture	O
is	O
designed	O
to	O
scale	O
,	O
and	O
balance	O
processing	O
,	O
memory	O
,	O
and	O
communication	O
.	O
</s>
<s>
The	O
Maspar	B-Device
MP-1	O
PE	O
and	O
the	O
later	O
binary-compatible	O
Maspar	B-Device
MP-2	O
PE	O
are	O
full	O
custom	O
CMOS	B-Device
chips	O
,	O
designed	O
in-house	O
,	O
and	O
fabricated	O
by	O
various	O
vendors	O
such	O
as	O
HP	O
or	O
TI	O
.	O
</s>
<s>
It	O
is	O
a	O
load-store	B-Architecture
architecture	I-Architecture
.	O
</s>
<s>
The	O
MasPar	B-Device
architecture	O
is	O
Harvard	B-Architecture
in	O
a	O
broad	O
sense	O
.	O
</s>
<s>
The	O
ACU	O
implements	O
a	O
microcoded	B-Device
instruction	O
fetch	O
,	O
but	O
achieves	O
a	O
RISC-like	O
1	O
instruction	O
per	O
clock	O
.	O
</s>
<s>
Each	O
ALU	B-General_Concept
is	O
connected	O
in	O
a	O
nearest	O
neighbor	O
fashion	O
to	O
8	O
others	O
.	O
</s>
<s>
The	O
MP-2	O
PE	O
chip	O
contains	O
32	O
processor	O
elements	O
,	O
each	O
a	O
full	O
32-bit	O
ALU	B-General_Concept
with	O
floating	O
point	O
,	O
registers	B-General_Concept
,	O
and	O
a	O
barrel	O
shifter	O
.	O
</s>
<s>
Each	O
ALU	B-General_Concept
,	O
called	O
a	O
PE	O
slice	O
,	O
contains	O
sixty	O
four	O
32	O
bit	O
registers	B-General_Concept
that	O
are	O
used	O
for	O
both	O
integer	O
and	O
floating	O
point	O
.	O
</s>
<s>
The	O
registers	B-General_Concept
are	O
both	O
bit	O
and	O
byte	B-Application
addressable	O
.	O
</s>
<s>
Each	O
PE	O
slice	O
contains	O
two	O
registers	B-General_Concept
for	O
data	O
memory	O
address	O
,	O
and	O
the	O
data	O
.	O
</s>
<s>
The	O
serial	O
links	O
support	O
1	O
Mbyte/s	O
bit-serial	B-General_Concept
communication	O
that	O
allows	O
coordinated	O
register-register	O
communication	O
between	O
processors	O
.	O
</s>
<s>
Microcoded	B-Device
instruction	O
decode	O
is	O
used	O
.	O
</s>
<s>
The	O
chip	O
is	O
implemented	O
in	O
1.0-micrometre	O
,	O
two-level	O
,	O
metal	O
CMOS	B-Device
,	O
dissipates	O
0.8	O
watt	O
,	O
and	O
is	O
packaged	O
in	O
a	O
208-pin	O
PQFP	B-Algorithm
.	O
</s>
<s>
The	O
Maspar	B-Device
machines	O
are	O
front	O
ended	O
by	O
a	O
host	O
machine	O
,	O
usually	O
a	O
VAX	B-Device
.	O
</s>
<s>
They	O
are	O
accessed	O
by	O
extensions	O
to	O
Fortran	B-Application
and	O
C	B-Language
.	O
Full	O
IEEE	O
single	O
-	O
and	O
double-precision	O
floating	O
point	O
are	O
supported	O
.	O
</s>
<s>
Cache	O
is	O
not	O
required	O
,	O
due	O
to	O
the	O
memory	O
interface	O
operating	O
at	O
commensurate	O
speed	O
with	O
the	O
ALU	B-General_Concept
data	O
accesses	O
.	O
</s>
<s>
The	O
ALUs	O
do	O
not	O
implement	O
memory	B-General_Concept
management	I-General_Concept
for	O
data	O
memory	O
.	O
</s>
<s>
The	O
ACU	O
uses	O
demand	O
paged	O
virtual	B-Architecture
memory	I-Architecture
for	O
the	O
instruction	O
memory	O
.	O
</s>
