<s>
Magnetoresistive	B-General_Concept
random-access	I-General_Concept
memory	I-General_Concept
(	O
MRAM	B-General_Concept
)	O
is	O
a	O
type	O
of	O
non-volatile	B-General_Concept
random-access	I-General_Concept
memory	I-General_Concept
which	O
stores	O
data	O
in	O
magnetic	O
domains	O
.	O
</s>
<s>
Developed	O
in	O
the	O
mid-1980s	O
,	O
proponents	O
have	O
argued	O
that	O
magnetoresistive	B-General_Concept
RAM	I-General_Concept
will	O
eventually	O
surpass	O
competing	O
technologies	O
to	O
become	O
a	O
dominant	O
or	O
even	O
universal	B-Device
memory	I-Device
.	O
</s>
<s>
Currently	O
,	O
memory	O
technologies	O
in	O
use	O
such	O
as	O
flash	B-Device
RAM	I-Device
and	O
DRAM	O
have	O
practical	O
advantages	O
that	O
have	O
so	O
far	O
kept	O
MRAM	B-General_Concept
in	O
a	O
niche	O
role	O
in	O
the	O
market	O
.	O
</s>
<s>
Unlike	O
conventional	O
RAM	B-Architecture
chip	I-Architecture
technologies	O
,	O
data	O
in	O
MRAM	B-General_Concept
is	O
not	O
stored	O
as	O
electric	O
charge	O
or	O
current	O
flows	O
,	O
but	O
by	O
magnetic	O
storage	O
elements	O
.	O
</s>
<s>
This	O
configuration	O
is	O
known	O
as	O
a	O
magnetic	O
tunnel	O
junction	O
and	O
is	O
the	O
simplest	O
structure	O
for	O
an	O
MRAM	B-General_Concept
bit	O
.	O
</s>
<s>
A	O
particular	O
cell	O
is	O
(	O
typically	O
)	O
selected	O
by	O
powering	O
an	O
associated	O
transistor	B-Application
that	O
switches	O
current	O
from	O
a	O
supply	O
line	O
through	O
the	O
cell	O
to	O
ground	O
.	O
</s>
<s>
Thus	O
,	O
this	O
"	O
conventional	O
"	O
MRAM	B-General_Concept
must	O
keep	O
these	O
two	O
distributions	O
well-separated	O
.	O
</s>
<s>
This	O
approach	O
still	O
requires	O
a	O
fairly	O
substantial	O
current	O
to	O
generate	O
the	O
field	O
,	O
however	O
,	O
which	O
makes	O
it	O
less	O
interesting	O
for	O
low-power	O
uses	O
,	O
one	O
of	O
MRAM	B-General_Concept
's	O
primary	O
disadvantages	O
.	O
</s>
<s>
One	O
experimental	O
solution	O
to	O
this	O
problem	O
was	O
to	O
use	O
circular	O
domains	O
written	O
and	O
read	O
using	O
the	O
giant	B-General_Concept
magnetoresistive	I-General_Concept
effect	I-General_Concept
,	O
but	O
it	O
appears	O
that	O
this	O
line	O
of	O
research	O
is	O
no	O
longer	O
active	O
.	O
</s>
<s>
A	O
newer	O
technique	O
,	O
spin-transfer	B-General_Concept
torque	I-General_Concept
(	O
STT	O
)	O
or	O
spin-transfer	O
switching	O
,	O
uses	O
spin-aligned	O
(	O
"	O
polarized	O
"	O
)	O
electrons	O
to	O
directly	O
torque	O
the	O
domains	O
.	O
</s>
<s>
There	O
are	O
concerns	O
that	O
the	O
"	O
classic	O
"	O
type	O
of	O
MRAM	B-General_Concept
cell	O
will	O
have	O
difficulty	O
at	O
high	O
densities	O
because	O
of	O
the	O
amount	O
of	O
current	O
needed	O
during	O
writes	O
,	O
a	O
problem	O
that	O
STT	O
avoids	O
.	O
</s>
<s>
Overall	O
,	O
the	O
STT	O
requires	O
much	O
less	O
write	O
current	O
than	O
conventional	O
or	O
toggle	O
MRAM	B-General_Concept
.	O
</s>
<s>
Other	O
potential	O
arrangements	O
include	O
"	O
vertical	O
transport	O
MRAM	B-General_Concept
"	O
(	O
VMRAM	O
)	O
,	O
which	O
uses	O
current	O
through	O
a	O
vertical	O
column	O
to	O
change	O
magnetic	O
orientation	O
,	O
a	O
geometric	O
arrangement	O
that	O
reduces	O
the	O
write	O
disturb	O
problem	O
and	O
so	O
can	O
be	O
used	O
at	O
higher	O
density	O
.	O
</s>
<s>
A	O
review	O
article	O
provides	O
the	O
details	O
of	O
materials	O
and	O
challenges	O
associated	O
with	O
MRAM	B-General_Concept
in	O
the	O
perpendicular	O
geometry	O
.	O
</s>
<s>
The	O
selection	O
of	O
materials	O
and	O
the	O
design	O
of	O
MRAM	B-General_Concept
to	O
fulfill	O
those	O
requirements	O
are	O
discussed	O
.	O
</s>
<s>
DRAM	O
uses	O
a	O
small	O
capacitor	O
as	O
a	O
memory	O
element	O
,	O
wires	O
to	O
carry	O
current	O
to	O
and	O
from	O
it	O
,	O
and	O
a	O
transistor	B-Application
to	O
control	O
it	O
–	O
referred	O
to	O
as	O
a	O
"	O
1T1C	O
"	O
cell	O
.	O
</s>
<s>
This	O
makes	O
DRAM	O
the	O
highest-density	O
RAM	B-Architecture
currently	O
available	O
,	O
and	O
thus	O
the	O
least	O
expensive	O
,	O
which	O
is	O
why	O
it	O
is	O
used	O
for	O
the	O
majority	O
of	O
RAM	B-Architecture
found	O
in	O
computers	O
.	O
</s>
<s>
MRAM	B-General_Concept
is	O
physically	O
similar	O
to	O
DRAM	O
in	O
makeup	O
,	O
and	O
often	O
does	O
require	O
a	O
transistor	B-Application
for	O
the	O
write	O
operation	O
(	O
though	O
not	O
strictly	O
necessary	O
)	O
.	O
</s>
<s>
The	O
scaling	O
of	O
transistors	B-Application
to	O
higher	O
density	O
necessarily	O
leads	O
to	O
lower	O
available	O
current	O
,	O
which	O
could	O
limit	O
MRAM	B-General_Concept
performance	O
at	O
advanced	O
nodes	O
.	O
</s>
<s>
In	O
contrast	O
,	O
MRAM	B-General_Concept
never	O
requires	O
a	O
refresh	O
.	O
</s>
<s>
Although	O
the	O
exact	O
amount	O
of	O
power	O
savings	O
depends	O
on	O
the	O
nature	O
of	O
the	O
work	O
—	O
more	O
frequent	O
writing	O
will	O
require	O
more	O
power	O
–	O
in	O
general	O
MRAM	B-General_Concept
proponents	O
expect	O
much	O
lower	O
power	O
consumption	O
(	O
up	O
to	O
99%	O
less	O
)	O
compared	O
to	O
DRAM	O
.	O
</s>
<s>
STT-based	O
MRAMs	B-General_Concept
eliminate	O
the	O
difference	O
between	O
reading	O
and	O
writing	O
,	O
further	O
reducing	O
power	O
requirements	O
.	O
</s>
<s>
It	O
is	O
also	O
worth	O
comparing	O
MRAM	B-General_Concept
with	O
another	O
common	O
memory	O
system	O
—	O
flash	B-Device
RAM	I-Device
.	O
</s>
<s>
Like	O
MRAM	B-General_Concept
,	O
flash	O
does	O
not	O
lose	O
its	O
memory	O
when	O
power	O
is	O
removed	O
,	O
which	O
makes	O
it	O
very	O
common	O
in	O
applications	O
requiring	O
persistent	O
storage	O
.	O
</s>
<s>
When	O
used	O
for	O
reading	O
,	O
flash	O
and	O
MRAM	B-General_Concept
are	O
very	O
similar	O
in	O
power	O
requirements	O
.	O
</s>
<s>
In	O
contrast	O
,	O
MRAM	B-General_Concept
requires	O
only	O
slightly	O
more	O
power	O
to	O
write	O
than	O
read	O
,	O
and	O
no	O
change	O
in	O
the	O
voltage	O
,	O
eliminating	O
the	O
need	O
for	O
a	O
charge	O
pump	O
.	O
</s>
<s>
MRAM	B-General_Concept
is	O
often	O
touted	O
as	O
being	O
a	O
non-volatile	O
memory	O
.	O
</s>
<s>
However	O
,	O
the	O
current	O
mainstream	O
high-capacity	O
MRAM	B-General_Concept
,	O
spin-transfer	B-General_Concept
torque	I-General_Concept
memory	O
,	O
provides	O
improved	O
retention	O
at	O
the	O
cost	O
of	O
higher	O
power	O
consumption	O
,	O
i.e.	O
,	O
higher	O
write	O
current	O
.	O
</s>
<s>
Dynamic	O
random-access	B-Architecture
memory	I-Architecture
(	O
DRAM	O
)	O
performance	O
is	O
limited	O
by	O
the	O
rate	O
at	O
which	O
the	O
charge	O
stored	O
in	O
the	O
cells	O
can	O
be	O
drained	O
(	O
for	O
reading	O
)	O
or	O
stored	O
(	O
for	O
writing	O
)	O
.	O
</s>
<s>
MRAM	B-General_Concept
operation	O
is	O
based	O
on	O
measuring	O
voltages	O
rather	O
than	O
charges	O
or	O
currents	O
,	O
so	O
there	O
is	O
less	O
"	O
settling	O
time	O
"	O
needed	O
.	O
</s>
<s>
IBM	O
researchers	O
have	O
demonstrated	O
MRAM	B-General_Concept
devices	O
with	O
access	O
times	O
on	O
the	O
order	O
of	O
2ns	O
,	O
somewhat	O
better	O
than	O
even	O
the	O
most	O
advanced	O
DRAMs	O
built	O
on	O
much	O
newer	O
processes	O
.	O
</s>
<s>
A	O
team	O
at	O
the	O
German	O
Physikalisch-Technische	O
Bundesanstalt	O
have	O
demonstrated	O
MRAM	B-General_Concept
devices	O
with	O
1ns	O
settling	O
times	O
,	O
better	O
than	O
the	O
currently	O
accepted	O
theoretical	O
limits	O
for	O
DRAM	O
,	O
although	O
the	O
demonstration	O
was	O
a	O
single	O
cell	O
.	O
</s>
<s>
High-density	O
memory	O
requires	O
small	O
transistors	B-Application
with	O
reduced	O
current	O
,	O
especially	O
when	O
built	O
for	O
low	O
standby	O
leakage	O
.	O
</s>
<s>
For	O
the	O
perpendicular	O
STT	O
MRAM	B-General_Concept
,	O
the	O
switching	O
time	O
is	O
largely	O
determined	O
by	O
the	O
thermal	O
stability	O
Δ	O
as	O
well	O
as	O
the	O
write	O
current	O
.	O
</s>
<s>
The	O
only	O
current	O
memory	O
technology	O
that	O
easily	O
competes	O
with	O
MRAM	B-General_Concept
in	O
terms	O
of	O
performance	O
at	O
comparable	O
density	O
is	O
static	B-Architecture
random-access	I-Architecture
memory	I-Architecture
(	O
SRAM	B-Architecture
)	O
.	O
</s>
<s>
SRAM	B-Architecture
consists	O
of	O
a	O
series	O
of	O
transistors	B-Application
arranged	O
in	O
a	O
flip-flop	B-General_Concept
,	O
which	O
will	O
hold	O
one	O
of	O
two	O
states	O
as	O
long	O
as	O
power	O
is	O
applied	O
.	O
</s>
<s>
Since	O
the	O
transistors	B-Application
have	O
a	O
very	O
low	O
power	O
requirement	O
,	O
their	O
switching	O
time	O
is	O
very	O
low	O
.	O
</s>
<s>
However	O
,	O
since	O
an	O
SRAM	B-Architecture
cell	O
consists	O
of	O
several	O
transistors	B-Application
,	O
typically	O
four	O
or	O
six	O
,	O
its	O
density	O
is	O
much	O
lower	O
than	O
DRAM	O
.	O
</s>
<s>
This	O
makes	O
it	O
expensive	O
,	O
which	O
is	O
why	O
it	O
is	O
used	O
only	O
for	O
small	O
amounts	O
of	O
high-performance	O
memory	O
,	O
notably	O
the	O
CPU	B-General_Concept
cache	I-General_Concept
in	O
almost	O
all	O
modern	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
designs	O
.	O
</s>
<s>
Although	O
MRAM	B-General_Concept
is	O
not	O
quite	O
as	O
fast	O
as	O
SRAM	B-Architecture
,	O
it	O
is	O
close	O
enough	O
to	O
be	O
interesting	O
even	O
in	O
this	O
role	O
.	O
</s>
<s>
Given	O
its	O
much	O
higher	O
density	O
,	O
a	O
CPU	O
designer	O
may	O
be	O
inclined	O
to	O
use	O
MRAM	B-General_Concept
to	O
offer	O
a	O
much	O
larger	O
but	O
somewhat	O
slower	O
cache	O
,	O
rather	O
than	O
a	O
smaller	O
but	O
faster	O
one	O
.	O
</s>
<s>
The	O
endurance	O
of	O
MRAM	B-General_Concept
is	O
affected	O
by	O
write	O
current	O
,	O
just	O
like	O
retention	O
and	O
speed	O
,	O
as	O
well	O
as	O
read	O
current	O
.	O
</s>
<s>
MRAM	B-General_Concept
has	O
similar	O
performance	O
to	O
SRAM	B-Architecture
,	O
enabled	O
by	O
the	O
use	O
of	O
sufficient	O
write	O
current	O
.	O
</s>
<s>
Nevertheless	O
,	O
some	O
opportunities	O
for	O
MRAM	B-General_Concept
exist	O
where	O
density	O
need	O
not	O
be	O
maximized	O
.	O
</s>
<s>
From	O
a	O
fundamental	O
physics	O
point	O
of	O
view	O
,	O
the	O
spin-transfer	B-General_Concept
torque	I-General_Concept
approach	O
to	O
MRAM	B-General_Concept
is	O
bound	O
to	O
a	O
"	O
rectangle	O
of	O
death	O
"	O
formed	O
by	O
retention	O
,	O
endurance	O
,	O
speed	O
,	O
and	O
power	O
requirements	O
,	O
as	O
covered	O
above	O
.	O
</s>
<s>
Flash	O
and	O
EEPROM	B-General_Concept
's	O
limited	O
write-cycles	O
are	O
a	O
serious	O
problem	O
for	O
any	O
real	O
RAM-like	O
role	O
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
high	O
power	O
needed	O
to	O
write	O
the	O
cells	O
is	O
a	O
problem	O
in	O
low-power	O
nodes	O
,	O
where	O
non-volatile	B-General_Concept
RAM	I-General_Concept
is	O
often	O
used	O
.	O
</s>
<s>
While	O
MRAM	B-General_Concept
was	O
certainly	O
designed	O
to	O
address	O
some	O
of	O
these	O
issues	O
,	O
a	O
number	O
of	O
other	O
new	O
memory	O
devices	O
are	O
in	O
production	O
or	O
have	O
been	O
proposed	O
to	O
address	O
these	O
shortcomings	O
.	O
</s>
<s>
To	O
date	O
,	O
the	O
only	O
similar	O
system	O
to	O
enter	O
widespread	O
production	O
is	O
ferroelectric	O
RAM	B-Architecture
,	O
or	O
F-RAM	O
(	O
sometimes	O
referred	O
to	O
as	O
FeRAM	O
)	O
.	O
</s>
<s>
Also	O
seeing	O
renewed	O
interest	O
are	O
silicon-oxide-nitride-oxide-silicon	O
(	O
SONOS	B-Algorithm
)	O
memory	O
and	O
ReRAM	B-General_Concept
.	O
</s>
<s>
3D	B-Device
XPoint	I-Device
has	O
also	O
been	O
in	O
development	O
,	O
but	O
is	O
known	O
to	O
have	O
a	O
higher	O
power	O
budget	O
than	O
DRAM	O
.	O
</s>
<s>
1988	O
—	O
European	O
scientists	O
(	O
Albert	O
Fert	O
and	O
Peter	O
Grünberg	O
)	O
discovered	O
the	O
"	O
giant	B-General_Concept
magnetoresistive	I-General_Concept
effect	I-General_Concept
"	O
in	O
thin-film	O
structures	O
.	O
</s>
<s>
1989	O
—	O
Pohm	O
and	O
Daughton	O
left	O
Honeywell	O
to	O
form	O
Nonvolatile	O
Electronics	O
,	O
Inc	O
.	O
(	O
later	O
renamed	O
to	O
NVE	O
Corp	O
.	O
)	O
sublicensing	O
the	O
MRAM	B-General_Concept
technology	O
they	O
have	O
created	O
.	O
</s>
<s>
1998	O
—	O
Motorola	O
develops	O
256Kb	O
MRAM	B-General_Concept
test	O
chip	O
.	O
</s>
<s>
2000	O
—	O
IBM	O
and	O
Infineon	O
established	O
a	O
joint	O
MRAM	B-General_Concept
development	O
program	O
.	O
</s>
<s>
September	O
—	O
MRAM	B-General_Concept
becomes	O
a	O
standard	O
product	O
offering	O
at	O
Freescale	O
.	O
</s>
<s>
October	O
—	O
Taiwan	O
developers	O
of	O
MRAM	B-General_Concept
tape	O
out	O
1	O
Mbit	O
parts	O
at	O
TSMC	O
.	O
</s>
<s>
October	O
—	O
Micron	O
drops	O
MRAM	B-General_Concept
,	O
mulls	O
other	O
memories	O
.	O
</s>
<s>
December	O
—	O
TSMC	O
,	O
NEC	O
and	O
Toshiba	O
describe	O
novel	O
MRAM	B-General_Concept
cells	O
.	O
</s>
<s>
December	O
—	O
Renesas	O
Technology	O
promotes	O
a	O
high	O
performance	O
,	O
high-reliability	O
MRAM	B-General_Concept
technology	O
.	O
</s>
<s>
Spintech	O
laboratory	O
's	O
first	O
observation	O
of	O
Thermal	O
Assisted	O
Switching	O
(	O
TAS	O
)	O
as	O
MRAM	B-General_Concept
approach	O
.	O
</s>
<s>
January	O
—	O
Cypress	O
Semiconductor	O
samples	O
MRAM	B-General_Concept
,	O
using	O
NVE	O
IP	O
.	O
</s>
<s>
March	O
—	O
Cypress	O
to	O
Sell	O
MRAM	B-General_Concept
Subsidiary	O
.	O
</s>
<s>
June	O
—	O
Honeywell	O
posts	O
data	O
sheet	O
for	O
1-Mbit	O
rad-hard	O
MRAM	B-General_Concept
using	O
a	O
150nm	O
lithographic	O
process	O
.	O
</s>
<s>
August	O
—	O
MRAM	B-General_Concept
record	O
:	O
memory	O
cell	O
runs	O
at	O
2GHz	O
.	O
</s>
<s>
November	O
—	O
Renesas	O
Technology	O
and	O
Grandis	O
collaborate	O
on	O
development	O
of	O
65nm	O
MRAM	B-General_Concept
employing	O
spin	B-General_Concept
torque	I-General_Concept
transfer	I-General_Concept
(	O
STT	O
)	O
.	O
</s>
<s>
December	O
—	O
Sony	O
announced	O
the	O
first	O
lab-produced	O
spin-torque-transfer	O
MRAM	B-General_Concept
,	O
which	O
utilizes	O
a	O
spin-polarized	O
current	O
through	O
the	O
tunneling	O
magnetoresistance	O
layer	O
to	O
write	O
data	O
.	O
</s>
<s>
This	O
method	O
consumes	O
less	O
power	O
and	O
is	O
more	O
scalable	O
than	O
conventional	O
MRAM	B-General_Concept
.	O
</s>
<s>
December	O
—	O
Freescale	O
Semiconductor	O
Inc	O
.	O
demonstrates	O
an	O
MRAM	B-General_Concept
that	O
uses	O
magnesium	O
oxide	O
,	O
rather	O
than	O
an	O
aluminum	O
oxide	O
,	O
allowing	O
for	O
a	O
thinner	O
insulating	O
tunnel	O
barrier	O
and	O
improved	O
bit	O
resistance	O
during	O
the	O
write	O
cycle	O
,	O
thereby	O
reducing	O
the	O
required	O
write	O
current	O
.	O
</s>
<s>
February	O
—	O
Toshiba	O
and	O
NEC	O
announced	O
a	O
16	O
Mbit	O
MRAM	B-General_Concept
chip	O
with	O
a	O
new	O
"	O
power-forking	O
"	O
design	O
.	O
</s>
<s>
It	O
achieves	O
a	O
transfer	O
rate	O
of	O
200	O
Mbit/s	O
,	O
with	O
a	O
34	O
ns	O
cycle	O
time	O
,	O
the	O
best	O
performance	O
of	O
any	O
MRAM	B-General_Concept
chip	O
.	O
</s>
<s>
July	O
—	O
On	O
July	O
10	O
,	O
Austin	O
Texas	O
—	O
Freescale	O
Semiconductor	O
begins	O
marketing	O
a	O
4-Mbit	O
MRAM	B-General_Concept
chip	O
,	O
which	O
sells	O
for	O
approximately	O
$25.00	O
per	O
chip	O
.	O
</s>
<s>
February	O
—	O
Tohoku	O
University	O
and	O
Hitachi	O
developed	O
a	O
prototype	O
2-Mbit	O
non-volatile	B-General_Concept
RAM	I-General_Concept
chip	O
employing	O
spin-transfer	B-General_Concept
torque	I-General_Concept
switching	O
.	O
</s>
<s>
August	O
—	O
"	O
IBM	O
,	O
TDK	O
Partner	O
In	O
Magnetic	O
Memory	O
Research	O
on	O
Spin	B-General_Concept
Transfer	I-General_Concept
Torque	I-General_Concept
Switching	O
"	O
IBM	O
and	O
TDK	O
to	O
lower	O
the	O
cost	O
and	O
boost	O
performance	O
of	O
MRAM	B-General_Concept
to	O
hopefully	O
release	O
a	O
product	O
to	O
market	O
.	O
</s>
<s>
November	O
—	O
Toshiba	O
applied	O
and	O
proved	O
the	O
spin-transfer	B-General_Concept
torque	I-General_Concept
switching	O
with	O
perpendicular	O
magnetic	O
anisotropy	O
MTJ	O
device	O
.	O
</s>
<s>
November	O
—	O
NEC	O
develops	O
world	O
's	O
fastest	O
SRAM-compatible	O
MRAM	B-General_Concept
with	O
operation	O
speed	O
of	O
250MHz	O
.	O
</s>
<s>
August	O
—	O
Scientists	O
in	O
Germany	O
have	O
developed	O
next-generation	O
MRAM	B-General_Concept
that	O
is	O
said	O
to	O
operate	O
as	O
fast	O
as	O
fundamental	O
performance	O
limits	O
allow	O
,	O
with	O
write	O
cycles	O
under	O
1	O
nanosecond	O
.	O
</s>
<s>
June	O
—	O
Hitachi	O
and	O
Tohoku	O
University	O
demonstrated	O
a	O
32-Mbit	O
spin-transfer	B-General_Concept
torque	I-General_Concept
RAM	B-Architecture
(	O
SPRAM	B-General_Concept
)	O
.	O
</s>
<s>
November	O
—	O
Chandler	O
,	O
Arizona	O
,	O
USA	O
,	O
Everspin	O
debuts	O
64Mb	O
ST-MRAM	O
on	O
a	O
90	O
nm	O
process	O
.	O
</s>
<s>
December	O
—	O
A	O
team	O
from	O
University	O
of	O
California	O
,	O
Los	O
Angeles	O
presents	O
voltage-controlled	O
MRAM	B-General_Concept
at	O
IEEE	O
International	O
Electron	O
Devices	O
Meeting	O
.	O
</s>
<s>
November	O
—	O
Buffalo	O
Technology	O
and	O
Everspin	O
announce	O
a	O
new	O
industrial	O
SATA	O
III	O
SSD	O
that	O
incorporates	O
Everspin	O
's	O
Spin-Torque	O
MRAM	B-General_Concept
(	O
ST-MRAM	O
)	O
as	O
cache	O
memory	O
.	O
</s>
<s>
October	O
—	O
Everspin	O
partners	O
with	O
GlobalFoundries	O
to	O
produce	O
ST-MRAM	O
on	O
300mm	O
wafers	O
.	O
</s>
<s>
April	O
—	O
Samsung	B-Application
's	O
semiconductor	O
chief	O
Kim	O
Ki-nam	O
says	O
Samsung	B-Application
is	O
developing	O
an	O
MRAM	B-General_Concept
technology	O
that	O
"	O
will	O
be	O
ready	O
soon	O
"	O
.	O
</s>
<s>
July	O
—	O
IBM	O
and	O
Samsung	B-Application
report	O
an	O
MRAM	B-General_Concept
device	O
capable	O
of	O
scaling	O
down	O
to	O
11nm	O
with	O
a	O
switching	O
current	O
of	O
7.5	O
microamps	O
at	O
10	O
ns	O
.	O
</s>
<s>
August	O
—	O
Everspin	O
announced	O
it	O
was	O
shipping	O
samples	O
of	O
the	O
industry	O
's	O
first	O
256Mb	O
ST-MRAM	O
to	O
customers	O
.	O
</s>
<s>
October	O
—	O
Avalanche	O
Technology	O
partners	O
with	O
Sony	O
Semiconductor	O
Manufacturing	O
to	O
manufacture	O
STT-MRAM	O
on	O
300mm	O
wafers	O
,	O
based	O
on	O
"	O
a	O
variety	O
of	O
manufacturing	O
nodes	O
"	O
.	O
</s>
<s>
December	O
—	O
Inston	O
and	O
Toshiba	O
independently	O
present	O
results	O
on	O
voltage-controlled	O
MRAM	B-General_Concept
at	O
International	O
Electron	O
Devices	O
Meeting	O
.	O
</s>
<s>
January	O
—	O
Everspin	O
starts	O
shipping	O
samples	O
of	O
28nm	O
1Gb	O
STT-MRAM	O
chips	O
.	O
</s>
<s>
March	O
—	O
Samsung	B-Application
commence	O
commercial	O
production	O
of	O
its	O
first	O
embedded	O
STT-MRAM	O
based	O
on	O
a	O
28nm	O
process	O
.	O
</s>
<s>
May	O
—	O
Avalanche	O
partners	O
with	O
United	O
Microelectronics	O
Corporation	O
to	O
jointly	O
develop	O
and	O
produce	O
embedded	O
MRAM	B-General_Concept
based	O
on	O
the	O
latter	O
's	O
28nm	O
CMOS	O
manufacturing	O
process	O
.	O
</s>
<s>
December	O
—	O
IBM	O
announces	O
a	O
14nm	O
MRAM	B-General_Concept
node	O
.	O
</s>
<s>
November	O
—	O
Taiwan	O
Semiconductor	O
Research	O
Institute	O
announced	O
the	O
development	O
of	O
a	O
SOT-MRAM	O
device	O
.	O
</s>
<s>
Possible	O
practical	O
application	O
of	O
the	O
MRAM	B-General_Concept
includes	O
virtually	O
every	O
device	O
that	O
has	O
some	O
type	O
of	O
memory	O
inside	O
such	O
as	O
aerospace	O
and	O
military	O
systems	O
,	O
digital	B-Device
cameras	I-Device
,	O
notebooks	B-Device
,	O
smart	O
cards	O
,	O
mobile	O
telephones	O
,	O
cellular	O
base	O
stations	O
,	O
personal	B-Device
computers	I-Device
,	O
battery-backed	O
SRAM	B-Architecture
replacement	O
,	O
datalogging	O
specialty	O
memories	O
(	O
black	B-Device
box	I-Device
solutions	O
)	O
,	O
media	O
players	O
,	O
and	O
book	O
readers	O
etc	O
.	O
</s>
