<s>
In	O
computing	O
,	O
Machine	B-Device
Check	I-Device
Architecture	I-Device
(	O
MCA	O
)	O
is	O
an	O
Intel	O
and	O
AMD	O
mechanism	O
in	O
which	O
the	O
CPU	B-Device
reports	O
hardware	O
errors	O
to	O
the	O
operating	B-General_Concept
system	I-General_Concept
.	O
</s>
<s>
Intel	O
's	O
P6	O
and	O
Pentium	O
4	O
family	O
processors	O
,	O
AMD	O
's	O
K7	O
and	O
K8	O
family	O
processors	O
,	O
as	O
well	O
as	O
the	O
Itanium	O
architecture	O
implement	O
a	O
machine	B-Device
check	I-Device
architecture	I-Device
that	O
provides	O
a	O
mechanism	O
for	O
detecting	O
and	O
reporting	O
hardware	O
(	O
machine	O
)	O
errors	O
,	O
such	O
as	O
:	O
system	O
bus	O
errors	O
,	O
ECC	O
errors	O
,	O
parity	O
errors	O
,	O
cache	B-General_Concept
errors	O
,	O
and	O
translation	B-Architecture
lookaside	I-Architecture
buffer	I-Architecture
errors	O
.	O
</s>
<s>
It	O
consists	O
of	O
a	O
set	O
of	O
model-specific	B-General_Concept
registers	I-General_Concept
(	O
MSRs	O
)	O
that	O
are	O
used	O
to	O
set	O
up	O
machine	O
checking	O
and	O
additional	O
banks	O
of	O
MSRs	O
used	O
for	O
recording	O
errors	O
that	O
are	O
detected	O
.	O
</s>
