<s>
thumb|300px|Image	O
of	O
the	O
internals	O
of	O
a	O
Commodore	O
64	O
showing	O
the	O
6510	B-General_Concept
CPU	O
(	O
40-pin	O
DIP	B-Algorithm
,	O
lower	O
left	O
)	O
.	O
</s>
<s>
The	O
MOS	B-General_Concept
Technology	I-General_Concept
6510	I-General_Concept
is	O
an	O
8-bit	O
microprocessor	B-Architecture
designed	O
by	O
MOS	B-Architecture
Technology	I-Architecture
.	O
</s>
<s>
It	O
is	O
a	O
modified	O
form	O
of	O
the	O
very	O
successful	O
6502	B-General_Concept
.	O
</s>
<s>
The	O
6510	B-General_Concept
is	O
widely	O
used	O
in	O
the	O
Commodore	O
64	O
(	O
C64	O
)	O
home	O
computer	O
and	O
its	O
variants	O
.	O
</s>
<s>
The	O
primary	O
change	O
from	O
the	O
6502	B-General_Concept
is	O
the	O
addition	O
of	O
an	O
8-bit	O
general	O
purpose	O
I/O	B-General_Concept
port	O
,	O
although	O
6	O
I/O	B-General_Concept
pins	O
are	O
available	O
in	O
the	O
most	O
common	O
version	O
of	O
the	O
6510	B-General_Concept
.	O
</s>
<s>
In	O
addition	O
,	O
the	O
address	O
bus	O
can	O
be	O
made	O
tristate	B-Device
and	O
the	O
CPU	O
can	O
be	O
halted	O
cleanly	O
.	O
</s>
<s>
In	O
the	O
C64	O
,	O
the	O
extra	O
I/O	B-General_Concept
pins	O
of	O
the	O
processor	O
are	O
used	O
to	O
control	O
the	O
computer	O
's	O
memory	B-General_Concept
map	I-General_Concept
by	O
bank	B-General_Concept
switching	I-General_Concept
,	O
and	O
for	O
controlling	O
three	O
of	O
the	O
four	O
signal	O
lines	O
of	O
the	O
Datasette	B-Device
tape	O
recorder	O
(	O
the	O
electric	O
motor	O
control	O
,	O
key-press	O
sensing	O
and	O
write	O
data	O
lines	O
;	O
the	O
read	O
data	O
line	O
went	O
to	O
another	O
I/O	B-General_Concept
chip	O
)	O
.	O
</s>
<s>
It	O
is	O
possible	O
,	O
by	O
writing	O
the	O
correct	O
bit	O
pattern	O
to	O
the	O
processor	O
at	O
address	O
$01	O
,	O
to	O
completely	O
expose	O
almost	O
the	O
full	O
64KB	O
of	O
RAM	B-Architecture
in	O
the	O
C64	O
,	O
leaving	O
no	O
ROM	B-Device
or	O
I/O	B-General_Concept
hardware	I-General_Concept
exposed	O
except	O
for	O
the	O
processor	O
I/O	B-General_Concept
port	O
itself	O
and	O
its	O
data	O
directional	O
register	O
at	O
address	O
$00	O
.	O
</s>
<s>
In	O
1985	O
,	O
MOS	O
produced	O
the	O
8500	O
,	O
an	O
HMOS	O
version	O
of	O
the	O
6510	B-General_Concept
.	O
</s>
<s>
Other	O
than	O
the	O
process	O
modification	O
,	O
it	O
is	O
virtually	O
identical	O
to	O
the	O
NMOS	B-Algorithm
version	O
of	O
the	O
6510	B-General_Concept
.	O
</s>
<s>
However	O
,	O
in	O
1985	O
,	O
limited	O
quantities	O
of	O
8500s	O
were	O
found	O
on	O
older	O
NMOS-based	O
C64s	O
.	O
</s>
<s>
The	O
7501/8501	O
variant	O
of	O
the	O
6510	B-General_Concept
was	O
introduced	O
in	O
1984	O
.	O
</s>
<s>
Compared	O
to	O
the	O
6510	B-General_Concept
,	O
this	O
variant	O
extends	O
the	O
number	O
of	O
I/O	B-General_Concept
port	O
pins	O
from	O
6	O
to	O
8	O
,	O
but	O
omits	O
the	O
pins	O
for	O
non-maskable	B-General_Concept
interrupt	I-General_Concept
and	O
clock	O
output	O
.	O
</s>
<s>
It	O
is	O
used	O
in	O
Commodore	O
's	O
C16	B-Operating_System
,	O
C116	B-Operating_System
and	O
Plus/4	B-Operating_System
home	O
computers	O
,	O
where	O
its	O
I/O	B-General_Concept
port	O
controls	O
not	O
only	O
the	O
Datasette	B-Device
but	O
also	O
the	O
CBM	O
Bus	O
interface	O
.	O
</s>
<s>
The	O
2MHz-capable	O
8502	B-General_Concept
variant	O
is	O
used	O
in	O
the	O
Commodore	B-Device
128	I-Device
.	O
</s>
<s>
All	O
these	O
CPUs	O
are	O
opcode	B-Language
compatible	O
(	O
including	O
undocumented	B-Language
opcodes	I-Language
)	O
.	O
</s>
<s>
The	O
Commodore	B-Device
1551	I-Device
disk	O
drive	O
(	O
for	O
the	O
Commodore	B-Operating_System
Plus/4	I-Operating_System
)	O
uses	O
the	O
6510T	O
,	O
a	O
version	O
of	O
the	O
6510	B-General_Concept
with	O
eight	O
I/O	B-General_Concept
lines	O
.	O
</s>
<s>
The	O
NMI	B-General_Concept
and	O
RDY	O
signals	O
are	O
not	O
available	O
.	O
</s>
