<s>
The	O
MOS	B-General_Concept
Technology	I-General_Concept
6508	I-General_Concept
is	O
an	O
8-bit	O
microprocessor	B-Architecture
designed	O
by	O
MOS	B-Architecture
Technology	I-Architecture
.	O
</s>
<s>
Based	O
on	O
the	O
popular	O
6502	B-General_Concept
,	O
the	O
6508	O
is	O
augmented	O
with	O
two	O
additional	O
features	O
:	O
an	O
internal	O
8-bit	O
digital	B-General_Concept
I/O	B-Architecture
port	I-Architecture
and	O
256	O
bytes	B-Application
of	O
internal	O
static	B-Architecture
RAM	I-Architecture
.	O
</s>
<s>
The	O
internal	O
RAM	O
is	O
mapped	O
into	O
the	O
CPU	O
address	B-General_Concept
space	I-General_Concept
both	O
at	O
-	O
and	O
at	O
-	O
,	O
so	O
it	O
can	O
serve	O
as	O
both	O
zero	B-General_Concept
page	I-General_Concept
and	O
stack	B-General_Concept
space	O
.	O
</s>
<s>
The	O
I/O	B-Architecture
port	I-Architecture
is	O
available	O
at	O
location	O
,	O
with	O
a	O
data-direction	O
register	O
at	O
,	O
which	O
is	O
the	O
same	O
layout	O
of	O
the	O
6510	B-General_Concept
.	O
</s>
<s>
SO	O
is	O
a	O
pin	O
that	O
is	O
also	O
offered	O
on	O
the	O
40-pin	O
6502	B-General_Concept
,	O
but	O
omitted	O
on	O
all	O
the	O
28-pin	O
650x	O
variants	O
(	O
65036507	O
)	O
.	O
</s>
