<s>
The	O
6507	B-General_Concept
(	O
typically	O
"	O
sixty-five-oh-seven	O
"	O
or	O
"	O
six-five-oh-seven	O
"	O
)	O
is	O
an	O
8-bit	O
microprocessor	B-Architecture
from	O
MOS	B-Architecture
Technology	I-Architecture
,	I-Architecture
Inc	I-Architecture
.	I-Architecture
</s>
<s>
It	O
is	O
a	O
version	O
of	O
their	O
40-pin	O
6502	B-General_Concept
packaged	O
in	O
a	O
28-pin	O
DIP	B-Algorithm
,	O
making	O
it	O
cheaper	O
to	O
package	O
and	O
integrate	O
in	O
systems	O
.	O
</s>
<s>
The	O
reduction	O
in	O
pin	O
count	O
is	O
achieved	O
by	O
reducing	O
the	O
address	B-Architecture
bus	I-Architecture
from	O
16	O
bits	O
to	O
13	O
(	O
limiting	O
the	O
available	O
memory	O
range	O
from	O
64KB	O
to	O
8KB	O
)	O
and	O
removing	O
a	O
number	O
of	O
other	O
pins	O
used	O
only	O
for	O
certain	O
applications	O
.	O
</s>
<s>
The	O
entire	O
6500	O
CPU	O
family	O
was	O
originally	O
conceived	O
as	O
a	O
line	O
of	O
very	O
low-cost	O
microprocessors	B-Architecture
for	O
small-scale	O
embedded	O
systems	O
.	O
</s>
<s>
The	O
6507	B-General_Concept
and	O
6502	B-General_Concept
chips	O
use	O
the	O
same	O
underlying	O
silicon	O
layers	O
,	O
and	O
differ	O
only	O
in	O
the	O
final	O
metallisation	O
layer	O
.	O
</s>
<s>
Micro-photography	O
of	O
the	O
6502	B-General_Concept
and	O
6507	B-General_Concept
shows	O
this	O
difference	O
.	O
</s>
<s>
The	O
6507	B-General_Concept
is	O
widely	O
used	O
in	O
two	O
applications	O
:	O
the	O
best-selling	O
Atari	B-General_Concept
2600	I-General_Concept
video	B-Device
game	I-Device
console	I-Device
and	O
Atari	B-Device
8-bit	I-Device
family	I-Device
peripherals	O
including	O
the	O
850	O
Serial	O
&	O
Parallel	O
Interface	O
,	O
and	O
the	O
810	B-Device
and	O
1050	B-Device
disk	O
drives	O
.	O
</s>
<s>
In	O
the	O
2600	O
,	O
the	O
system	O
is	O
further	O
limited	O
by	O
the	O
design	O
of	O
the	O
ROM	B-Protocol
cartridge	I-Protocol
slot	O
,	O
which	O
only	O
allows	O
for	O
4KB	O
of	O
the	O
external	O
memory	O
to	O
be	O
addressed	O
.	O
</s>
<s>
The	O
other	O
4KB	O
is	O
reserved	O
for	O
the	O
internal	O
RAM	B-Architecture
and	O
I/O	O
chips	O
,	O
using	O
a	O
minimal-cost	O
partial	O
decoding	O
technique	O
that	O
causes	O
the	O
RAM	B-Architecture
and	O
peripheral	O
device	O
registers	O
to	O
appear	O
at	O
multiple	O
aliased	O
addresses	O
throughout	O
the	O
4K	O
address	O
space	O
.	O
</s>
<s>
Most	O
other	O
machines	O
,	O
notably	O
home	O
computers	O
based	O
on	O
the	O
650x	B-General_Concept
architecture	I-General_Concept
,	O
use	O
either	O
the	O
standard	O
6502	B-General_Concept
or	O
extended	O
versions	O
of	O
it	O
,	O
in	O
order	O
to	O
allow	O
for	O
more	O
memory	O
.	O
</s>
<s>
By	O
the	O
time	O
the	O
6502	B-General_Concept
line	O
was	O
becoming	O
widely	O
used	O
around	O
1980	O
,	O
ROM	B-Device
and	O
RAM	B-Architecture
semiconductor	O
memory	O
prices	O
had	O
fallen	O
to	O
the	O
point	O
where	O
the	O
6507	B-General_Concept
was	O
no	O
longer	O
a	O
worthwhile	O
simplification	O
.	O
</s>
<s>
Its	O
use	O
in	O
new	O
designs	O
ceased	O
at	O
that	O
point	O
,	O
though	O
the	O
Atari	B-General_Concept
2600	I-General_Concept
that	O
contains	O
it	O
continued	O
to	O
be	O
sold	O
into	O
the	O
early	O
1990s	O
,	O
as	O
it	O
was	O
not	O
discontinued	O
until	O
January	O
1	O
,	O
1992	O
.	O
</s>
<s>
However	O
,	O
late-model	O
Atari	B-General_Concept
2600	I-General_Concept
consoles	O
do	O
not	O
necessarily	O
contain	O
a	O
discrete	O
6507	B-General_Concept
chip	O
.	O
</s>
<s>
The	O
6507	B-General_Concept
uses	O
a	O
28-pin	O
configuration	O
,	O
with	O
13	O
address	O
pins	O
and	O
8	O
data	O
pins	O
.	O
</s>
<s>
The	O
seven	O
remaining	O
pins	O
are	O
used	O
for	O
power	O
,	O
the	O
CPU	O
timing	O
clock	O
,	O
to	O
reset	O
the	O
CPU	O
,	O
to	O
request	O
a	O
CPU	O
wait	O
state	O
during	O
its	O
next	O
memory	O
read	O
access	O
(	O
the	O
RDY	O
pin	O
)	O
,	O
and	O
for	O
the	O
CPU	O
to	O
indicate	O
if	O
a	O
read	O
or	O
write	O
memory	O
(	O
or	O
MMIO	B-Architecture
device	O
)	O
access	O
is	O
being	O
performed	O
.	O
</s>
<s>
There	O
is	O
no	O
IRQ	B-General_Concept
or	O
NMI	B-General_Concept
pin	O
on	O
the	O
processor	O
.	O
</s>
<s>
The	O
RDY	O
pin	O
is	O
not	O
included	O
on	O
all	O
other	O
28-pin	O
cut-down	O
versions	O
of	O
the	O
6502	B-General_Concept
.	O
</s>
<s>
Within	O
the	O
Atari	B-General_Concept
2600	I-General_Concept
,	O
RDY	O
is	O
used	O
to	O
synchronise	O
the	O
CPU	O
to	O
the	O
television	O
video	O
lines	O
.	O
</s>
<s>
This	O
function	O
is	O
essential	O
for	O
the	O
'	O
racing	O
the	O
beam	O
 '	O
method	O
used	O
by	O
the	O
6502	B-General_Concept
and	O
Atari	O
Television	B-General_Concept
Interface	I-General_Concept
Adaptor	I-General_Concept
chip	O
to	O
generate	O
the	O
television	O
video	O
signal	O
.	O
</s>
