<s>
The	O
MOSI	B-General_Concept
protocol	I-General_Concept
is	O
an	O
extension	O
of	O
the	O
basic	O
MSI	B-General_Concept
cache	B-General_Concept
coherency	I-General_Concept
protocol	O
.	O
</s>
<s>
In	O
MOSI	B-General_Concept
protocol	I-General_Concept
,	O
each	O
cache	O
has	O
the	O
following	O
requests	O
:	O
</s>
<s>
BusRd	O
-	O
Snooped	B-General_Concept
request	I-General_Concept
indicating	O
that	O
there	O
is	O
a	O
read	O
request	O
to	O
a	O
cache	O
block	O
made	O
by	O
another	O
processor	O
.	O
</s>
<s>
BusRdX	O
-	O
Snooped	B-General_Concept
request	I-General_Concept
indicating	O
that	O
there	O
is	O
a	O
write	O
request	O
to	O
a	O
cache	O
block	O
made	O
by	O
another	O
processor	O
that	O
does	O
not	O
have	O
the	O
block	O
.	O
</s>
<s>
BusUpgr	O
-	O
Snooped	B-General_Concept
request	I-General_Concept
depicting	O
that	O
there	O
is	O
a	O
write	O
request	O
to	O
a	O
cache	O
block	O
made	O
by	O
another	O
processor	O
that	O
already	O
has	O
the	O
block	O
in	O
its	O
cache	O
.	O
</s>
<s>
Flush	O
-	O
Snooped	B-General_Concept
request	I-General_Concept
after	O
which	O
the	O
cache	O
block	O
is	O
placed	O
on	O
the	O
bus	O
for	O
a	O
cache	O
to	O
cache	O
transfer	O
.	O
</s>
<s>
The	O
obvious	O
difference	O
between	O
the	O
MSI	B-General_Concept
protocol	I-General_Concept
and	O
the	O
MOSI	B-General_Concept
protocol	I-General_Concept
,	O
also	O
known	O
as	O
the	O
Berkeley	O
protocol	O
is	O
the	O
presence	O
of	O
an	O
extra	O
state	O
(	O
owned	O
)	O
in	O
MOSI	O
in	O
addition	O
to	O
having	O
just	O
a	O
modified	O
(	O
M	O
)	O
state	O
.	O
</s>
<s>
In	O
the	O
MSI	B-General_Concept
protocol	I-General_Concept
,	O
whenever	O
there	O
is	O
a	O
read	O
miss	O
request	O
to	O
block	O
which	O
is	O
in	O
the	O
modified	O
(	O
M	O
)	O
state	O
,	O
it	O
writes	O
back	O
to	O
the	O
main	O
memory	O
while	O
changing	O
the	O
status	O
of	O
the	O
block	O
to	O
shared	O
(	O
S	O
)	O
.	O
</s>
<s>
But	O
in	O
the	O
case	O
of	O
MOSI	B-General_Concept
protocol	I-General_Concept
,	O
where	O
we	O
have	O
an	O
additional	O
state	O
(	O
owner	O
)	O
,	O
whenever	O
another	O
processor	O
requests	O
for	O
a	O
read	O
operation	O
,	O
the	O
block	O
changes	O
from	O
modified	O
to	O
the	O
owned	O
(	O
O	O
)	O
state	O
and	O
so	O
retains	O
the	O
dirty	O
block	O
of	O
cache	O
,	O
thereby	O
removing	O
the	O
need	O
to	O
write	O
back	O
to	O
the	O
main	O
memory	O
immediately	O
.	O
</s>
<s>
In	O
MSI	B-General_Concept
,	O
the	O
MS	O
transition	O
of	O
processor	O
1	O
from	O
the	O
read	O
leads	O
to	O
one	O
memory	O
write	O
,	O
and	O
then	O
the	O
SM	O
transition	O
leads	O
to	O
a	O
BusUpgr	O
.	O
</s>
<s>
MOSI	O
therefore	O
dispensed	O
the	O
initial	O
memory	O
write	O
back	O
and	O
associated	O
bus	O
traffic	O
which	O
MSI	B-General_Concept
would	O
do	O
.	O
</s>
<s>
Both	O
MESI	B-General_Concept
(	O
also	O
known	O
as	O
Illinois	O
)	O
and	O
MOSI	B-General_Concept
protocols	I-General_Concept
,	O
are	O
extensions	O
of	O
the	O
MSI	B-General_Concept
protocol	I-General_Concept
to	O
improve	O
different	O
functionalities	O
.	O
</s>
<s>
MOSI	O
focuses	O
on	O
reducing	O
write	O
backs	O
and	O
MESI	B-General_Concept
attempts	O
to	O
reduce	O
the	O
number	O
of	O
bus	O
transactions	O
required	O
after	O
a	O
read	O
and	O
write	O
request	O
from	O
another	O
processor	O
.	O
</s>
<s>
The	O
exclusive	O
(	O
E	O
)	O
state	O
in	O
MESI	B-General_Concept
protocol	I-General_Concept
implies	O
that	O
the	O
cache	O
block	O
is	O
valid	O
,	O
clean	O
(	O
same	O
value	O
as	O
in	O
the	O
main	O
memory	O
)	O
and	O
cached	O
only	O
in	O
one	O
cache	O
whereas	O
the	O
owned	O
(	O
O	O
)	O
state	O
in	O
MOSI	B-General_Concept
protocol	I-General_Concept
implies	O
that	O
the	O
cache	O
block	O
is	O
valid	O
,	O
potentially	O
dirty	O
,	O
writable	O
and	O
could	O
be	O
present	O
in	O
more	O
than	O
one	O
cache	O
(	O
all	O
caches	O
have	O
the	O
same	O
value	O
)	O
.	O
</s>
