<s>
MMX	B-Architecture
is	O
a	O
single	B-Device
instruction	I-Device
,	I-Device
multiple	I-Device
data	I-Device
(	O
SIMD	B-Device
)	O
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
designed	O
by	O
Intel	O
,	O
introduced	O
on	O
January	O
8	O
,	O
1997	O
with	O
its	O
Pentium	B-General_Concept
P5	B-General_Concept
(	O
microarchitecture	O
)	O
based	O
line	O
of	O
microprocessors	B-Architecture
,	O
named	O
"	O
Pentium	B-General_Concept
with	O
MMX	B-Architecture
Technology	O
"	O
.	O
</s>
<s>
It	O
developed	O
out	O
of	O
a	O
similar	O
unit	O
introduced	O
on	O
the	O
Intel	B-General_Concept
i860	I-General_Concept
,	O
and	O
earlier	O
the	O
Intel	B-General_Concept
i750	I-General_Concept
video	O
pixel	O
processor	O
.	O
</s>
<s>
MMX	B-Architecture
is	O
a	O
processor	B-General_Concept
supplementary	I-General_Concept
capability	I-General_Concept
that	O
is	O
supported	O
on	O
IA-32	B-Device
processors	O
by	O
Intel	O
and	O
other	O
vendors	O
.	O
</s>
<s>
MMX	B-Architecture
has	O
subsequently	O
been	O
extended	O
by	O
several	O
programs	O
by	O
Intel	O
and	O
others	O
:	O
3DNow	O
!,	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
(	O
SSE	O
)	O
,	O
and	O
ongoing	O
revisions	O
of	O
Advanced	B-General_Concept
Vector	I-General_Concept
Extensions	I-General_Concept
(	O
AVX	O
)	O
.	O
</s>
<s>
Advanced	O
Micro	O
Devices	O
(	O
AMD	O
)	O
,	O
during	O
one	O
of	O
its	O
many	O
court	O
battles	O
with	O
Intel	O
,	O
produced	O
marketing	O
material	O
from	O
Intel	O
indicating	O
that	O
MMX	B-Architecture
stood	O
for	O
"	O
Matrix	O
Math	O
Extensions	O
"	O
.	O
</s>
<s>
In	O
1995	O
,	O
Intel	O
filed	O
suit	O
against	O
AMD	O
and	O
Cyrix	O
Corp	O
.	O
for	O
misuse	O
of	O
its	O
trademark	O
MMX	B-Architecture
.	O
</s>
<s>
AMD	O
and	O
Intel	O
settled	O
,	O
with	O
AMD	O
acknowledging	O
MMX	B-Architecture
as	O
a	O
trademark	O
owned	O
by	O
Intel	O
,	O
and	O
with	O
Intel	O
granting	O
AMD	O
rights	O
to	O
use	O
the	O
MMX	B-Architecture
trademark	O
as	O
a	O
technology	O
name	O
,	O
but	O
not	O
a	O
processor	O
name	O
.	O
</s>
<s>
MMX	B-Architecture
defines	O
eight	O
processor	B-General_Concept
registers	I-General_Concept
,	O
named	O
MM0	O
through	O
MM7	O
,	O
and	O
operations	O
that	O
operate	O
on	O
them	O
.	O
</s>
<s>
MMX	B-Architecture
provides	O
only	O
integer	O
operations	O
.	O
</s>
<s>
When	O
originally	O
developed	O
,	O
for	O
the	O
Intel	B-General_Concept
i860	I-General_Concept
,	O
the	O
use	O
of	O
integer	O
math	O
made	O
sense	O
(	O
both	O
2D	O
and	O
3D	O
calculations	O
required	O
it	O
)	O
,	O
but	O
as	O
graphics	O
cards	O
that	O
did	O
much	O
of	O
this	O
became	O
common	O
,	O
integer	O
SIMD	B-Device
in	O
the	O
CPU	O
became	O
somewhat	O
redundant	O
for	O
graphical	O
applications	O
.	O
</s>
<s>
Alternatively	O
,	O
the	O
saturation	B-Algorithm
arithmetic	I-Algorithm
operations	O
in	O
MMX	B-Architecture
could	O
significantly	O
speed	O
up	O
some	O
digital	B-General_Concept
signal	I-General_Concept
processing	I-General_Concept
applications	O
.	O
</s>
<s>
To	O
avoid	O
compatibility	O
problems	O
with	O
the	O
context	B-Operating_System
switch	I-Operating_System
mechanisms	O
in	O
existing	O
operating	O
systems	O
,	O
the	O
MMX	B-Architecture
registers	O
are	O
aliases	O
for	O
the	O
existing	O
x87	B-Application
floating-point	B-General_Concept
unit	I-General_Concept
(	O
FPU	O
)	O
registers	O
,	O
which	O
context	B-Operating_System
switches	I-Operating_System
would	O
already	O
save	O
and	O
restore	O
.	O
</s>
<s>
Unlike	O
the	O
x87	B-Application
registers	O
,	O
which	O
behave	O
like	O
a	O
stack	B-Application
,	O
the	O
MMX	B-Architecture
registers	O
are	O
each	O
directly	O
addressable	O
(	O
random	O
access	O
)	O
.	O
</s>
<s>
Any	O
operation	O
involving	O
the	O
floating-point	O
stack	B-Application
might	O
also	O
affect	O
the	O
MMX	B-Architecture
registers	O
and	O
vice	O
versa	O
,	O
so	O
this	O
aliasing	O
makes	O
it	O
difficult	O
to	O
work	O
with	O
floating-point	O
and	O
SIMD	B-Device
operations	O
in	O
the	O
same	O
program	O
.	O
</s>
<s>
Each	O
64-bit	O
MMX	B-Architecture
register	O
corresponds	O
to	O
the	O
mantissa	B-Algorithm
part	O
of	O
an	O
80-bit	O
x87	B-Application
register	O
.	O
</s>
<s>
The	O
upper	O
16	O
bits	O
of	O
the	O
x87	B-Application
registers	O
thus	O
go	O
unused	O
in	O
MMX	B-Architecture
,	O
and	O
these	O
bits	O
are	O
all	O
set	O
to	O
ones	O
,	O
making	O
them	O
Not	O
a	O
Number	O
(	O
NaN	O
)	O
data	O
types	O
,	O
or	O
infinities	O
in	O
the	O
floating-point	O
representation	O
.	O
</s>
<s>
This	O
can	O
be	O
used	O
by	O
software	O
to	O
decide	O
whether	O
a	O
given	O
register	O
's	O
content	O
is	O
intended	O
as	O
floating-point	O
or	O
SIMD	B-Device
data	O
.	O
</s>
<s>
Software	O
support	O
for	O
MMX	B-Architecture
developed	O
slowly	O
.	O
</s>
<s>
Intel	B-Language
's	I-Language
C	I-Language
Compiler	I-Language
and	O
related	O
development	O
tools	O
obtained	O
intrinsics	B-Application
for	O
invoking	O
MMX	B-Architecture
instructions	O
and	O
Intel	O
released	O
libraries	B-Library
of	O
common	O
vectorized	O
algorithms	O
using	O
MMX	B-Architecture
.	O
</s>
<s>
Both	O
Intel	O
and	O
Metrowerks	O
attempted	O
automatic	B-General_Concept
vectorization	I-General_Concept
in	O
their	O
compilers	O
,	O
but	O
the	O
operations	O
in	O
the	O
C	B-Language
programming	I-Language
language	I-Language
mapped	O
poorly	O
onto	O
the	O
MMX	B-Architecture
instruction	B-General_Concept
set	I-General_Concept
and	O
custom	O
algorithms	O
as	O
of	O
2000	O
typically	O
still	O
had	O
to	O
be	O
written	O
in	O
assembly	B-Language
language	I-Language
.	O
</s>
<s>
AMD	O
,	O
a	O
competing	O
x86	B-Operating_System
microprocessor	I-Operating_System
vendor	O
,	O
enhanced	O
Intel	O
's	O
MMX	B-Architecture
with	O
their	O
own	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
3DNow	B-General_Concept
is	O
best	O
known	O
for	O
adding	O
single-precision	O
(	O
32-bit	O
)	O
floating-point	O
support	O
to	O
the	O
SIMD	B-Device
instruction-set	O
,	O
among	O
other	O
integer	O
and	O
more	O
general	O
enhancements	O
.	O
</s>
<s>
Following	O
MMX	B-Architecture
,	O
Intel	O
's	O
next	O
major	O
x86	B-Operating_System
extension	O
was	O
the	O
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
(	O
SSE	O
)	O
,	O
introduced	O
with	O
the	O
Pentium	B-General_Concept
III	I-General_Concept
family	O
in	O
1999	O
,	O
roughly	O
a	O
year	O
after	O
AMD	O
's	O
3DNow	B-General_Concept
!	I-General_Concept
</s>
<s>
SSE	O
addressed	O
the	O
core	O
shortcomings	O
of	O
MMX	B-Architecture
(	O
inability	O
to	O
mix	O
integer-SIMD	O
ops	O
with	O
any	O
floating-point	O
ops	O
)	O
by	O
creating	O
a	O
new	O
128-bit	O
wide	O
register	O
file	O
(	O
XMM0	O
–	O
XMM7	O
)	O
and	O
new	O
SIMD	B-Device
instructions	O
for	O
it	O
.	O
</s>
<s>
Like	O
3DNow	O
!,	O
SSE	O
focused	O
exclusively	O
on	O
single-precision	O
floating-point	O
operations	O
(	O
32-bit	O
)	O
;	O
integer	O
SIMD	B-Device
operations	O
were	O
still	O
performed	O
using	O
the	O
MMX	B-Architecture
register	O
and	O
instruction	B-General_Concept
set	I-General_Concept
.	O
</s>
<s>
However	O
,	O
the	O
new	O
XMM	O
register-file	O
allowed	O
SSE	O
SIMD-operations	O
to	O
be	O
freely	O
mixed	O
with	O
either	O
MMX	B-Architecture
or	O
x87	B-Application
FPU	I-Application
ops	O
.	O
</s>
<s>
Streaming	B-General_Concept
SIMD	I-General_Concept
Extensions	I-General_Concept
2	O
(	O
SSE2	B-General_Concept
)	O
,	O
introduced	O
with	O
the	O
Pentium	B-General_Concept
4	I-General_Concept
,	O
further	O
extended	O
the	O
x86	B-Operating_System
SIMD	B-Device
instruction	B-General_Concept
set	I-General_Concept
with	O
integer	O
(	O
8/16/32	O
bit	O
)	O
and	O
double-precision	O
floating-point	O
data	O
support	O
for	O
the	O
XMM	O
register	O
file	O
.	O
</s>
<s>
SSE2	B-General_Concept
also	O
allowed	O
the	O
MMX	B-Architecture
operation	B-Language
codes	I-Language
(	O
opcodes	B-Language
)	O
to	O
use	O
XMM	O
register	O
operands	O
,	O
extended	O
to	O
even	O
wider	O
YMM	O
and	O
ZMM	O
registers	O
by	O
later	O
SSE	O
revisions	O
.	O
</s>
<s>
Intel	O
's	O
and	O
Marvell	O
Technology	O
Group	O
's	O
XScale	B-Application
microprocessor	B-Architecture
core	O
starting	O
with	O
PXA270	O
include	O
an	O
SIMD	B-Device
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
extension	O
to	O
the	O
ARM	B-Architecture
architecture	I-Architecture
core	O
named	O
Intel	O
Wireless	O
MMX	B-Architecture
Technology	O
(	O
iwMMXt	B-Architecture
)	O
which	O
functions	O
are	O
similar	O
to	O
those	O
of	O
the	O
IA-32	B-Device
MMX	B-Architecture
extension	O
.	O
</s>
<s>
All	O
registers	O
are	O
accessed	O
through	O
standard	O
ARM	B-Architecture
architecture	I-Architecture
coprocessor	O
mapping	O
mechanism	O
.	O
</s>
<s>
iwMMXt	B-Architecture
occupies	O
coprocessors	O
0	O
and	O
1	O
space	O
,	O
and	O
some	O
of	O
its	O
opcodes	B-Language
clash	O
with	O
the	O
opcodes	B-Language
of	O
the	O
earlier	O
floating-point	O
extension	O
,	O
FPA	O
.	O
</s>
<s>
Later	O
versions	O
of	O
Marvell	O
's	O
ARM	B-Architecture
processors	I-Architecture
support	O
both	O
Wireless	O
MMX	B-Architecture
(	O
WMMX	O
)	O
and	O
Wireless	O
MMX2	O
(	O
WMMX2	O
)	O
opcodes	B-Language
.	O
</s>
