<s>
In	O
the	O
x86-64	B-Device
computer	B-General_Concept
architecture	I-General_Concept
,	O
long	B-Application
mode	I-Application
is	O
the	O
mode	O
where	O
a	O
64-bit	B-Device
operating	B-General_Concept
system	I-General_Concept
can	O
access	O
64-bit	B-Device
instructions	O
and	O
registers	B-General_Concept
.	O
</s>
<s>
64-bit	B-Device
programs	O
are	O
run	O
in	O
a	O
sub-mode	O
called	O
64-bit	B-Device
mode	O
,	O
while	O
32-bit	O
programs	O
and	O
16-bit	O
protected	B-Application
mode	I-Application
programs	O
are	O
executed	O
in	O
a	O
sub-mode	O
called	O
compatibility	O
mode	O
.	O
</s>
<s>
Real	B-Application
mode	I-Application
or	O
virtual	B-Application
8086	I-Application
mode	I-Application
programs	O
cannot	O
be	O
natively	O
run	O
in	O
long	B-Application
mode	I-Application
.	O
</s>
<s>
An	O
x86-64	B-Device
processor	O
acts	O
identically	O
as	O
an	O
IA-32	B-Device
processor	O
when	O
running	O
in	O
real	B-Application
mode	I-Application
or	O
protected	B-Application
mode	I-Application
,	O
which	O
are	O
supported	O
sub-modes	O
when	O
the	O
processor	O
is	O
not	O
in	O
long	B-Application
mode	I-Application
.	O
</s>
<s>
A	O
bit	O
in	O
the	O
CPUID	B-Architecture
extended	O
attributes	O
field	O
informs	O
programs	O
in	O
real	O
or	O
protected	B-Application
modes	I-Application
if	O
the	O
processor	O
can	O
go	O
to	O
long	B-Application
mode	I-Application
,	O
which	O
allows	O
a	O
program	O
to	O
detect	O
an	O
x86-64	B-Device
processor	O
.	O
</s>
<s>
This	O
is	O
similar	O
to	O
the	O
CPUID	B-Architecture
attributes	O
bit	O
that	O
Intel	O
IA-64	B-General_Concept
processors	O
use	O
to	O
allow	O
programs	O
to	O
detect	O
if	O
they	O
are	O
running	O
under	O
IA-32	B-Device
emulation	O
.	O
</s>
<s>
With	O
a	O
computer	O
running	O
legacy	B-Operating_System
BIOS	I-Operating_System
,	O
the	O
BIOS	B-Operating_System
and	O
the	O
boot	B-Application
loader	I-Application
is	O
running	O
in	O
Real	B-Application
mode	I-Application
,	O
then	O
the	O
64-bit	B-Device
operating	B-General_Concept
system	I-General_Concept
kernel	O
checks	O
and	O
switches	O
the	O
CPU	O
into	O
Long	B-Application
mode	I-Application
and	O
then	O
starts	O
new	O
kernel-mode	B-Operating_System
threads	O
running	O
64-bit	B-Device
code	O
.	O
</s>
<s>
With	O
a	O
computer	O
running	O
UEFI	B-Architecture
,	O
the	O
UEFI	B-Architecture
firmware	I-Architecture
(	O
except	O
CSM	O
and	O
legacy	O
Option	B-Device
ROM	I-Device
)	O
,	O
the	O
UEFI	B-Architecture
boot	B-Application
loader	I-Application
and	O
the	O
UEFI	B-Architecture
operating	B-General_Concept
system	I-General_Concept
kernel	O
is	O
all	O
running	O
in	O
Long	B-Application
mode	I-Application
.	O
</s>
<s>
While	O
register	O
sizes	O
have	O
increased	O
to	O
64	B-Device
bits	I-Device
from	O
the	O
previous	O
x86	B-Operating_System
architecture	I-Operating_System
,	O
memory	B-General_Concept
addressing	I-General_Concept
has	O
not	O
yet	O
been	O
increased	O
to	O
the	O
full	O
64	B-Device
bits	I-Device
.	O
</s>
<s>
For	O
the	O
time	O
being	O
,	O
it	O
is	O
impractical	O
to	O
equip	O
computers	O
with	O
sufficient	O
memory	O
to	O
require	O
a	O
full	O
64	B-Device
bits	I-Device
.	O
</s>
<s>
As	O
long	O
as	O
that	O
remains	O
the	O
case	O
,	O
load/store	O
unit(s )	O
,	O
cache	B-General_Concept
tags	O
,	O
MMUs	B-General_Concept
and	O
TLBs	B-Architecture
can	O
be	O
simplified	O
without	O
any	O
loss	O
of	O
usable	O
memory	O
.	O
</s>
<s>
Despite	O
this	O
limitation	O
,	O
software	O
is	O
programmed	O
using	O
full	O
64-bit	B-Device
pointers	O
,	O
and	O
will	O
therefore	O
be	O
able	O
to	O
use	O
progressively	O
larger	O
address	O
spaces	O
as	O
they	O
become	O
supported	O
by	O
future	O
processors	O
and	O
operating	B-General_Concept
systems	I-General_Concept
.	O
</s>
<s>
The	O
first	O
CPUs	O
implementing	O
the	O
x86-64	B-Device
architecture	O
,	O
namely	O
the	O
AMD	O
Athlon	O
64	O
/	O
Opteron	B-General_Concept
(	O
K8	O
)	O
CPUs	O
,	O
had	O
48-bit	O
virtual	B-General_Concept
and	O
40-bit	O
physical	O
addressing	O
.	O
</s>
<s>
The	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
of	O
these	O
processors	O
is	O
divided	O
into	O
two	O
47-bit	O
regions	O
,	O
one	O
starting	O
at	O
the	O
lowest	O
possible	O
address	O
,	O
the	O
other	O
extending	O
down	O
from	O
the	O
largest	O
.	O
</s>
<s>
Attempting	O
to	O
use	O
addresses	O
falling	O
outside	O
this	O
range	O
will	O
cause	O
a	O
general	B-Operating_System
protection	I-Operating_System
fault	I-Operating_System
.	O
</s>
<s>
The	O
limit	O
of	O
physical	O
addressing	O
constrains	O
how	O
much	O
installed	O
RAM	B-Architecture
is	O
able	O
to	O
be	O
accessed	O
by	O
the	O
computer	O
.	O
</s>
<s>
On	O
a	O
ccNUMA	O
multiprocessor	B-Operating_System
system	O
(	O
Opteron	B-General_Concept
)	O
this	O
includes	O
the	O
memory	O
which	O
is	O
installed	O
in	O
the	O
remote	O
nodes	O
,	O
because	O
the	O
CPUs	O
can	O
directly	O
address	O
(	O
and	O
cache	B-General_Concept
)	O
all	O
memory	O
regardless	O
if	O
it	O
is	O
on	O
the	O
home	O
node	O
or	O
remote	O
.	O
</s>
<s>
Consequently	O
,	O
the	O
K10	O
(	O
or	O
"	O
10h	O
"	O
)	O
microarchitecture	B-General_Concept
implements	O
48-bit	O
physical	O
addresses	O
and	O
so	O
can	O
address	O
up	O
to	O
256TB	O
of	O
RAM	B-Architecture
.	O
</s>
<s>
When	O
there	O
is	O
need	O
,	O
the	O
microarchitecture	B-General_Concept
can	O
be	O
expanded	O
step	O
by	O
step	O
without	O
side-effects	O
from	O
software	O
and	O
simultaneously	O
save	O
cost	O
with	O
its	O
implementation	O
.	O
</s>
<s>
For	O
future	O
expansion	O
,	O
the	O
architecture	O
supports	O
expanding	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
to	O
64	B-Device
bits	I-Device
,	O
and	O
physical	O
memory	B-General_Concept
addressing	I-General_Concept
to	O
52	O
bits	O
(	O
limited	O
by	O
the	O
page	B-General_Concept
table	I-General_Concept
entry	O
format	O
)	O
.	O
</s>
<s>
This	O
would	O
allow	O
the	O
processor	O
to	O
address	O
264	O
bytes	O
(	O
16	O
exabytes	O
)	O
of	O
virtual	B-General_Concept
address	I-General_Concept
space	I-General_Concept
and	O
252	O
bytes	O
(	O
4	O
petabytes	O
)	O
of	O
physical	B-General_Concept
address	I-General_Concept
space	O
.	O
</s>
