<s>
In	O
computer	O
engineering	O
,	O
a	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
unit	I-Architecture
(	O
LSU	O
)	O
is	O
a	O
specialized	O
execution	B-General_Concept
unit	I-General_Concept
responsible	O
for	O
executing	O
all	O
load	B-Architecture
and	I-Architecture
store	I-Architecture
instructions	O
,	O
generating	O
virtual	O
addresses	O
of	O
load	B-Architecture
and	I-Architecture
store	I-Architecture
operations	O
and	O
loading	O
data	O
from	O
memory	B-General_Concept
or	O
storing	O
it	O
back	O
to	O
memory	B-General_Concept
from	O
registers	O
.	O
</s>
<s>
The	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
unit	I-Architecture
usually	O
includes	O
a	O
queue	O
which	O
acts	O
as	O
a	O
waiting	O
area	O
for	O
memory	B-General_Concept
instructions	O
,	O
and	O
the	O
unit	O
itself	O
operates	O
independently	O
of	O
other	O
processor	O
units	O
.	O
</s>
<s>
Load	B-Architecture
–	I-Architecture
store	I-Architecture
units	I-Architecture
may	O
also	O
be	O
used	O
in	O
vector	B-Operating_System
processing	I-Operating_System
,	O
and	O
in	O
such	O
cases	O
the	O
term	O
"	O
load	O
–	O
store	O
vector	O
"	O
may	O
be	O
used	O
.	O
</s>
<s>
Some	O
load	B-Architecture
–	I-Architecture
store	I-Architecture
units	I-Architecture
are	O
also	O
capable	O
of	O
executing	O
simple	O
fixed-point	O
and/or	O
integer	O
operations	O
.	O
</s>
