<s>
Load	B-Device
value	I-Device
injection	I-Device
(	O
LVI	O
)	O
is	O
an	O
attack	O
on	O
Intel	B-Device
microprocessors	I-Device
that	O
can	O
be	O
used	O
to	O
attack	O
Intel	O
's	O
Software	O
Guard	O
Extensions	O
(	O
SGX	O
)	O
technology	O
.	O
</s>
<s>
It	O
is	O
a	O
development	O
of	O
the	O
previously	O
known	O
Meltdown	B-Architecture
security	O
vulnerability	O
.	O
</s>
<s>
Unlike	O
Meltdown	B-Architecture
,	O
which	O
can	O
only	O
read	O
hidden	O
data	O
,	O
LVI	O
can	O
inject	O
data	O
values	O
,	O
and	O
is	O
resistant	O
to	O
the	O
countermeasures	O
so	O
far	O
used	O
to	O
mitigate	O
the	O
Meltdown	B-Architecture
vulnerability	I-Architecture
.	O
</s>
<s>
In	O
theory	O
,	O
any	O
processor	O
affected	O
by	O
Meltdown	B-Architecture
may	O
be	O
vulnerable	O
to	O
LVI	O
,	O
but	O
,	O
LVI	O
is	O
only	O
known	O
to	O
affect	O
Intel	B-Device
microprocessors	I-Device
.	O
</s>
<s>
Intel	O
has	O
published	O
a	O
guide	O
to	O
mitigating	O
the	O
vulnerability	O
by	O
using	O
compiler	O
technology	O
,	O
requiring	O
existing	O
software	O
to	O
be	O
recompiled	O
to	O
add	O
LFENCE	O
memory	B-General_Concept
barrier	I-General_Concept
instructions	B-General_Concept
at	O
every	O
potentially	O
vulnerable	O
point	O
in	O
the	O
code	O
.	O
</s>
