<s>
The	O
Pentium	B-Device
Pro	I-Device
is	O
the	O
first	O
of	O
Intel	O
's	O
sixth-generation	O
CPUs	B-General_Concept
targeted	O
at	O
the	O
consumer	O
and	O
server	O
markets	O
.	O
</s>
<s>
The	O
processor	O
was	O
relatively	O
unusual	O
in	O
that	O
the	O
Pentium	B-Device
Pro	I-Device
used	O
a	O
unique	O
"	O
on-package	O
cache	O
"	O
arrangement	O
;	O
the	O
processor	O
and	O
the	O
cache	O
were	O
on	O
separate	O
dies	O
in	O
the	O
same	O
package	O
and	O
were	O
connected	O
closely	O
by	O
a	O
full-speed	O
bus	O
.	O
</s>
<s>
This	O
meant	O
that	O
a	O
single	O
,	O
tiny	O
flaw	O
in	O
either	O
die	O
made	O
it	O
necessary	O
to	O
discard	O
the	O
entire	O
assembly	O
,	O
which	O
was	O
one	O
of	O
the	O
reasons	O
for	O
the	O
Pentium	B-Device
Pro	I-Device
's	O
relatively	O
low	O
production	O
yield	O
and	O
high	O
cost	O
.	O
</s>
<s>
The	O
150MHz	O
Pentium	B-Device
Pro	I-Device
processor	O
dies	O
(	O
B0	O
,	O
C0	O
)	O
used	O
a	O
0.50	O
μm	O
BiCMOS	B-General_Concept
process	O
.	O
</s>
<s>
The	O
166	O
,	O
180	O
,	O
and	O
200MHz	O
Pentium	B-Device
Pro	I-Device
processor	O
dies	O
(	O
sA0	O
,	O
sA1	O
,	O
sB1	O
)	O
used	O
a	O
0.35	O
μm	O
CMOS	B-Device
process	O
.	O
</s>
<s>
The	O
256	O
KB	O
L2	O
cache	O
dies	O
(	O
256/α	O
,	O
256/β	O
)	O
used	O
a	O
0.50	O
μm	O
BiCMOS	B-General_Concept
process	O
.	O
</s>
<s>
The	O
512	O
KB	O
and	O
1	O
MB	O
L2	O
cache	O
dies	O
(	O
512/α	O
,	O
512/β	O
,	O
1024/γ	O
)	O
used	O
a	O
0.35	O
μm	O
CMOS	B-Device
process	O
.	O
</s>
<s>
Only	O
the	O
Pentium	O
II	O
Overdrive	O
supports	O
MMX	B-Architecture
.	O
</s>
