<s>
The	O
following	O
is	O
a	O
list	O
of	O
Intel	B-Device
Core	I-Device
i7	I-Device
brand	O
microprocessors	B-Architecture
.	O
</s>
<s>
Introduced	O
in	O
2008	O
,	O
the	O
Core	B-Device
i7	I-Device
line	O
of	O
microprocessors	B-Architecture
are	O
intended	O
to	O
be	O
used	O
by	O
high-end	O
users	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
Smart	O
Cache	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
QPI	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Core	O
i7-875K	O
features	O
an	O
unlocked	O
multiplier	O
and	O
does	O
not	O
support	O
Intel	B-Device
TXT	I-Device
and	O
Intel	O
VT-d	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	B-Architecture
.	O
</s>
<s>
Moves	O
the	O
QPI	B-Architecture
link	O
and	O
PCI-Express	O
controller	O
onto	O
the	O
processor	O
itself	O
(	O
eliminating	O
the	O
northbridge	O
)	O
,	O
using	O
DMI	B-Architecture
to	O
interface	O
a	O
single-component	O
"	O
chipset	B-Device
"	O
(	O
now	O
called	O
PCH	B-Device
)	O
that	O
serves	O
traditional	O
southbridge	B-Device
functions	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
QPI	B-Architecture
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
4	O
DIMMS	B-General_Concept
of	O
DDR3-1333	O
memory	O
.	O
</s>
<s>
K	O
processors	O
have	O
unlocked	O
turbo	B-Device
multiplier	O
but	O
does	O
not	O
support	O
Intel	B-Device
TXT	I-Device
,	O
Intel	O
VT-d	O
and	O
vPro	B-Architecture
.	O
</s>
<s>
Non-K	O
processors	O
will	O
have	O
limited	O
turbo	B-Device
overclocking	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
8	O
DIMMS	B-General_Concept
of	O
DDR3-1600	O
memory	O
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
4	O
DIMMS	B-General_Concept
of	O
DDR3-1600	O
memory	O
.	O
</s>
<s>
All	O
models	O
except	O
the	O
K	O
processors	O
additionally	O
support	O
Intel	B-Device
TXT	I-Device
,	O
Intel	O
VT-d	O
and	O
vPro	B-Architecture
.	O
</s>
<s>
K	O
processors	O
have	O
unlocked	O
turbo	B-Device
multiplier	O
but	O
do	O
not	O
support	O
Intel	B-Device
TXT	I-Device
,	O
Intel	O
VT-d	O
or	O
vPro	B-Architecture
.	O
</s>
<s>
Non-K	O
processors	O
will	O
have	O
limited	O
turbo	B-Device
overclocking	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
2.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
8	O
DIMMS	B-General_Concept
of	O
DDR3-1866	O
memory	O
.	O
</s>
<s>
All	O
models	O
except	O
the	O
i7-4770K	O
additionally	O
supported	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
at	O
launch	O
,	O
but	O
support	O
was	O
disabled	O
in	O
later	O
stepping	B-General_Concept
and	O
microcode	O
updates	O
,	O
due	O
to	O
the	O
incorrect	O
implementation	O
,	O
that	O
could	O
not	O
be	O
solved	O
by	O
microcode	O
without	O
hurting	O
performance	O
or	O
fixing	O
it	O
fully	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
(	O
BMI1	B-Device
)	O
(	O
Bit	O
Manipulation	O
Instructions1	O
)	O
+BMI2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
2.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
i7-4770R	O
does	O
not	O
support	O
TSX	B-Operating_System
,	O
TXT	B-Device
and	O
Vpro	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
2.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
8	O
DIMMS	B-General_Concept
of	O
DDR4-2133	O
memory	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Does	O
not	O
support	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
(	O
disabled	O
using	O
microcode	O
update	O
,	O
due	O
to	O
the	O
hardware	O
bugs	O
in	O
most	O
of	O
the	O
steppings	B-General_Concept
)	O
.	O
</s>
<s>
Support	O
for	O
up	O
to	O
8	O
DIMMS	B-General_Concept
of	O
DDR4-2400	O
memory	O
.	O
</s>
<s>
Embedded	O
models	O
also	O
support	O
:	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
(	O
BMI1	B-Device
)	O
(	O
Bit	O
Manipulation	O
Instructions1	O
)	O
+BMI2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
2.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
,	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
,	O
Intel	O
SGX	O
,	O
Intel	B-Device
MPX	I-Device
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Low	O
power	B-General_Concept
models	O
also	O
support	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
K	O
models	O
do	O
not	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
(	O
8xxx	O
only	O
)	O
,	O
AES-NI	B-Algorithm
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Intel	B-Architecture
vPro	I-Architecture
(	O
except	O
8086K	O
)	O
,	O
Intel	B-Device
TXT	I-Device
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Low	O
power	B-General_Concept
and	O
K	O
models	O
also	O
support	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
Intel	B-Device
TXT	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
.	O
</s>
<s>
Low	O
power	B-General_Concept
and	O
K	O
models	O
also	O
support	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
(	O
2.0	O
for	O
embedded	O
)	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
GNA	O
3.0	O
,	O
and	O
Optane	B-Device
memory	I-Device
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
Turbo	B-Device
(	O
2.0/3.0	O
)	O
L2cache	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
Smart	O
Cache	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	B-Architecture
.	O
</s>
<s>
Contains	O
45nm	O
"	O
Ironlake	O
"	O
GPU	B-Architecture
.	O
</s>
<s>
Core	O
i7-610E	O
,	O
i7-620UE	O
,	O
i7-620LE	O
and	O
i7-660UE	O
have	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
and	O
PCI	O
express	O
port	O
bifurcation	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Core	O
i7-2610UE	O
,	O
Core	O
i7-2655LE	O
does	O
not	O
support	O
XD	B-General_Concept
bit	I-General_Concept
(	O
Execute	B-General_Concept
Disable	I-General_Concept
bit	I-General_Concept
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Core	O
i7-2630QM	O
,	O
Core	O
i7-2635QM	O
,	O
Core	O
i7-2670QM	O
,	O
Core	O
i7-2675QM	O
do	O
not	O
support	O
TXT	B-Device
and	O
Intel	O
VT-d	O
.	O
</s>
<s>
Core	O
i7-2715QE	O
has	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
Core	O
i7-2710QE	O
,	O
Core	O
i7-2715QE	O
do	O
not	O
support	O
Intel	O
Insider	O
and	O
XD	B-General_Concept
bit	I-General_Concept
.	O
</s>
<s>
(	O
Execute	B-General_Concept
Disable	I-General_Concept
bit	I-General_Concept
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost2.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Core	O
i7-3517U	O
and	O
i7-3537U	O
do	O
not	O
support	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
TXT	B-Device
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Core	O
i7-3610QM	O
,	O
Core	O
i7-3612QM	O
and	O
Core	O
i7-3630QM	O
(	O
Socket	B-General_Concept
G2	O
)	O
do	O
not	O
support	O
Intel	O
VT-d	O
.	O
</s>
<s>
Core	O
i7-48xxMQ	O
,	O
i7-49xxMQ	O
,	O
and	O
all	O
MX	O
models	O
also	O
support	O
Intel	B-Device
TXT	I-Device
,	O
Intel	O
VT-d	O
,	O
and	O
vPro	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Intel	B-Device
TXT	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Intel	B-Device
TXT	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
(	O
47W	O
→	O
37W	O
)	O
.	O
</s>
<s>
EQ	O
models	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
and	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
F16C	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
(	O
45W	O
→	O
35W	O
)	O
.	O
</s>
<s>
Core	O
i7-6820HQ	O
,	O
Core	O
i7-6920HQ	O
,	O
and	O
embedded	O
models	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
Core	O
i7-6820HK	O
,	O
Core	O
i7-6820HQ	O
,	O
Core	O
i7-6920HQ	O
,	O
and	O
embedded	O
models	O
also	O
support	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
.	O
</s>
<s>
Core	O
i7-6600U	O
and	O
higher	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
i7-7820HQ	O
,	O
i7-7920HQ	O
and	O
embedded	O
models	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
i7-10610U	O
,	O
10810U	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
11850H	O
also	O
supports	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
(	O
except	O
SRK02	O
)	O
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
1185G7	O
,	O
1185G7E	O
and	O
1185GRE	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
-RE	O
models	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
1180	O
also	O
supports	O
Intel	B-Architecture
vPro	I-Architecture
,	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
Turbo	B-Device
L2cache	O
Base	O
MaxTurbo	O
Mobile	O
Core	O
i7-12650H	O
6	O
(	O
12	O
)	O
2.3	O
GHz	O
4.7	O
GHz	O
MB	O
4	O
(	O
4	O
)	O
1.7	O
GHz	O
3.5	O
GHz	O
MB	O
24	O
MB	O
UHD	O
Graphics	O
(	O
64	O
EU	O
)	O
?	O
–	O
1400	O
MHz	O
45	O
W	O
115	O
W	O
BGA	O
1744	O
DMI	B-Architecture
4.0	O
×8	O
January	O
2022	O
SRLD0	O
(	O
L0	O
)	O
FJ8071504786006	O
$457	O
Core	O
i7-12700H	O
6	O
(	O
12	O
)	O
2.3	O
GHz	O
4.7	O
GHz	O
MB	O
8	O
(	O
8	O
)	O
1.7	O
GHz	O
3.5	O
GHz	O
MB	O
24	O
MB	O
Iris	O
Xe	O
(	O
96	O
EU	O
)	O
?	O
–	O
1400	O
MHz	O
45	O
W	O
115	O
W	O
BGA	O
1744	O
DMI	B-Architecture
4.0	O
×8	O
January	O
2022	O
SRLD1	O
(	O
L0	O
)	O
FJ8071504786106	O
$457	O
Core	O
i7-12800H	O
6	O
(	O
12	O
)	O
2.4	O
GHz	O
4.8	O
GHz	O
MB	O
8	O
(	O
8	O
)	O
1.8	O
GHz	O
3.7	O
GHz	O
MB	O
24	O
MB	O
Iris	O
Xe	O
(	O
96	O
EU	O
)	O
?	O
–	O
1400	O
MHz	O
45	O
W	O
115	O
W	O
BGA	O
1744	O
DMI	B-Architecture
4.0	O
×8	O
January	O
2022	O
SRLD2	O
(	O
L0	O
)	O
FJ8071504786205	O
$457	O
Embedded	O
Core	O
i7-12800HE	O
6	O
(	O
12	O
)	O
?	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Model	O
numbers	O
1270	O
and	O
higher	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
and	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
(	O
except	O
SRLFR	O
)	O
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Standard	O
power	B-General_Concept
models	O
also	O
support	O
up	O
to	O
DDR5-4800	O
or	O
DDR4-3200	O
memory	O
.	O
</s>
<s>
Model	O
numbers	O
1260	O
and	O
higher	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
and	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
While	O
sharing	O
the	O
same	O
socket	B-General_Concept
as	O
Alder	B-Device
Lake-S	I-Device
and	O
Raptor	B-Device
Lake-S	I-Device
,	O
this	O
revision	O
of	O
LGA	B-Device
1700	I-Device
is	O
electrically	O
incompatible	O
with	O
other	O
12th	O
and	O
13th	O
generation	O
Intel	B-Device
Core	I-Device
desktop	O
processors	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
All	O
models	O
support	O
CPU	O
,	O
GPU	B-Architecture
,	O
and	O
memory	O
overclocking	O
.	O
</s>
<s>
13850HX	O
also	O
supports	O
Intel	B-Architecture
vPro	I-Architecture
and	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
3.0	O
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
"	O
2	O
"	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
1370P	O
,	O
1360P	O
and	O
1370PE	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
and	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
1365U	O
,	O
1365UE	O
and	O
1355U	O
also	O
support	O
Intel	B-Architecture
vPro	I-Architecture
and	O
Intel	B-Device
TXT	I-Device
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
