<s>
The	O
following	O
is	O
a	O
list	O
of	O
Intel	B-Device
Core	I-Device
i3	I-Device
brand	O
microprocessors	B-Architecture
.	O
</s>
<s>
These	O
processors	O
are	O
designed	O
with	O
cheap	O
price	O
points	O
,	O
while	O
still	O
retaining	O
the	O
power	B-General_Concept
of	O
the	O
Intel	B-Device
Core	I-Device
line	O
.	O
</s>
<s>
As	O
such	O
they	O
(	O
along	O
with	O
Intel	O
's	O
i5	B-Device
series	I-Device
)	O
are	O
often	O
found	O
in	O
laptops	O
and	O
low-end	O
desktop	O
computers	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-Threading	B-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	B-Architecture
.	O
</s>
<s>
Contains	O
a	O
GPU	B-Architecture
on	O
a	O
secondary	O
die	O
manufactured	O
in	O
45	O
nm	O
codenamed	O
"	O
Ironlake	O
"	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
ECC	B-General_Concept
memory	I-General_Concept
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
ECC	B-General_Concept
memory	I-General_Concept
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Intel	O
SGX	O
,	O
Intel	B-Device
MPX	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Low	O
power	B-General_Concept
models	O
also	O
support	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
Embedded	O
models	O
also	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
,	O
but	O
do	O
not	O
support	O
Intel	B-Operating_System
TSX-NI	I-Operating_System
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Intel	O
SGX	O
,	O
Intel	B-Device
MPX	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Embedded	O
models	O
also	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
9th	O
generation	O
models	O
also	O
support	O
Turbo	B-Device
Boost	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
Intel	O
SGX	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Low	O
power	B-General_Concept
models	O
also	O
support	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
Embedded	O
models	O
also	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
GNA	O
3.0	O
,	O
and	O
Optane	B-Device
memory	I-Device
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
GNA	O
3.0	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-Threading	B-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Core	O
i3-330E	O
has	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
and	O
PCI	O
express	O
port	O
bifurcation	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	B-Architecture
.	O
</s>
<s>
Contains	O
45	O
nm	O
"	O
Ironlake	O
"	O
GPU	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Core	O
i3-2310E	O
,	O
Core	O
i3-2340UE	O
have	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Core	O
i3-3120ME	O
,	O
i3-3217UE	O
have	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
Core	O
i3-3229Y	O
supports	O
AES-NI	B-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
(	O
except	O
7020U	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
up	O
and	O
down	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
SGX	O
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
(	O
except	O
1000NG4	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
(	O
except	O
SRK08	O
)	O
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
-RE	O
models	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
Hyper-threading	B-Operating_System
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
and	O
configurable	O
TDP	O
(	O
cTDP	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
(	O
except	O
SRLFU	O
)	O
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Standard	O
power	B-General_Concept
models	O
also	O
support	O
up	O
to	O
DDR5-4800	O
or	O
DDR4-3200	O
memory	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
Hyper-threading	B-Operating_System
,	O
Turbo	B-Device
Boost	I-Device
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
(	O
except	O
SRLFU	O
)	O
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Standard	O
power	B-General_Concept
models	O
also	O
support	O
up	O
to	O
DDR5-5200	O
or	O
DDR4-3200	O
memory	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
EPT	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
EPT	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
