<s>
The	O
Celeron	B-Device
is	O
a	O
family	O
of	O
microprocessors	O
from	O
Intel	O
targeted	O
at	O
the	O
low-end	O
consumer	O
market	O
.	O
</s>
<s>
CPUs	O
in	O
the	O
Celeron	B-Device
brand	O
have	O
used	O
designs	O
from	O
sixth	O
-	O
to	O
eighth-generation	O
CPU	B-General_Concept
microarchitectures	I-General_Concept
.	O
</s>
<s>
(	O
USD	O
)	O
Celeron	B-Device
1.5	O
SL69W	O
1.5	O
128	O
400	O
15×	O
1.75	O
?	O
</s>
<s>
478	B-Device
2002	O
RK80531RC021128	O
Celeron	B-Device
1.6	O
SL69Y	O
1.6	O
16×	O
RK80531RC025128	O
Celeron	B-Device
1.7	O
SL68C	O
,	O
SL69Z	O
1.7	O
17×	O
63.5	O
May	O
15	O
,	O
2002BX80531P170G128RK80531RC029128	O
$83Celeron	O
1.8	O
SL68D	O
,	O
SL6A2	O
1.8	O
18×	O
66.1	O
June	O
12	O
,	O
2002BX80531P180G128RK80531RC033128	O
$103	O
Celeron	B-Device
1.9	O
SL68E	O
,	O
SL6A3	O
1.9	O
19×	O
?	O
</s>
<s>
Steppings	B-General_Concept
:	O
?	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Contains	O
45	O
nm	O
"	O
Ironlake	O
"	O
GPU	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Celeron	B-Device
G440	O
does	O
not	O
support	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
this	O
is	O
a	O
special	O
case	O
as	O
the	O
processor	O
uses	O
the	O
minimum	O
available	O
multiplier	O
(	O
16x	O
)	O
.	O
</s>
<s>
The	O
Celeron	B-Device
G440	O
also	O
does	O
not	O
support	O
Hyper-threading	B-Operating_System
.	O
</s>
<s>
Celeron	B-Device
G460	O
,	O
G465	O
and	O
G470	O
support	O
Hyper-threading	B-Operating_System
.	O
</s>
<s>
HD	B-Application
Graphics	I-Application
(	O
Sandy	B-Device
Bridge	I-Device
)	O
contain	O
6	O
EUs	B-General_Concept
like	O
the	O
HD	B-Application
Graphics	I-Application
2000	I-Application
,	O
but	O
does	O
not	O
support	O
the	O
following	O
technologies	O
:	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
,	O
InTru	O
3D	O
,	O
Clear	O
Video	O
HD	O
,	O
Wireless	O
Display	O
,	O
and	O
it	O
does	O
not	O
support	O
3D	O
Video	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
,	O
ECC	B-General_Concept
Memory	I-General_Concept
.	O
</s>
<s>
HD	B-Application
Graphics	I-Application
(	O
Ivy	B-Device
Bridge	I-Device
)	O
contain	O
6	O
EUs	B-General_Concept
as	O
well	O
as	O
HD	B-Application
Graphics	I-Application
2500	I-Application
,	O
but	O
does	O
not	O
support	O
the	O
following	O
technologies	O
:	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
,	O
InTru	O
3D	O
,	O
Clear	O
Video	O
HD	O
,	O
Wireless	O
Display	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Ivy	B-Device
Bridge	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
4	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
11	O
,	O
OpenGL	O
4.0	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.1	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
J1800	O
and	O
J1900	O
support	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Broadwell	B-General_Concept
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
11.2	O
,	O
OpenGL	O
4.4	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
2.0	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
Haswell	B-Device
Celerons	B-Device
support	O
Quick	B-Algorithm
Sync	I-Algorithm
.	O
</s>
<s>
Haswell-R	O
Celerons	B-Device
G1840	O
,	O
G1850	O
,	O
and	O
G1840T	O
also	O
support	O
Intel	O
Wireless	O
Display	O
.	O
</s>
<s>
All	O
models	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
SGX	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Kaby	B-Device
Lake	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
12	O
,	O
OpenGL	O
4.5	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
2.0	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
SGX	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Kaby	B-Device
Lake	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
12	O
,	O
OpenGL	O
4.5	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
2.0	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
.	O
</s>
<s>
All	O
models	O
support	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
Two	O
USB	B-Protocol
3.2	O
2x1	O
ports	O
(	O
a.k.a.	O
</s>
<s>
Four	O
USB	B-Protocol
3.2	O
1x1	O
ports	O
(	O
a.k.a.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
GNA	O
3.0	O
,	O
and	O
Optane	B-Device
memory	I-Device
.	O
</s>
<s>
Note	O
that	O
900	O
has	O
also	O
been	O
used	O
for	O
three	O
earlier	O
models	O
of	O
Intel	B-Device
Celeron	I-Device
microprocessors	O
with	O
different	O
microarchitectures	B-General_Concept
.	O
</s>
<s>
Intel	O
initially	O
listed	O
the	O
Celeron	B-Device
900	O
as	O
Dual-Core	O
and	O
with	O
Virtualization	O
Technology	O
in	O
its	O
Processorfinder	O
and	O
ARK	O
databases	O
,	O
which	O
caused	O
confusion	O
among	O
customers	O
.	O
</s>
<s>
ULV	O
723	O
possibly	O
supports	O
EIST	B-Device
,	O
but	O
Intel	O
's	O
web	O
site	O
is	O
inconsistent	O
about	O
this	O
.	O
</s>
<s>
T1700	O
possibly	O
supports	O
EIST	B-Device
,	O
but	O
Intel	O
's	O
web	O
site	O
is	O
inconsistent	O
about	O
this	O
.	O
</s>
<s>
Note	O
that	O
the	O
Pentium	O
T3x00	O
processors	O
have	O
a	O
similar	O
number	O
but	O
are	O
based	O
on	O
the	O
older	O
Merom-2M	O
chips	O
.	O
</s>
<s>
P4505	O
and	O
U3405	O
support	O
memory	O
ECC	B-General_Concept
RAM	I-General_Concept
and	O
PCIe	O
bifurcation	O
.	O
</s>
<s>
FSB	B-Architecture
has	O
been	O
replaced	O
with	O
DMI	O
.	O
</s>
<s>
Contains	O
45nm	O
"	O
Ironlake	O
"	O
GPU	B-Architecture
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
(	O
Embedded	O
)	O
Celeron	B-Device
B810E	O
,	O
Celeron	B-Device
B847E	O
does	O
not	O
support	O
XD	O
bit(Execute Disable Bit )	O
,	O
nor	O
SSE4.1	O
and	O
SSE4.2	O
instructions	O
.	O
</s>
<s>
(	O
Embedded	O
)	O
Celeron	B-Device
B810E	O
,	O
Celeron	B-Device
B847E	O
has	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
HD	B-Application
Graphics	I-Application
(	O
Sandy	B-Device
Bridge	I-Device
)	O
contain	O
6	O
EUs	B-General_Concept
as	O
well	O
as	O
HD	B-Application
Graphics	I-Application
2000	I-Application
,	O
but	O
does	O
not	O
support	O
the	O
following	O
technologies	O
:	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
,	O
InTru	O
3D	O
,	O
Clear	O
Video	O
HD	O
,	O
Wireless	O
Display	O
,	O
and	O
it	O
does	O
n't	O
support	O
3D	O
Video	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
HD	B-Application
Graphics	I-Application
(	O
Ivy	B-Device
Bridge	I-Device
)	O
contain	O
6	O
EUs	B-General_Concept
as	O
well	O
as	O
HD	B-Application
Graphics	I-Application
2500	I-Application
,	O
but	O
does	O
not	O
support	O
the	O
following	O
technologies	O
:	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
,	O
InTru	O
3D	O
,	O
Clear	O
Video	O
HD	O
,	O
Wireless	O
Display	O
,	O
Intel	O
Insider	O
.	O
</s>
<s>
Embedded	O
models	O
have	O
support	O
for	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
2970M	O
supports	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
2957U	O
and	O
2981U	O
also	O
support	O
Intel	O
Wireless	O
Display	O
and	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
GPU	B-Architecture
supports	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Smart	O
Cache	O
.	O
</s>
<s>
GPU	B-Architecture
does	O
n't	O
support	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Ivy	B-Device
Bridge	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
4	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
11	O
,	O
OpenGL	O
4.0	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.1	O
.	O
</s>
<s>
N2807	O
,	O
N2808	O
,	O
N2830	O
,	O
N2840	O
,	O
N2930	O
and	O
N2940	O
support	O
Intel	B-Algorithm
Quick	I-Algorithm
Sync	I-Algorithm
Video	I-Algorithm
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Broadwell	B-General_Concept
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
11.2	O
,	O
OpenGL	O
4.3	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.2	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Skylake	B-Architecture
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
12	O
,	O
OpenGL	O
4.5	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.2	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
SGX	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Kaby	B-Device
Lake	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
12	O
,	O
OpenGL	O
4.5	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.2	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
SGX	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Kaby	B-Device
Lake	I-Device
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
12	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
DirectX	O
12	O
,	O
OpenGL	O
4.5	O
,	O
OpenGL	O
ES	O
3.0	O
and	O
OpenCL	O
1.2	O
(	O
on	O
Windows	O
)	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
SGX	O
,	O
MPX	B-Device
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
and	O
configurable	O
TDP	B-General_Concept
(	O
cTDP	O
)	O
down	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
.	O
</s>
<s>
Two	O
USB	B-Protocol
3.2	O
2x1	O
ports	O
(	O
a.k.a.	O
</s>
<s>
Four	O
USB	B-Protocol
3.2	O
1x1	O
ports	O
(	O
a.k.a.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Standard	O
power	B-General_Concept
models	O
also	O
support	O
up	O
to	O
DDR5-4800	O
or	O
DDR4-3200	O
memory	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
HyperThreading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
Enhanced	O
Intel	B-Device
SpeedStep	I-Device
Technology	O
(	O
EIST	B-Device
)	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
EPT	O
,	O
Hyper-threading	B-Operating_System
,	O
Smart	O
Cache	O
,	O
ECC	B-General_Concept
memory	I-General_Concept
.	O
</s>
<s>
All	O
models	O
support	O
:	O
MMX	B-Architecture
,	O
SSE	B-General_Concept
,	O
SSE2	B-General_Concept
,	O
SSE3	B-General_Concept
,	O
SSSE3	B-General_Concept
,	O
SSE4.1	O
,	O
SSE4.2	O
,	O
Intel	O
64	O
,	O
XD	B-General_Concept
bit	I-General_Concept
(	O
an	O
NX	B-General_Concept
bit	I-General_Concept
implementation	O
)	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
.	O
</s>
<s>
GPU	B-Architecture
is	O
based	O
on	O
Gen11	O
Intel	B-Application
HD	I-Application
Graphics	I-Application
,	O
with	O
up	O
to	O
32	O
execution	B-General_Concept
units	I-General_Concept
,	O
and	O
supports	O
up	O
to	O
3	O
displays	O
(	O
4K	O
@	O
60	O
Hz	O
)	O
through	O
HDMI	B-Protocol
,	O
DP	B-Protocol
,	O
eDP	O
,	O
or	O
DSI	O
.	O
</s>
<s>
SoC	B-Architecture
peripherals	O
include	O
4	O
×	O
USB	B-Protocol
2.0/3.0/3.1	O
,	O
2	O
×	O
SATA	O
,	O
3	O
×	O
2.5GbE	O
LAN	B-General_Concept
,	O
UART	O
,	O
and	O
up	O
to	O
8	O
lanes	O
of	O
PCI	O
Express	O
3.0	O
in	O
x4	O
,	O
x2	O
,	O
and	O
x1	O
configurations	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX2	O
,	O
AVX-512	B-General_Concept
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
Smart	O
Cache	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
Optane	B-Device
memory	I-Device
,	O
GNA	O
2.0	O
,	O
IPU6	B-General_Concept
,	O
TB4	O
.	O
</s>
<s>
All	O
models	O
support	O
:	O
SSE4.1	O
,	O
SSE4.2	O
,	O
AVX	B-General_Concept
,	O
AVX2	O
,	O
FMA3	B-General_Concept
,	O
Speed	B-Device
Shift	I-Device
Technology	I-Device
(	O
SST	O
)	O
,	O
Intel	O
64	O
,	O
Intel	O
VT-x	O
,	O
Intel	O
VT-d	O
,	O
AES-NI	B-Algorithm
,	O
IPU6	B-General_Concept
,	O
TB4	O
,	O
Smart	O
Cache	O
,	O
Thread	O
Director	O
,	O
DL	B-General_Concept
Boost	I-General_Concept
,	O
and	O
GNA	O
3.0	O
.	O
</s>
<s>
Standard	O
power	B-General_Concept
models	O
also	O
support	O
up	O
to	O
DDR5-4800	O
or	O
DDR4-3200	O
memory	O
.	O
</s>
<s>
Modelnumber	O
P-core	O
(	O
performance	O
)	O
E-core	O
(	O
efficiency	O
)	O
L3cache	O
GPUmodel	O
GPUfrequency	O
Power	B-General_Concept
Socket	B-General_Concept
I/O	O
bus	O
rowspan	O
=	O
2	O
style	O
=	O
"	O
text-align:right	O
;	O
"	O
Release	O
date	O
sSpecnumber	O
Partnumber(s )	O
Releaseprice	O
(	O
USD	O
)	O
Cores(threads )	O
Freq	O
.	O
</s>
