<s>
The	O
following	O
is	O
a	O
partial	O
list	B-Device
of	I-Device
Intel	I-Device
CPU	I-Device
microarchitectures	I-Device
.	O
</s>
<s>
Additional	O
details	O
can	O
be	O
found	O
in	O
Intel	O
's	O
Tick	B-Device
–	I-Device
tock	I-Device
model	I-Device
and	O
Process	B-Device
–	I-Device
architecture	I-Device
–	I-Device
optimization	I-Device
model	I-Device
.	O
</s>
<s>
+x86	O
microarchitectures	B-General_Concept
Year	O
Micro-architecture	B-General_Concept
Pipeline	B-General_Concept
stages	O
Maxclock(MHz )	O
Process	O
node	O
1978	O
8086	B-General_Concept
(	O
8086	B-General_Concept
,	O
8088	B-Device
)	O
2	O
5	O
3000	O
nm	O
1982	O
186	B-Device
(	O
80186	B-Device
,	O
80188	B-Device
)	O
2	O
25	O
1982	O
286	B-General_Concept
(	O
80286	B-General_Concept
)	O
3	O
25	O
1500	O
nm	O
1985	O
386	B-General_Concept
(	O
80386	B-General_Concept
)	O
6Rant	O
,	O
Jon	O
;	O
"	O
Extending	O
the	O
Legacy	O
of	O
Leadership	O
:	O
The	O
80386	B-General_Concept
Arrives	O
"	O
,	O
Intel	O
Corporation	O
,	O
Special	O
32-Bit	O
Issue	O
Solutions	O
,	O
November/December	O
1985	O
,	O
page	O
2	O
33	O
1989	O
486	B-General_Concept
(	O
80486	B-General_Concept
)	O
5	O
100	O
1000	B-Algorithm
nm	O
1993	O
P5	B-General_Concept
(	O
Pentium	B-General_Concept
)	O
5	O
200	O
800	B-Algorithm
,	O
600	B-Algorithm
,	O
350	O
nm	O
1995	O
P6	B-Device
(	O
Pentium	B-Device
Pro	I-Device
,	O
Pentium	B-General_Concept
II	I-General_Concept
)	O
14	B-Algorithm
(	O
17	O
with	O
load	O
&	O
store/retire	O
)	O
450	O
500	B-Algorithm
,	O
350	O
,	O
250	O
nm	O
1997	O
P5	B-General_Concept
(	O
Pentium	B-General_Concept
MMX	O
)	O
6	O
233	O
350	O
nm	O
1999	O
P6	B-Device
(	O
Pentium	B-General_Concept
III	I-General_Concept
)	O
12	O
(	O
15	O
with	O
load	O
&	O
store/retire	O
)	O
1400	O
250	O
,	O
180	B-Algorithm
,	O
130	B-Algorithm
nm	I-Algorithm
2000	O
NetBurst	B-Device
(	O
Pentium	B-General_Concept
4	O
)	O
(	O
Willamette	O
)	O
20	O
unified	O
with	O
branch	O
prediction	O
2000	O
180	B-Algorithm
nm2002NetBurst	O
(	O
Pentium	B-General_Concept
4	O
)	O
(	O
Northwood	O
,	O
Gallatin	O
)	O
3466130	O
nm	O
2003	O
Pentium	B-Architecture
M	I-Architecture
(	O
Banias	B-Architecture
,	O
Dothan	B-Architecture
)	O
Enhanced	O
Pentium	B-Architecture
M	I-Architecture
(	O
Yonah	B-Device
)	O
10	B-Algorithm
(	O
12	O
with	O
fetch/retire	O
)	O
2333130	O
,	O
90	O
,	O
65	B-Algorithm
nm	I-Algorithm
2004	O
NetBurst	B-Device
(	O
Pentium	B-General_Concept
4	O
,	O
Pentium	B-Device
D	I-Device
)	O
(	O
Prescott	O
)	O
31	O
unified	O
with	O
branch	O
prediction	O
3800	O
90	O
,	O
65	B-Algorithm
nm	I-Algorithm
2006	O
Intel	B-Device
Core	I-Device
12	O
(	O
14	B-Algorithm
with	O
fetch/retire	O
)	O
3000	O
65	B-Algorithm
nm	I-Algorithm
2007	O
Penryn	B-Device
(	O
die	O
shrink	O
)	O
3333	O
45	B-Algorithm
nm	I-Algorithm
2008	O
Nehalem	B-Device
20	O
unified	O
(	O
14	B-Algorithm
without	O
miss	O
prediction	O
)	O
3600	O
Bonnell	B-Device
16	O
(	O
20	O
with	O
prediction	O
miss	O
)	O
2100	O
2010	O
Westmere	B-Device
(	O
die	O
shrink	O
)	O
20	O
unified	O
(	O
14	B-Algorithm
without	O
miss	O
prediction	O
)	O
3866	O
32	B-Algorithm
nm	I-Algorithm
2011	O
Saltwell	O
(	O
die	O
shrink	O
)	O
16	O
(	O
20	O
with	O
prediction	O
miss	O
)	O
2130	O
Sandy	B-Device
Bridge	I-Device
14	B-Algorithm
(	O
16	O
with	O
fetch/retire	O
)	O
4000	O
2012	O
Ivy	B-Device
Bridge	I-Device
(	O
die	O
shrink	O
)	O
4100	O
22	B-Algorithm
nm	I-Algorithm
2013	O
Silvermont	B-Device
14	B-Algorithm
–	O
17	O
(	O
16	O
–	O
19	O
with	O
fetch/retire	O
)	O
2670	O
Haswell	B-Device
14	B-Algorithm
(	O
16	O
with	O
fetch/retire	O
)	O
4400	O
2014	O
Broadwell	B-General_Concept
(	O
die	O
shrink	O
)	O
3700	O
14	B-Algorithm
nm	I-Algorithm
2015	O
Airmont	B-Device
(	O
die	O
shrink	O
)	O
14	B-Algorithm
–	O
17	O
(	O
16	O
–	O
19	O
with	O
fetch/retire	O
)	O
2640	O
Skylake	B-Architecture
14	B-Algorithm
(	O
16	O
with	O
fetch/retire	O
)	O
5200	O
2016	O
Goldmont	B-Device
20	O
unified	O
with	O
branch	O
prediction	O
2600	O
2017	O
Goldmont	B-Device
Plus	I-Device
20	O
unified	O
with	O
branch	O
prediction	O
(	O
?	O
)	O
</s>
<s>
8086	B-General_Concept
first	O
x86	B-Operating_System
processor	O
;	O
initially	O
a	O
temporary	O
substitute	O
for	O
the	O
iAPX	B-Device
432	I-Device
to	O
compete	O
with	O
Motorola	O
,	O
Zilog	O
,	O
and	O
National	O
Semiconductor	O
and	O
to	O
top	O
the	O
successful	O
Z80	B-General_Concept
.	O
</s>
<s>
8088	B-Device
version	O
,	O
with	O
an	O
8-bit	O
bus	O
,	O
used	O
in	O
the	O
original	O
IBM	B-Device
Personal	I-Device
Computer	I-Device
.	O
</s>
<s>
186	B-Device
included	O
a	O
DMA	B-General_Concept
controller	I-General_Concept
,	O
interrupt	O
controller	O
,	O
timers	O
,	O
and	O
chip	B-Architecture
select	I-Architecture
logic	O
.	O
</s>
<s>
The	O
80188	B-Device
was	O
a	O
version	O
with	O
an	O
8-bit	O
bus	O
.	O
</s>
<s>
286	B-General_Concept
first	O
x86	B-Operating_System
processor	O
with	O
protected	B-Application
mode	I-Application
including	O
segmentation	O
based	O
virtual	O
memory	O
management	O
.	O
</s>
<s>
Performance	O
improved	O
by	O
a	O
factor	O
of	O
3	O
to	O
4	O
over	O
8086	B-General_Concept
.	O
</s>
<s>
Included	O
instructions	O
relating	O
to	O
protected	B-Application
mode	I-Application
.	O
</s>
<s>
i386	B-General_Concept
first	O
32-bit	B-Device
x86	I-Device
processor	O
.	O
</s>
<s>
i486	B-General_Concept
Intel	O
's	O
second	O
generation	O
of	O
32-bit	B-Device
x86	I-Device
processors	O
,	O
introduced	O
built-in	O
floating	O
point	O
unit	O
(	O
FPU	O
)	O
,	O
8KB	O
on-chip	O
L1	O
cache	O
,	O
and	O
pipelining	O
.	O
</s>
<s>
Faster	O
per	O
MHz	O
than	O
the	O
386	B-General_Concept
.	O
</s>
<s>
P5	B-General_Concept
original	B-General_Concept
Pentium	I-General_Concept
microprocessors	O
,	O
first	O
x86	B-Operating_System
processor	O
with	O
super-scalar	B-General_Concept
architecture	I-General_Concept
and	O
branch	O
prediction	O
.	O
</s>
<s>
P6	B-Device
used	O
in	O
Pentium	B-Device
Pro	I-Device
,	O
Pentium	B-General_Concept
II	I-General_Concept
,	O
Pentium	B-General_Concept
II	I-General_Concept
Xeon	B-Device
,	O
Pentium	B-General_Concept
III	I-General_Concept
,	O
and	O
Pentium	B-General_Concept
III	I-General_Concept
Xeon	B-Device
microprocessors	O
.	O
</s>
<s>
First	O
x86	B-Operating_System
processor	O
to	O
support	O
SIMD	B-Device
instruction	O
with	O
XMM	O
register	O
implemented	O
,	O
RISC	O
μop	B-General_Concept
decode	O
scheme	O
,	O
integrated	O
register	O
renaming	O
and	O
out-of-order	B-General_Concept
execution	I-General_Concept
.	O
</s>
<s>
Added	O
36-bit	O
physical	O
memory	O
addressing	O
,	O
"	O
Physical	B-General_Concept
Address	I-General_Concept
Extension	I-General_Concept
(	O
PAE	O
)	O
"	O
.	O
</s>
<s>
Pentium	B-Architecture
M	I-Architecture
:	O
updated	O
version	O
of	O
Pentium	B-General_Concept
III	I-General_Concept
's	O
P6	B-Device
microarchitecture	I-Device
designed	O
from	O
the	O
ground	O
up	O
for	O
mobile	O
computing	O
and	O
first	O
x86	B-Operating_System
to	O
support	O
micro-op	B-General_Concept
fusion	O
and	O
smart	O
cache	O
.	O
</s>
<s>
Enhanced	O
Pentium	B-Architecture
M	I-Architecture
:	O
updated	O
,	O
dual	B-Architecture
core	I-Architecture
version	O
of	O
the	O
Pentium	B-Architecture
M	I-Architecture
microarchitecture	B-General_Concept
used	O
in	O
the	O
first	O
Intel	B-Device
Core	I-Device
microprocessors	O
,	O
first	O
x86	B-Operating_System
to	O
have	O
shadow	B-General_Concept
register	I-General_Concept
architecture	I-General_Concept
and	O
speed	B-Device
step	I-Device
technology	O
.	O
</s>
<s>
NetBurstcommonly	O
referred	O
to	O
as	O
P7	O
although	O
its	O
internal	O
name	O
was	O
P68	O
(	O
P7	O
was	O
used	O
for	O
Itanium	B-General_Concept
)	O
.	O
</s>
<s>
Used	O
in	O
Pentium	B-General_Concept
4	I-General_Concept
,	O
Pentium	B-Device
D	I-Device
,	O
and	O
some	O
Xeon	B-Device
microprocessors	O
.	O
</s>
<s>
Very	O
long	O
pipeline	B-General_Concept
.	O
</s>
<s>
Later	O
revisions	O
were	O
the	O
first	O
to	O
feature	O
Intel	O
's	O
x86-64	B-Device
architecture	O
,	O
enhanced	O
branch	O
prediction	O
and	O
trace	O
cache	O
,	O
and	O
eventually	O
support	O
was	O
added	O
for	O
the	O
NX	O
(	O
No	B-General_Concept
eXecute	I-General_Concept
)	O
bit	O
to	O
implement	O
executable-space	O
protection	O
.	O
</s>
<s>
Core	B-Device
reengineered	O
P6-based	O
microarchitecture	B-General_Concept
used	O
in	O
Intel	B-Device
Core	I-Device
2	I-Device
and	O
Xeon	B-Device
microprocessors	O
,	O
built	O
on	O
a	O
65nm	B-Algorithm
process	I-Algorithm
,	O
supporting	O
x86-64	B-Device
level	O
SSE	O
instruction	O
and	O
macro-op	O
fusion	O
and	O
enhanced	O
micro-op	B-General_Concept
fusion	O
with	O
a	O
wider	O
front	O
end	O
and	O
decoder	O
,	O
larger	O
out-of-order	O
core	B-Device
and	O
renamed	O
register	O
,	O
support	O
loop	O
stream	O
detector	O
and	O
large	O
shadow	O
register	B-General_Concept
file	I-General_Concept
.	O
</s>
<s>
Penryn	B-Device
:	O
45nm	B-Algorithm
shrink	O
of	O
the	O
Core	B-Device
microarchitecture	I-Device
with	O
larger	O
cache	O
,	O
higher	O
FSB	B-Architecture
and	O
clock	O
speeds	O
,	O
SSE4.1	B-General_Concept
instructions	O
,	O
support	O
for	O
XOP	O
and	O
F/SAVE	O
and	O
F/STORE	O
instructions	O
,	O
enhanced	O
register	O
alias	O
table	O
and	O
larger	O
integer	O
register	B-General_Concept
file	I-General_Concept
.	O
</s>
<s>
Nehalem	B-Device
released	O
November	O
17	O
,	O
2008	O
,	O
built	O
on	O
a	O
45nm	B-Algorithm
process	O
and	O
used	O
in	O
the	O
Core	B-Device
i7	O
,	O
Core	B-Device
i5	O
,	O
Core	B-Device
i3	O
microprocessors	O
.	O
</s>
<s>
Incorporates	O
the	O
memory	O
controller	O
into	O
the	O
CPU	B-Device
die	O
.	O
</s>
<s>
Added	O
important	O
powerful	O
new	O
instructions	O
,	O
SSE4.2	B-General_Concept
.	O
</s>
<s>
Westmere	B-Device
:	O
32nm	B-Algorithm
shrink	O
of	O
the	O
Nehalem	B-Device
microarchitecture	I-Device
with	O
several	O
new	O
features	O
.	O
</s>
<s>
Sandy	O
Bridge32nm	O
microarchitecture	B-General_Concept
,	O
released	O
January	O
9	O
,	O
2011	O
.	O
</s>
<s>
Formerly	O
called	O
Gesher	B-Device
but	O
renamed	O
in	O
2007	O
.	O
</s>
<s>
First	O
x86	B-Operating_System
to	O
introduce	O
256bit	O
AVX	B-General_Concept
instruction	O
set	O
and	O
implementation	O
of	O
YMM	O
registers	O
.	O
</s>
<s>
Ivy	B-Device
Bridge	I-Device
:	O
successor	O
to	O
Sandy	B-Device
Bridge	I-Device
,	O
using	O
22nm	B-Algorithm
process	O
,	O
released	O
in	O
April	O
2012	O
.	O
</s>
<s>
Haswell	B-Device
22nm	B-Algorithm
microarchitecture	B-General_Concept
,	O
released	O
June	O
3	O
,	O
2013	O
.	O
</s>
<s>
Added	O
a	O
number	O
of	O
new	O
instructions	O
,	O
including	O
AVX2	O
and	O
FMA	B-General_Concept
.	O
</s>
<s>
Broadwell	B-General_Concept
:	O
14nm	B-Algorithm
derivative	O
of	O
the	O
Haswell	B-Device
microarchitecture	I-Device
,	O
released	O
in	O
September	O
2014	O
.	O
</s>
<s>
Formerly	O
called	O
Rockwell	B-General_Concept
.	O
</s>
<s>
Skylake14nm	O
microarchitecture	B-General_Concept
,	O
released	O
August	O
5	O
,	O
2015	O
.	O
</s>
<s>
Kaby	B-Device
Lake	I-Device
:	O
successor	O
to	O
Skylake	B-Architecture
,	O
released	O
in	O
August	O
2016	O
,	O
broke	O
Intel	O
's	O
Tick-Tock	B-Device
schedule	I-Device
due	O
to	O
delays	O
with	O
the	O
10nm	B-Algorithm
process	O
.	O
</s>
<s>
Skylake-X	B-Architecture
:	O
high-end	O
desktop	O
,	O
workstation	O
and	O
server	O
microarchitecture	B-General_Concept
,	O
released	O
on	O
June	O
19	O
,	O
2017	O
(	O
HEDT	O
)	O
,	O
July	O
11	O
,	O
2017	O
(	O
SP	O
)	O
and	O
August	O
29	O
,	O
2017	O
(	O
W	O
)	O
.	O
</s>
<s>
Introduces	O
support	O
for	O
AVX-512	B-General_Concept
instruction	O
set	O
.	O
</s>
<s>
Palm	B-Device
Cove	I-Device
After	O
releasing	O
the	O
Palm	B-Device
Cove	I-Device
core	B-Device
,	O
Intel	O
has	O
changed	O
their	O
microarchitecture	B-General_Concept
naming	O
scheme	O
,	O
decoupling	O
the	O
CPU	B-Architecture
cores	I-Architecture
from	O
their	O
manufacturing	O
nodes.Successor	O
to	O
Skylake	B-Architecture
(	O
canceled	O
)	O
,	O
includes	O
the	O
AVX-512	B-General_Concept
instruction	O
set	O
.	O
</s>
<s>
Cannon	B-Device
Lake	I-Device
:	O
mobile-only	O
successor	O
of	O
Kaby	B-Device
Lake	I-Device
,	O
using	O
Intel	O
's	O
10nm	B-Algorithm
process	O
,	O
first	O
and	O
only	O
microarchitecture	B-General_Concept
to	O
implement	O
the	O
Palm	B-Device
Cove	I-Device
core	B-Device
,	O
released	O
in	O
May	O
2018	O
.	O
</s>
<s>
Formerly	O
called	O
Skymont	B-Device
,	O
discontinued	O
in	O
December	O
2019	O
.	O
</s>
<s>
Sunny	O
CoveSuccessor	O
to	O
the	O
Palm	B-Device
Cove	I-Device
core	B-Device
,	O
first	O
non-Atom	O
core	B-Device
to	O
include	O
hardware	O
acceleration	O
for	O
SHA	O
hashing	O
algorithms	O
.	O
</s>
<s>
Sunny	B-Device
Cove	I-Device
is	O
used	O
in	O
the	O
singular	O
performance	O
core	B-Device
(	O
P-core	O
)	O
of	O
Lakefield	O
processors	O
.	O
</s>
<s>
AVX	B-General_Concept
and	O
more	O
advanced	O
instruction	O
sets	O
are	O
disabled	O
due	O
to	O
the	O
E-core	O
not	O
supporting	O
them	O
.	O
</s>
<s>
Willow	O
CoveSuccessor	O
to	O
the	O
Sunny	B-Device
Cove	I-Device
core	B-Device
,	O
includes	O
new	O
security	O
features	O
and	O
redesigns	O
the	O
cache	O
subsystem	O
.	O
</s>
<s>
Golden	O
CoveSuccessor	O
to	O
the	O
Willow	B-Device
Cove	I-Device
core	B-Device
,	O
includes	O
improvements	O
to	O
performance	O
and	O
power	O
efficiency	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
:	O
hybrid	O
processor	O
,	O
succeeds	O
Rocket	B-Device
Lake	I-Device
and	O
Tiger	B-Device
Lake	I-Device
;	O
uses	O
Intel7	O
process	O
(	O
previously	O
known	O
as	O
10ESF	O
)	O
,	O
released	O
on	O
November	O
4	O
,	O
2021	O
.	O
</s>
<s>
Golden	B-Device
Cove	I-Device
is	O
used	O
in	O
P-cores	O
of	O
Alder	B-Device
Lake	I-Device
processors	O
.	O
</s>
<s>
Sapphire	B-Device
Rapids	I-Device
:	O
server	O
and	O
workstation-only	O
,	O
successor	O
to	O
Ice	O
Lake-SP	O
,	O
manufactured	O
on	O
Intel7	O
process	O
,	O
released	O
on	O
January	O
10	B-Algorithm
,	O
2023	O
.	O
</s>
<s>
Introduces	O
AMX	B-General_Concept
.	O
</s>
<s>
Raptor	O
CoveA	O
refresh	O
of	O
Golden	B-Device
Cove	I-Device
with	O
increased	O
L2	O
and	O
L3	O
caches	O
and	O
core	B-Device
clocks	O
.	O
</s>
<s>
Raptor	B-Device
Lake	I-Device
:	O
successor	O
to	O
Alder	B-Device
Lake	I-Device
with	O
increased	O
cache	O
sizes	O
,	O
core	B-Device
clocks	O
and	O
the	O
number	O
of	O
E-cores	O
,	O
released	O
on	O
October	O
20	O
,	O
2022	O
.	O
</s>
<s>
Raptor	O
Cove	O
is	O
used	O
in	O
the	O
P-cores	O
while	O
the	O
E-cores	O
are	O
still	O
implemented	O
using	O
Gracemont	B-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
45nm	B-Algorithm
,	O
low-power	O
,	O
in-order	O
microarchitecture	B-General_Concept
for	O
use	O
in	O
Atom	B-Device
processors	I-Device
.	O
</s>
<s>
Saltwell	O
:	O
32nm	B-Algorithm
shrink	O
of	O
the	O
Bonnell	B-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
22nm	B-Algorithm
,	O
out-of-order	O
microarchitecture	B-General_Concept
for	O
use	O
in	O
Atom	B-Device
processors	I-Device
,	O
released	O
on	O
May	O
6	O
,	O
2013	O
.	O
</s>
<s>
Airmont	B-Device
:	O
14nm	B-Algorithm
shrink	O
of	O
the	O
Silvermont	B-Device
microarchitecture	B-General_Concept
.	O
</s>
<s>
14nm	B-Algorithm
Atom	B-Application
microarchitecture	B-General_Concept
iteration	O
after	O
Silvermont	B-Device
but	O
borrows	O
heavily	O
from	O
Skylake	B-Architecture
processors	O
(	O
e.g.	O
,	O
GPU	O
)	O
,	O
released	O
in	O
April	O
2016	O
.	O
</s>
<s>
Goldmont	B-Device
Plus	I-Device
:	O
successor	O
to	O
Goldmont	B-Device
microarchitecture	B-General_Concept
,	O
still	O
based	O
on	O
the	O
14nm	B-Algorithm
process	O
,	O
released	O
on	O
December	O
11	O
,	O
2017	O
.	O
</s>
<s>
Tremont10nm	O
Atom	B-Application
microarchitecture	B-General_Concept
iteration	O
after	O
Goldmont	B-Device
Plus	I-Device
.	O
</s>
<s>
Tremont	B-Device
is	O
used	O
in	O
efficiency	O
cores	O
(	O
E-cores	O
)	O
of	O
Lakefield	O
processors	O
.	O
</s>
<s>
Jasper	O
Lake	O
:	O
Celeron	O
and	O
Pentium	B-General_Concept
Silver	O
desktop	O
and	O
mobile	O
processors	O
,	O
released	O
in	O
Q1	O
2021	O
.	O
</s>
<s>
Elkhart	O
Lake	O
:	O
embedded	O
processors	O
targeted	O
at	O
IoT	B-Operating_System
,	O
released	O
in	O
Q1	O
2021	O
.	O
</s>
<s>
Intel7	O
process	O
Atom	B-Application
microarchitecture	B-General_Concept
iteration	O
after	O
Tremont	B-Device
.	O
</s>
<s>
First	O
Atom	B-Application
class	O
core	B-Device
with	O
AVX	B-General_Concept
and	O
AVX2	O
support	O
.	O
</s>
<s>
Alder	B-Device
Lake	I-Device
:	O
hybrid	O
processor	O
,	O
succeeds	O
Rocket	B-Device
Lake	I-Device
and	O
Tiger	B-Device
Lake	I-Device
,	O
released	O
on	O
November	O
4	O
,	O
2021	O
.	O
</s>
<s>
Gracemont	B-Device
is	O
used	O
in	O
E-cores	O
of	O
Alder	B-Device
Lake	I-Device
processors	O
.	O
</s>
<s>
Raptor	B-Device
Lake	I-Device
:	O
a	O
refresh	O
of	O
Alder	B-Device
Lake	I-Device
,	O
released	O
on	O
October	O
20	O
,	O
2022	O
.	O
</s>
<s>
Merced	O
original	O
Itanium	B-General_Concept
microarchitecture	B-General_Concept
.	O
</s>
<s>
Used	O
only	O
in	O
the	O
first	O
Itanium	B-General_Concept
microprocessors	I-General_Concept
.	O
</s>
<s>
McKinley	O
enhanced	O
microarchitecture	B-General_Concept
used	O
in	O
the	O
first	O
two	O
generations	O
of	O
the	O
Itanium	B-General_Concept
2	O
microprocessor	O
.	O
</s>
<s>
Madison	O
is	O
the	O
130nm	B-Algorithm
version	O
.	O
</s>
<s>
Montecito	B-Device
enhanced	O
McKinley	O
microarchitecture	B-General_Concept
used	O
in	O
the	O
Itanium	B-General_Concept
2	O
9000	O
-	O
and	O
9100-series	O
of	O
processors	O
.	O
</s>
<s>
Added	O
dual	B-Architecture
core	I-Architecture
,	O
coarse	O
multithreading	O
,	O
and	O
other	O
improvements	O
.	O
</s>
<s>
The	O
Montvale	B-General_Concept
update	O
added	O
demand-based	O
switching	O
(	O
SpeedStep	B-Device
)	O
and	O
core-level	O
lockstep	B-General_Concept
execution	O
.	O
</s>
<s>
Tukwila	B-General_Concept
enhanced	O
microarchitecture	B-General_Concept
used	O
in	O
the	O
Itanium	B-General_Concept
9300	I-General_Concept
series	O
of	O
processors	O
.	O
</s>
<s>
Added	O
quad	B-Architecture
core	I-Architecture
,	O
an	O
integrated	O
memory	O
controller	O
,	O
QuickPath	O
Interconnect	O
,	O
and	O
other	O
improvements	O
e.g.	O
</s>
<s>
Poulson	O
Itanium	B-General_Concept
processor	O
featuring	O
an	O
all-new	O
microarchitecture	B-General_Concept
.	O
</s>
<s>
8	O
cores	O
,	O
decoupling	O
in	O
pipeline	B-General_Concept
and	O
in	O
multithreading	O
.	O
</s>
<s>
12-wide	O
issue	O
with	O
partial	O
out-of-order	B-General_Concept
execution	I-General_Concept
.	O
</s>
<s>
Kittson	O
the	O
last	O
Itanium	B-General_Concept
.	O
</s>
<s>
It	O
has	O
the	O
same	O
microarchitecture	B-General_Concept
as	O
Poulson	O
,	O
but	O
slightly	O
higher	O
clock	O
speed	O
for	O
the	O
top	O
two	O
models	O
.	O
</s>
<s>
a	O
microarchitecture	B-General_Concept
implementing	O
the	O
ARM	B-Architecture
architecture	I-Architecture
instruction	O
set	O
.	O
</s>
<s>
multi-core	B-Architecture
in-order	O
x86-64	B-Device
updated	O
version	O
of	O
P5	B-General_Concept
microarchitecture	B-General_Concept
,	O
with	O
wide	O
SIMD	B-Device
vector	O
units	O
and	O
texture	O
sampling	O
hardware	O
for	O
use	O
in	O
graphics	O
.	O
</s>
<s>
Cores	O
derived	O
from	O
this	O
microarchitecture	B-General_Concept
are	O
called	O
MIC	B-General_Concept
(	O
Many	B-General_Concept
Integrated	I-General_Concept
Core	I-General_Concept
)	O
.	O
</s>
