<s>
LEON	B-General_Concept
(	O
from	O
meaning	O
lion	B-Algorithm
)	O
is	O
a	O
radiation-tolerant	O
32-bit	O
central	B-General_Concept
processing	I-General_Concept
unit	I-General_Concept
(	O
CPU	O
)	O
microprocessor	B-Architecture
core	O
that	O
implements	O
the	O
SPARC	B-Architecture
V8	I-Architecture
instruction	B-General_Concept
set	I-General_Concept
architecture	I-General_Concept
(	O
ISA	O
)	O
developed	O
by	O
Sun	O
Microsystems	O
.	O
</s>
<s>
It	O
is	O
described	O
in	O
synthesizable	O
VHSIC	B-Language
Hardware	I-Language
Description	I-Language
Language	I-Language
(	O
VHDL	B-Language
)	O
.	O
</s>
<s>
LEON	B-General_Concept
has	O
a	O
dual	O
license	O
model	O
:	O
An	O
GNU	B-Application
Lesser	I-Application
General	I-Application
Public	I-Application
License	I-Application
(	O
LGPL	B-Application
)	O
and	O
GNU	B-License
General	I-License
Public	I-License
License	I-License
(	O
GPL	B-License
)	O
free	B-License
and	I-License
open-source	I-License
software	I-License
(	O
FOSS	B-License
)	O
license	O
that	O
can	O
be	O
used	O
without	O
licensing	O
fee	O
,	O
or	O
a	O
proprietary	O
license	O
that	O
can	O
be	O
purchased	O
for	O
integration	O
in	O
a	O
proprietary	O
product	O
.	O
</s>
<s>
The	O
core	O
is	O
configurable	O
through	O
VHDL	B-Language
generics	O
,	O
and	O
is	O
used	O
in	O
system	B-Architecture
on	I-Architecture
a	I-Architecture
chip	I-Architecture
(	O
SOC	B-Architecture
)	O
designs	O
both	O
in	O
research	O
and	O
commercial	O
settings	O
.	O
</s>
<s>
The	O
LEON	B-General_Concept
project	O
was	O
begun	O
by	O
the	O
European	O
Space	O
Agency	O
(	O
ESA	O
)	O
in	O
late	O
1997	O
to	O
study	O
and	O
develop	O
a	O
high-performance	O
processor	O
to	O
be	O
used	O
in	O
European	O
space	O
projects	O
.	O
</s>
<s>
The	O
LEON	B-General_Concept
family	O
includes	O
the	O
first	O
LEON1	O
VHSIC	B-Language
Hardware	I-Language
Description	I-Language
Language	I-Language
(	O
VHDL	B-Language
)	O
design	O
that	O
was	O
used	O
in	O
the	O
LEONExpress	O
test	O
chip	O
developed	O
in	O
0.25	O
μm	O
technology	O
to	O
prove	O
the	O
fault-tolerance	B-General_Concept
concept	O
.	O
</s>
<s>
The	O
second	O
LEON2	B-General_Concept
VHDL	B-Language
design	O
was	O
used	O
in	O
the	O
processor	O
device	O
AT697	O
from	O
Atmel	O
(	O
F	O
)	O
and	O
various	O
system-on-chip	B-Architecture
devices	O
.	O
</s>
<s>
These	O
two	O
LEON	B-General_Concept
implementations	O
were	O
developed	O
by	O
ESA	O
.	O
</s>
<s>
Gaisler	O
Research	O
,	O
now	O
part	O
of	O
Cobham	O
(	O
and	O
previously	O
Aeroflex	O
Gaisler	O
)	O
,	O
developed	O
the	O
third	O
LEON3	O
design	O
and	O
has	O
announced	O
the	O
availability	O
of	O
the	O
fourth	O
generation	O
LEON	B-General_Concept
,	O
the	O
LEON4	O
processor	O
.	O
</s>
<s>
A	O
LEON	B-General_Concept
processor	O
can	O
be	O
implemented	O
in	O
programmable	O
logic	O
such	O
as	O
a	O
field-programmable	B-Architecture
gate	I-Architecture
array	I-Architecture
(	O
FPGA	B-Architecture
)	O
or	O
manufactured	O
into	O
an	O
application-specific	O
integrated	O
circuit	O
(	O
ASIC	O
)	O
.	O
</s>
<s>
This	O
section	O
and	O
the	O
subsequent	O
subsections	O
focus	O
on	O
the	O
LEON	B-General_Concept
processors	O
as	O
soft	O
IP	B-Architecture
cores	I-Architecture
and	O
summarise	O
the	O
main	O
features	O
of	O
each	O
processor	O
version	O
and	O
the	O
infrastructure	O
with	O
which	O
the	O
processor	O
is	O
packaged	O
,	O
referred	O
to	O
as	O
a	O
LEON	B-General_Concept
distribution	O
.	O
</s>
<s>
All	O
processors	O
in	O
the	O
LEON	B-General_Concept
series	O
use	O
the	O
SPARC	B-Architecture
V8	I-Architecture
reduced	B-Architecture
instruction	I-Architecture
set	I-Architecture
computer	I-Architecture
(	O
RISC	B-Architecture
)	O
ISA	O
.	O
</s>
<s>
LEON2(-FT )	O
has	O
a	O
five-stage	O
pipeline	B-General_Concept
while	O
later	O
versions	O
have	O
a	O
seven-stage	O
pipeline	B-General_Concept
.	O
</s>
<s>
LEON2	B-General_Concept
and	O
LEON2-FT	B-General_Concept
are	O
distributed	O
as	O
a	O
system-on-chip	B-Architecture
design	O
that	O
can	O
be	O
modified	O
using	O
a	O
graphical	O
configuration	O
tool	O
.	O
</s>
<s>
While	O
the	O
LEON2(-FT )	O
design	O
can	O
be	O
extended	O
and	O
re-used	O
in	O
other	O
designs	O
,	O
its	O
structure	O
does	O
not	O
emphasise	O
re-using	O
parts	O
of	O
the	O
design	O
as	O
building	O
blocks	O
or	O
enable	O
designers	O
to	O
easily	O
incorporate	O
new	O
IP	B-Architecture
cores	I-Architecture
in	O
the	O
design	O
.	O
</s>
<s>
The	O
standard	O
LEON2(-FT )	O
distribution	O
includes	O
the	O
following	O
support	O
cores	O
:	O
</s>
<s>
Memory	B-General_Concept
controller	I-General_Concept
.	O
</s>
<s>
While	O
the	O
LEON2	B-General_Concept
distributions	O
contain	O
one	O
design	O
that	O
can	O
be	O
used	O
on	O
several	O
target	O
technologies	O
,	O
GRLIB	O
contains	O
several	O
template	O
designs	O
,	O
both	O
for	O
FPGA	B-Architecture
development	O
boards	O
and	O
for	O
ASIC	O
targets	O
that	O
can	O
be	O
modified	O
using	O
a	O
graphical	O
configuration	O
tool	O
similar	O
to	O
the	O
one	O
in	O
the	O
LEON2	B-General_Concept
distribution	O
.	O
</s>
<s>
The	O
LEON/GRLIB	O
package	O
contains	O
a	O
larger	O
number	O
of	O
cores	O
compared	O
to	O
the	O
LEON2	B-General_Concept
distributions	O
and	O
also	O
include	O
a	O
plug	B-Device
and	I-Device
play	I-Device
(	O
PnP	O
)	O
extension	O
to	O
the	O
on-chip	O
Advanced	B-Architecture
Microcontroller	I-Architecture
Bus	I-Architecture
Architecture	I-Architecture
(	O
AMBA	B-Architecture
)	O
bus	O
.	O
</s>
<s>
IP	B-Architecture
cores	I-Architecture
available	O
in	O
GRLIB	O
also	O
include	O
:	O
</s>
<s>
Design	O
flow	O
documentation	O
for	O
the	O
LEON	B-General_Concept
into	O
FPGA	B-Architecture
are	O
available	O
from	O
the	O
manufacturer	O
and	O
from	O
third	O
party	O
resources	O
.	O
</s>
<s>
The	O
term	O
LEON2/LEON2	O
-FT	O
often	O
refer	O
to	O
the	O
LEON2	B-General_Concept
system-on-chip	B-Architecture
design	O
,	O
which	O
is	O
the	O
LEON2	B-General_Concept
processor	O
core	O
together	O
with	O
the	O
standard	O
set	O
of	O
peripherals	O
available	O
in	O
the	O
LEON2(-FT )	O
distribution	O
.	O
</s>
<s>
Later	O
processors	O
in	O
the	O
LEON	B-General_Concept
series	O
are	O
used	O
in	O
a	O
wide	O
range	O
of	O
designs	O
and	O
are	O
therefore	O
not	O
as	O
tightly	O
coupled	O
with	O
a	O
standard	O
set	O
of	O
peripherals	O
.	O
</s>
<s>
With	O
LEON3	O
and	O
LEON4	O
the	O
name	O
typically	O
refers	O
to	O
only	O
the	O
processor	O
core	O
,	O
while	O
LEON/GRLIB	O
is	O
used	O
to	O
refer	O
to	O
the	O
complete	O
system-on-chip	B-Architecture
design	O
.	O
</s>
<s>
LEON2	B-General_Concept
has	O
the	O
following	O
characteristics	O
:	O
</s>
<s>
The	O
GNU	B-Application
LGPL	I-Application
allows	O
a	O
high	O
degree	O
of	O
freedom	O
of	O
intervention	O
on	O
the	O
freely	O
available	O
source	O
code	O
.	O
</s>
<s>
Configurability	O
is	O
a	O
key	O
feature	O
of	O
the	O
project	O
,	O
and	O
is	O
achieved	O
through	O
the	O
usage	O
of	O
VHDL	B-Language
generics	O
.	O
</s>
<s>
The	O
LEON2-FT	B-General_Concept
processor	O
is	O
the	O
single-event	O
upset	O
fault	B-General_Concept
tolerant	I-General_Concept
(	O
FT	O
)	O
version	O
of	O
the	O
LEON2	B-General_Concept
processor	O
.	O
</s>
<s>
Flip-flops	O
are	O
protected	O
by	O
triple	B-Error_Name
modular	I-Error_Name
redundancy	I-Error_Name
and	O
all	O
internal	O
and	O
external	O
memories	O
are	O
protected	O
by	O
EDAC	O
or	O
parity	B-Error_Name
bits	I-Error_Name
.	O
</s>
<s>
The	O
LEON3	O
is	O
a	O
synthesisable	O
VHDL	B-Language
model	O
of	O
a	O
32-bit	O
processor	O
compliant	O
with	O
the	O
SPARC	B-Architecture
V8	I-Architecture
architecture	O
.	O
</s>
<s>
The	O
model	O
is	O
highly	O
configurable	O
,	O
and	O
particularly	O
suitable	O
for	O
system-on-a-chip	B-Architecture
(	O
SoC	B-Architecture
)	O
designs	O
.	O
</s>
<s>
The	O
full	O
source	O
code	O
is	O
available	O
under	O
the	O
GNU	B-License
GPL	I-License
license	I-License
,	O
allowing	O
use	O
for	O
any	O
purpose	O
without	O
licensing	O
fee	O
.	O
</s>
<s>
There	O
are	O
several	O
differences	O
between	O
the	O
two	O
LEON2	B-General_Concept
processor	O
models	O
and	O
the	O
LEON3	O
.	O
</s>
<s>
LEON3	O
includes	O
SMP	B-Operating_System
support	O
and	O
a	O
seven-stage	O
pipeline	B-General_Concept
,	O
while	O
LEON2	B-General_Concept
does	O
not	O
support	O
SMP	B-Operating_System
and	O
has	O
a	O
five-stage	O
pipeline	B-General_Concept
.	O
</s>
<s>
The	O
LEON3FT	O
is	O
a	O
fault-tolerant	B-General_Concept
version	O
of	O
the	O
standard	O
LEON3	O
SPARC	B-Architecture
V8	I-Architecture
Processor	O
.	O
</s>
<s>
An	O
FPGA	B-Architecture
implementation	O
called	O
LEON3FT-RTAX	O
is	O
proposed	O
for	O
critical	O
space	O
applications	O
.	O
</s>
<s>
In	O
January	O
2010	O
,	O
the	O
fourth	O
version	O
of	O
the	O
LEON	B-General_Concept
processor	O
was	O
released	O
.	O
</s>
<s>
The	O
Real-time	B-Operating_System
operating	I-Operating_System
systems	I-Operating_System
that	O
support	O
the	O
LEON	B-General_Concept
core	O
are	O
currently	O
RTLinux	B-Application
,	O
PikeOS	B-Operating_System
,	O
eCos	B-Operating_System
,	O
RTEMS	B-Operating_System
,	O
Nucleus	O
,	O
ThreadX	B-Operating_System
,	O
OpenComRTOS	B-Operating_System
,	O
VxWorks	B-Operating_System
(	O
a	O
port	O
by	O
Gaisler	O
Research	O
)	O
,	O
LynxOS	B-Operating_System
(	O
also	O
a	O
port	O
by	O
Gaisler	O
Research	O
)	O
,	O
POK	O
(	O
a	O
free	O
ARINC653	O
implementation	O
released	O
under	O
the	O
BSD	O
licence	O
)	O
and	O
ORK+	O
,	O
an	O
open-source	O
real-time	O
kernel	O
for	O
high-integrity	O
real-time	O
applications	O
with	O
the	O
Ravenscar	B-Language
Profile	I-Language
,	O
Embox	O
an	O
open-source	O
configurable	O
real-time	B-Operating_System
OS	I-Operating_System
which	O
allows	O
using	O
Linux	O
software	O
without	O
Linux	O
.	O
</s>
