<s>
Kepler	B-General_Concept
is	O
the	O
codename	O
for	O
a	O
GPU	B-Architecture
microarchitecture	B-General_Concept
developed	O
by	O
Nvidia	O
,	O
first	O
introduced	O
at	O
retail	O
in	O
April	O
2012	O
,	O
as	O
the	O
successor	O
to	O
the	O
Fermi	B-General_Concept
microarchitecture	B-General_Concept
.	O
</s>
<s>
Kepler	B-General_Concept
was	O
Nvidia	O
's	O
first	O
microarchitecture	B-General_Concept
to	O
focus	O
on	O
energy	O
efficiency	O
.	O
</s>
<s>
Most	O
GeForce	B-Application
600	O
series	O
,	O
most	O
GeForce	B-Application
700	O
series	O
,	O
and	O
some	O
GeForce	B-Application
800M	O
series	O
GPUs	B-Architecture
were	O
based	O
on	O
Kepler	B-General_Concept
,	O
all	O
manufactured	O
in	O
28nm	O
.	O
</s>
<s>
Kepler	B-General_Concept
also	O
found	O
use	O
in	O
the	O
GK20A	O
,	O
the	O
GPU	B-Architecture
component	O
of	O
the	O
Tegra	O
K1	O
SoC	B-Architecture
,	O
as	O
well	O
as	O
in	O
the	O
Quadro	B-Application
Kxxx	O
series	O
,	O
the	O
Quadro	B-Application
NVS	O
510	O
,	O
and	O
Nvidia	B-Device
Tesla	I-Device
computing	O
modules	O
.	O
</s>
<s>
Kepler	B-General_Concept
was	O
followed	O
by	O
the	O
Maxwell	B-General_Concept
microarchitecture	B-General_Concept
and	O
used	O
alongside	O
Maxwell	B-General_Concept
in	O
the	O
GeForce	B-Application
700	O
series	O
and	O
GeForce	B-Application
800M	O
series	O
.	O
</s>
<s>
The	O
architecture	O
is	O
named	O
after	O
Johannes	O
Kepler	B-General_Concept
,	O
a	O
German	O
mathematician	O
and	O
key	O
figure	O
in	O
the	O
17th	O
century	O
scientific	O
revolution	O
.	O
</s>
<s>
Where	O
the	O
goal	O
of	O
Nvidia	O
's	O
previous	O
architecture	O
was	O
design	O
focused	O
on	O
increasing	O
performance	O
on	O
compute	O
and	O
tessellation	O
,	O
with	O
Kepler	B-General_Concept
architecture	I-General_Concept
Nvidia	O
targeted	O
their	O
focus	O
on	O
efficiency	O
,	O
programmability	O
and	O
performance	O
.	O
</s>
<s>
The	O
efficiency	O
aim	O
was	O
achieved	O
through	O
the	O
use	O
of	O
a	O
unified	O
GPU	B-Architecture
clock	O
,	O
simplified	O
static	O
scheduling	O
of	O
instruction	O
and	O
higher	O
emphasis	O
on	O
performance	O
per	O
watt	O
.	O
</s>
<s>
By	O
abandoning	O
the	O
shader	O
clock	O
found	O
in	O
their	O
previous	O
GPU	B-Architecture
designs	O
,	O
efficiency	O
is	O
increased	O
,	O
even	O
though	O
it	O
requires	O
additional	O
cores	O
to	O
achieve	O
higher	O
levels	O
of	O
performance	O
.	O
</s>
<s>
This	O
is	O
not	O
only	O
because	O
the	O
cores	O
are	O
more	O
power-friendly	O
(	O
two	O
Kepler	B-General_Concept
cores	O
using	O
90%	O
power	O
of	O
one	O
Fermi	B-General_Concept
core	O
,	O
according	O
to	O
Nvidia	O
's	O
numbers	O
)	O
,	O
but	O
also	O
the	O
change	O
to	O
a	O
unified	O
GPU	B-Architecture
clock	O
scheme	O
delivers	O
a	O
50%	O
reduction	O
in	O
power	O
consumption	O
in	O
that	O
area	O
.	O
</s>
<s>
Programmability	O
aim	O
was	O
achieved	O
with	O
Kepler	B-General_Concept
's	O
Hyper-Q	O
,	O
Dynamic	O
Parallelism	O
and	O
multiple	O
new	O
Compute	O
Capabilities	O
3.x	O
functionality	O
.	O
</s>
<s>
With	O
it	O
,	O
higher	O
GPU	B-Architecture
utilization	O
and	O
simplified	O
code	O
management	O
was	O
achievable	O
with	O
GK	O
GPUs	B-Architecture
thus	O
enabling	O
more	O
flexibility	O
in	O
programming	O
for	O
Kepler	B-General_Concept
GPUs	B-Architecture
.	O
</s>
<s>
Finally	O
with	O
the	O
performance	O
aim	O
,	O
additional	O
execution	O
resources	O
(	O
more	O
CUDA	B-Architecture
cores	O
,	O
registers	O
and	O
cache	O
)	O
and	O
with	O
Kepler	B-General_Concept
's	O
ability	O
to	O
achieve	O
a	O
memory	O
clock	O
speed	O
of	O
7	O
GHz	O
,	O
increases	O
Kepler	B-General_Concept
's	O
performance	O
when	O
compared	O
to	O
previous	O
Nvidia	B-Architecture
GPUs	I-Architecture
.	O
</s>
<s>
The	O
GK	O
Series	O
GPU	B-Architecture
contains	O
features	O
from	O
both	O
the	O
older	O
Fermi	B-General_Concept
and	O
newer	O
Kepler	B-General_Concept
generations	O
.	O
</s>
<s>
Kepler	B-General_Concept
based	O
members	O
add	O
the	O
following	O
standard	O
features	O
:	O
</s>
<s>
The	O
Kepler	B-General_Concept
architecture	I-General_Concept
employs	O
a	O
new	O
Streaming	O
Multiprocessor	O
Architecture	O
called	O
"	O
SMX	O
"	O
.	O
</s>
<s>
SMXs	O
are	O
the	O
reason	O
for	O
Kepler	B-General_Concept
's	O
power	O
efficiency	O
as	O
the	O
whole	O
GPU	B-Architecture
uses	O
a	O
single	O
unified	O
clock	O
speed	O
.	O
</s>
<s>
Although	O
SMX	O
's	O
usage	O
of	O
a	O
single	O
unified	O
clock	O
increases	O
power	O
efficiency	O
due	O
to	O
the	O
fact	O
that	O
multiple	O
lower	O
clock	O
Kepler	B-General_Concept
CUDA	B-Architecture
Cores	O
consume	O
90%	O
less	O
power	O
than	O
multiple	O
higher	O
clock	O
Fermi	B-General_Concept
CUDA	B-Architecture
Core	O
,	O
additional	O
processing	O
units	O
are	O
needed	O
to	O
execute	O
a	O
whole	O
warp	O
per	O
cycle	O
.	O
</s>
<s>
Doubling	O
16	O
to	O
32	O
per	O
CUDA	B-Architecture
array	O
solve	O
the	O
warp	O
execution	O
problem	O
,	O
the	O
SMX	O
front-end	O
are	O
also	O
double	O
with	O
warp	O
schedulers	O
,	O
dispatch	O
unit	O
and	O
the	O
register	O
file	O
doubled	O
to	O
64K	O
entries	O
as	O
to	O
feed	O
the	O
additional	O
execution	O
units	O
.	O
</s>
<s>
Dedicated	O
FP64	O
CUDA	B-Architecture
cores	O
are	O
also	O
used	O
as	O
all	O
Kepler	B-General_Concept
CUDA	B-Architecture
cores	O
are	O
not	O
FP64	O
capable	O
to	O
save	O
die	O
space	O
.	O
</s>
<s>
With	O
the	O
improvement	O
Nvidia	O
made	O
on	O
the	O
SMX	O
,	O
the	O
results	O
include	O
an	O
increase	O
in	O
GPU	B-Architecture
performance	O
and	O
efficiency	O
.	O
</s>
<s>
GPU	B-Architecture
Boost	O
is	O
a	O
new	O
feature	O
which	O
is	O
roughly	O
analogous	O
to	O
turbo	O
boosting	O
of	O
a	O
CPU	O
.	O
</s>
<s>
The	O
GPU	B-Architecture
is	O
always	O
guaranteed	O
to	O
run	O
at	O
a	O
minimum	O
clock	O
speed	O
,	O
referred	O
to	O
as	O
the	O
"	O
base	O
clock	O
"	O
.	O
</s>
<s>
This	O
clock	O
speed	O
is	O
set	O
to	O
the	O
level	O
which	O
will	O
ensure	O
that	O
the	O
GPU	B-Architecture
stays	O
within	O
TDP	B-General_Concept
specifications	O
,	O
even	O
at	O
maximum	O
loads	O
.	O
</s>
<s>
When	O
loads	O
are	O
lower	O
,	O
however	O
,	O
there	O
is	O
room	O
for	O
the	O
clock	O
speed	O
to	O
be	O
increased	O
without	O
exceeding	O
the	O
TDP	B-General_Concept
.	O
</s>
<s>
In	O
these	O
scenarios	O
,	O
GPU	B-Architecture
Boost	O
will	O
gradually	O
increase	O
the	O
clock	O
speed	O
in	O
steps	O
,	O
until	O
the	O
GPU	B-Architecture
reaches	O
a	O
predefined	O
power	O
target	O
(	O
which	O
is	O
170W	O
by	O
default	O
)	O
.	O
</s>
<s>
By	O
taking	O
this	O
approach	O
,	O
the	O
GPU	B-Architecture
will	O
ramp	O
its	O
clock	O
up	O
or	O
down	O
dynamically	O
,	O
so	O
that	O
it	O
is	O
providing	O
the	O
maximum	O
amount	O
of	O
speed	O
possible	O
while	O
remaining	O
within	O
TDP	B-General_Concept
specifications	O
.	O
</s>
<s>
The	O
power	O
target	O
,	O
as	O
well	O
as	O
the	O
size	O
of	O
the	O
clock	O
increase	O
steps	O
that	O
the	O
GPU	B-Architecture
will	O
take	O
,	O
are	O
both	O
adjustable	O
via	O
third-party	O
utilities	O
and	O
provide	O
a	O
means	O
of	O
overclocking	O
Kepler-based	O
cards	O
.	O
</s>
<s>
Nvidia	B-General_Concept
Fermi	I-General_Concept
and	O
Kepler	B-General_Concept
GPUs	B-Architecture
of	O
the	O
GeForce	B-Application
600	O
series	O
support	O
the	O
Direct3D	O
11.0	O
specification	O
.	O
</s>
<s>
Nvidia	O
originally	O
stated	O
that	O
the	O
Kepler	B-General_Concept
architecture	I-General_Concept
has	O
full	O
DirectX	B-Application
11.1	O
support	O
,	O
which	O
includes	O
the	O
Direct3D	O
11.1	O
path	O
.	O
</s>
<s>
The	O
integrated	O
Direct3D	O
features	O
of	O
the	O
Kepler	B-General_Concept
architecture	I-General_Concept
are	O
the	O
same	O
as	O
those	O
of	O
the	O
GeForce	B-Application
400	O
series	O
Fermi	B-General_Concept
architecture	I-General_Concept
.	O
</s>
<s>
NVIDIA	B-General_Concept
Kepler	I-General_Concept
GPUs	B-Architecture
of	O
the	O
GeForce	B-Application
600/700	O
series	O
support	O
Direct3D	O
12	O
feature	O
level	O
11_0	O
.	O
</s>
<s>
Exclusive	O
to	O
Kepler	B-General_Concept
GPUs	B-Architecture
,	O
TXAA	O
is	O
a	O
new	O
anti-aliasing	O
method	O
from	O
Nvidia	O
that	O
is	O
designed	O
for	O
direct	O
implementation	O
into	O
game	O
engines	O
.	O
</s>
<s>
TXAA	O
is	O
based	O
on	O
the	O
MSAA	B-Algorithm
technique	O
and	O
custom	O
resolve	O
filters	O
.	O
</s>
<s>
It	O
is	O
designed	O
to	O
address	O
a	O
key	O
problem	O
in	O
games	O
known	O
as	O
shimmering	O
or	O
temporal	B-Error_Name
aliasing	I-Error_Name
.	O
</s>
<s>
TXAA	O
resolves	O
that	O
by	O
smoothing	O
out	O
the	O
scene	O
in	O
motion	O
,	O
making	O
sure	O
that	O
any	O
in-game	O
scene	O
is	O
being	O
cleared	O
of	O
any	O
aliasing	B-Error_Name
and	O
shimmering	O
.	O
</s>
<s>
The	O
significance	O
of	O
this	O
being	O
that	O
having	O
a	O
single	O
work	O
queue	O
meant	O
that	O
Fermi	B-General_Concept
could	O
be	O
under	O
occupied	O
at	O
times	O
as	O
there	O
was	O
n't	O
enough	O
work	O
in	O
that	O
queue	O
to	O
fill	O
every	O
SM	O
.	O
</s>
<s>
With	O
Fermi	B-General_Concept
,	O
only	O
the	O
CPU	O
could	O
dispatch	O
a	O
kernel	O
,	O
which	O
incurs	O
a	O
certain	O
amount	O
of	O
overhead	O
by	O
having	O
to	O
communicate	O
back	O
to	O
the	O
CPU	O
.	O
</s>
<s>
The	O
CUDA	B-Architecture
Work	O
Distributor	O
in	O
Kepler	B-General_Concept
holds	O
grids	O
that	O
are	O
ready	O
to	O
dispatch	O
,	O
and	O
is	O
able	O
to	O
dispatch	O
32	O
active	O
grids	O
,	O
which	O
is	O
double	O
the	O
capacity	O
of	O
the	O
Fermi	B-General_Concept
CWD	O
.	O
</s>
<s>
The	O
Kepler	B-General_Concept
CWD	O
communicates	O
with	O
the	O
GMU	O
via	O
a	O
bidirectional	O
link	O
that	O
allows	O
the	O
GMU	O
to	O
pause	O
the	O
dispatch	O
of	O
new	O
grids	O
and	O
to	O
hold	O
pending	O
and	O
suspended	O
grids	O
until	O
needed	O
.	O
</s>
<s>
The	O
GMU	O
also	O
has	O
a	O
direct	O
connection	O
to	O
the	O
Kepler	B-General_Concept
SMX	O
units	O
to	O
permit	O
grids	O
that	O
launch	O
additional	O
work	O
on	O
the	O
GPU	B-Architecture
via	O
Dynamic	O
Parallelism	O
to	O
send	O
the	O
new	O
work	O
back	O
to	O
GMU	O
to	O
be	O
prioritized	O
and	O
dispatched	O
.	O
</s>
<s>
NVIDIA	O
GPUDirect	O
is	O
a	O
capability	O
that	O
enables	O
GPUs	B-Architecture
within	O
a	O
single	O
computer	O
,	O
or	O
GPUs	B-Architecture
in	O
different	O
servers	O
located	O
across	O
a	O
network	O
,	O
to	O
directly	O
exchange	O
data	O
without	O
needing	O
to	O
go	O
to	O
CPU/system	O
memory	O
.	O
</s>
<s>
The	O
RDMA	O
feature	O
in	O
GPUDirect	O
allows	O
third	O
party	O
devices	O
such	O
as	O
SSDs	O
,	O
NICs	O
,	O
and	O
IB	O
adapters	O
to	O
directly	O
access	O
memory	O
on	O
multiple	O
GPUs	B-Architecture
within	O
the	O
same	O
system	O
,	O
significantly	O
decreasing	O
the	O
latency	O
of	O
MPI	O
send	O
and	O
receive	O
messages	O
to/from	O
GPU	B-Architecture
memory	O
.	O
</s>
<s>
It	O
also	O
reduces	O
demands	O
on	O
system	O
memory	O
bandwidth	O
and	O
frees	O
the	O
GPU	B-Architecture
DMA	O
engines	O
for	O
use	O
by	O
other	O
CUDA	B-Architecture
tasks	O
.	O
</s>
<s>
Kepler	B-General_Concept
GK110	O
also	O
supports	O
other	O
GPUDirect	O
features	O
including	O
Peer‐to‐Peer	O
and	O
GPUDirect	O
for	O
Video	O
.	O
</s>
<s>
Like	O
Intel	O
's	O
Quick	O
Sync	O
,	O
NVENC	O
is	O
currently	O
exposed	O
through	O
a	O
proprietary	O
API	O
,	O
though	O
Nvidia	O
does	O
have	O
plans	O
to	O
provide	O
NVENC	O
usage	O
through	O
CUDA	B-Architecture
.	O
</s>
<s>
The	O
theoretical	O
single-precision	O
processing	O
power	O
of	O
a	O
Kepler	B-General_Concept
GPU	B-Architecture
in	O
GFLOPS	O
is	O
computed	O
as	O
2	O
(	O
operations	O
per	O
FMA	O
instruction	O
per	O
CUDA	B-Architecture
core	O
per	O
cycle	O
)	O
×	O
number	O
of	O
CUDA	B-Architecture
cores	O
×	O
core	O
clock	O
speed	O
(	O
in	O
GHz	O
)	O
.	O
</s>
<s>
Note	O
that	O
like	O
the	O
previous	O
generation	O
Fermi	B-General_Concept
,	O
Kepler	B-General_Concept
is	O
not	O
able	O
to	O
benefit	O
from	O
increased	O
processing	O
power	O
by	O
dual-issuing	O
MAD+MUL	O
like	O
Tesla	B-Device
was	O
capable	O
of	O
.	O
</s>
<s>
The	O
theoretical	O
double-precision	O
processing	O
power	O
of	O
a	O
Kepler	B-General_Concept
GK110/210	O
GPU	B-Architecture
is	O
1/3	O
of	O
its	O
single	O
precision	O
performance	O
.	O
</s>
<s>
This	O
double-precision	O
processing	O
power	O
is	O
however	O
only	O
available	O
on	O
professional	O
Quadro	B-Application
,	O
Tesla	B-Device
,	O
and	O
high-end	O
TITAN-branded	O
GeForce	B-Application
cards	O
,	O
while	O
drivers	O
for	O
consumer	O
GeForce	B-Application
cards	O
limit	O
the	O
performance	O
to	O
1/24	O
of	O
the	O
single	O
precision	O
performance	O
.	O
</s>
